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| Loading weights: 0%| | 0/310 [00:00<?, ?it/s] |
| Loading weights: 100%|██████████| 310/310 [00:00<00:00, 5147.85it/s] |
| [e2_l1_tulu_r16_s19] step 50/5000 loss 1.0501 (40s) |
| [e2_l1_tulu_r16_s19] step 100/5000 loss 1.0291 (75s) |
| [e2_l1_tulu_r16_s19] step 150/5000 loss 1.0418 (110s) |
| [e2_l1_tulu_r16_s19] step 200/5000 loss 1.1203 (145s) |
| [e2_l1_tulu_r16_s19] step 250/5000 loss 0.9945 (179s) |
| [e2_l1_tulu_r16_s19] step 300/5000 loss 1.0022 (215s) |
| [e2_l1_tulu_r16_s19] step 350/5000 loss 1.0421 (249s) |
| [e2_l1_tulu_r16_s19] step 400/5000 loss 0.9574 (285s) |
| [e2_l1_tulu_r16_s19] step 450/5000 loss 0.9728 (319s) |
| [e2_l1_tulu_r16_s19] step 500/5000 loss 1.0198 (355s) |
| [e2_l1_tulu_r16_s19] step 550/5000 loss 0.9229 (389s) |
| [e2_l1_tulu_r16_s19] step 600/5000 loss 0.9748 (424s) |
| [e2_l1_tulu_r16_s19] step 650/5000 loss 1.0229 (458s) |
| [e2_l1_tulu_r16_s19] step 700/5000 loss 1.0069 (494s) |
| [e2_l1_tulu_r16_s19] step 750/5000 loss 0.9759 (528s) |
| [e2_l1_tulu_r16_s19] step 800/5000 loss 0.8951 (564s) |
| [e2_l1_tulu_r16_s19] step 850/5000 loss 0.9850 (598s) |
| [e2_l1_tulu_r16_s19] step 900/5000 loss 0.9841 (634s) |
| [e2_l1_tulu_r16_s19] step 950/5000 loss 0.8795 (668s) |
| [e2_l1_tulu_r16_s19] step 1000/5000 loss 0.9410 (703s) |
| [e2_l1_tulu_r16_s19] step 1050/5000 loss 0.9030 (737s) |
| [e2_l1_tulu_r16_s19] step 1100/5000 loss 0.9605 (773s) |
| [e2_l1_tulu_r16_s19] step 1150/5000 loss 1.0801 (807s) |
| [e2_l1_tulu_r16_s19] step 1200/5000 loss 0.9641 (843s) |
| [e2_l1_tulu_r16_s19] step 1250/5000 loss 1.0835 (877s) |
| [e2_l1_tulu_r16_s19] step 1300/5000 loss 0.9692 (912s) |
| [e2_l1_tulu_r16_s19] step 1350/5000 loss 0.9044 (947s) |
| [e2_l1_tulu_r16_s19] step 1400/5000 loss 1.0839 (982s) |
| [e2_l1_tulu_r16_s19] step 1450/5000 loss 1.0017 (1016s) |
| [e2_l1_tulu_r16_s19] step 1500/5000 loss 0.9593 (1052s) |
| [e2_l1_tulu_r16_s19] step 1550/5000 loss 1.0844 (1086s) |
| [e2_l1_tulu_r16_s19] step 1600/5000 loss 1.0002 (1122s) |
| [e2_l1_tulu_r16_s19] step 1650/5000 loss 0.9328 (1156s) |
| [e2_l1_tulu_r16_s19] step 1700/5000 loss 0.9733 (1192s) |
| [e2_l1_tulu_r16_s19] step 1750/5000 loss 0.9427 (1226s) |
| [e2_l1_tulu_r16_s19] step 1800/5000 loss 0.8892 (1261s) |
| [e2_l1_tulu_r16_s19] step 1850/5000 loss 0.9922 (1296s) |
| [e2_l1_tulu_r16_s19] step 1900/5000 loss 0.9252 (1331s) |
| [e2_l1_tulu_r16_s19] step 1950/5000 loss 0.9690 (1365s) |
| [e2_l1_tulu_r16_s19] step 2000/5000 loss 1.0074 (1401s) |
| [e2_l1_tulu_r16_s19] step 2050/5000 loss 0.9804 (1435s) |
| [e2_l1_tulu_r16_s19] step 2100/5000 loss 0.9030 (1471s) |
| [e2_l1_tulu_r16_s19] step 2150/5000 loss 0.8932 (1505s) |
| [e2_l1_tulu_r16_s19] step 2200/5000 loss 1.0121 (1541s) |
| [e2_l1_tulu_r16_s19] step 2250/5000 loss 1.0661 (1575s) |
| [e2_l1_tulu_r16_s19] step 2300/5000 loss 1.0591 (1610s) |
| [e2_l1_tulu_r16_s19] step 2350/5000 loss 1.0252 (1644s) |
| [e2_l1_tulu_r16_s19] step 2400/5000 loss 0.9111 (1680s) |
| [e2_l1_tulu_r16_s19] step 2450/5000 loss 1.0282 (1714s) |
| [e2_l1_tulu_r16_s19] step 2500/5000 loss 0.9577 (1750s) |
| [e2_l1_tulu_r16_s19] step 2550/5000 loss 0.9004 (1784s) |
| [e2_l1_tulu_r16_s19] step 2600/5000 loss 0.9865 (1819s) |
| [e2_l1_tulu_r16_s19] step 2650/5000 loss 0.9625 (1854s) |
| [e2_l1_tulu_r16_s19] step 2700/5000 loss 0.9548 (1889s) |
| [e2_l1_tulu_r16_s19] step 2750/5000 loss 1.0035 (1924s) |
| [e2_l1_tulu_r16_s19] step 2800/5000 loss 1.0476 (1959s) |
| [e2_l1_tulu_r16_s19] step 2850/5000 loss 1.0540 (1993s) |
| [e2_l1_tulu_r16_s19] step 2900/5000 loss 0.9286 (2029s) |
| [e2_l1_tulu_r16_s19] step 2950/5000 loss 0.9944 (2063s) |
| [e2_l1_tulu_r16_s19] step 3000/5000 loss 0.9028 (2099s) |
| [e2_l1_tulu_r16_s19] step 3050/5000 loss 0.9172 (2133s) |
| [e2_l1_tulu_r16_s19] step 3100/5000 loss 0.9217 (2169s) |
| [e2_l1_tulu_r16_s19] step 3150/5000 loss 0.9668 (2203s) |
| [e2_l1_tulu_r16_s19] step 3200/5000 loss 0.9897 (2239s) |
| [e2_l1_tulu_r16_s19] step 3250/5000 loss 0.8821 (2273s) |
| [e2_l1_tulu_r16_s19] step 3300/5000 loss 0.9194 (2308s) |
| [e2_l1_tulu_r16_s19] step 3350/5000 loss 0.9577 (2343s) |
| [e2_l1_tulu_r16_s19] step 3400/5000 loss 1.0270 (2378s) |
| [e2_l1_tulu_r16_s19] step 3450/5000 loss 0.9726 (2413s) |
| [e2_l1_tulu_r16_s19] step 3500/5000 loss 0.9510 (2448s) |
| [e2_l1_tulu_r16_s19] step 3550/5000 loss 1.0411 (2482s) |
| [e2_l1_tulu_r16_s19] step 3600/5000 loss 1.0407 (2518s) |
| [e2_l1_tulu_r16_s19] step 3650/5000 loss 0.9960 (2552s) |
| [e2_l1_tulu_r16_s19] step 3700/5000 loss 0.9383 (2588s) |
| [e2_l1_tulu_r16_s19] step 3750/5000 loss 0.9634 (2622s) |
| [e2_l1_tulu_r16_s19] step 3800/5000 loss 1.0055 (2658s) |
| [e2_l1_tulu_r16_s19] step 3850/5000 loss 0.9138 (2692s) |
| [e2_l1_tulu_r16_s19] step 3900/5000 loss 0.9771 (2727s) |
| [e2_l1_tulu_r16_s19] step 3950/5000 loss 0.9655 (2761s) |
| [e2_l1_tulu_r16_s19] step 4000/5000 loss 0.9807 (2797s) |
| [e2_l1_tulu_r16_s19] step 4050/5000 loss 1.0497 (2831s) |
| [e2_l1_tulu_r16_s19] step 4100/5000 loss 0.9130 (2867s) |
| [e2_l1_tulu_r16_s19] step 4150/5000 loss 0.9347 (2901s) |
| [e2_l1_tulu_r16_s19] step 4200/5000 loss 0.8672 (2936s) |
| [e2_l1_tulu_r16_s19] step 4250/5000 loss 0.9184 (2971s) |
| [e2_l1_tulu_r16_s19] step 4300/5000 loss 0.8805 (3006s) |
| [e2_l1_tulu_r16_s19] step 4350/5000 loss 1.0357 (3040s) |
| [e2_l1_tulu_r16_s19] step 4400/5000 loss 0.9688 (3076s) |
| [e2_l1_tulu_r16_s19] step 4450/5000 loss 0.9536 (3110s) |
| [e2_l1_tulu_r16_s19] step 4500/5000 loss 1.0563 (3146s) |
| [e2_l1_tulu_r16_s19] step 4550/5000 loss 0.9046 (3180s) |
| [e2_l1_tulu_r16_s19] step 4600/5000 loss 0.9830 (3216s) |
| [e2_l1_tulu_r16_s19] step 4650/5000 loss 0.9712 (3250s) |
| [e2_l1_tulu_r16_s19] step 4700/5000 loss 0.8690 (3285s) |
| [e2_l1_tulu_r16_s19] step 4750/5000 loss 0.8962 (3320s) |
| [e2_l1_tulu_r16_s19] step 4800/5000 loss 0.9251 (3355s) |
| [e2_l1_tulu_r16_s19] step 4850/5000 loss 0.9910 (3389s) |
| [e2_l1_tulu_r16_s19] step 4900/5000 loss 0.9305 (3425s) |
| [e2_l1_tulu_r16_s19] step 4950/5000 loss 0.9532 (3459s) |
| [e2_l1_tulu_r16_s19] step 5000/5000 loss 0.9011 (3495s) |
| [e2_l1_tulu_r16_s19] DONE in 3495s -> runs/e2_l1_tulu_r16_s19 |
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