text:
Many years back I worked on one of the sequences for the Natural World episode 'Queen of Mantas'. I was working in the Maldives with the 'Big Wave TV' team to capture a newly discovered aggregation of feeding mantas.
Andrea: Queen of Mantas tells the remarkable story of thirty-year-old Andrea Marshall who gave up everything for a life in Mozambique observing the largest popuation of manta rays in the world. From dramatic feeding frenzies, remarkable courtship behavior to the discovery of a giant new species, Andrea’s findings are set to rock the world of marine biology. Andrea: Queen of Mantas is the revelatory true story of one young woman’s determination to understand and protect these remarkable creatures.
”Breathtakingly beautiful testimony... every ripple seemed part of an elegy…” - Guardian
”Manta Rays are extraordinary. For a start they look like an alien spaceship that’s inadvertently plunged into the ocean… superb underwater photography.” - Radio Times
”Watching them in numbers is indeed like watching a flock of birds. Beautiful.” - Daily Express Magazine
”Congratulations – really excellent figures… It looked fantastic going out last night, and I caught up with the Woman’s Hour piece – Andrea’s amazing – what a smart lady. Well done to all the team!” - Tim Martin, Commissioning Editor, BBC
”A truly inspiring, informative and beautiful film” - Di Williams, BBC NHU
BLUE Ocean Film Festival:
Finalist, Marine Animal Behaviour
Festival de l’Oiseau et de la Nature:
Special Distinction for Passion and Involvement
Green Screen Film Festival:
Best Marine Film
New York Festivals:
Silver Award for Nature and Wildlife
5 x Merit N Winner

domain: biology


Natural Resources, School of
Date of this Version
Craft, K., Mahmood, R., King, S. A., Goodrich, G., and Yan, J. 2013. Drought and corn in Kentucky. Applied Geography 45: 353-362.
Natural Resources and Conservation Commons, Natural Resources Management and Policy Commons, Other Environmental Sciences Commons


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This morning we took a peek at the brilliant mind of miss Late Afternoon. And though we were privy to a wee glimpse at her uber-chic LA pad, we couldn’t let it pass us by without a deeper look (it just wouldn’t be right). Her entire home is eclectic and fun in every sense of the word. A true bachelorette pad, just waiting to be unveiled. With photos from Kimberly Genevieve, there’s more over here!
From Liz… I love bold patterns and colors in my personal style, so my home decor is no different. We decided to paint navy stripes and added touches of pink for an eclectic living space.
Our dining room is also used as our creative and photography space. The gallery wall is a mix of Sam’s own art works, family photos, and flea market finds. Sam built the teepee as my Christmas present a few years back, I like to use it as decor while my dogs use it as their doggy house.
My kitchen is the original 50’s kitchen. I wanted to play up the vintage quality by painting the cabinets mint and adding bold red dining chairs.
My bedroom is the most unfinished room in my home. I’m currently building custom closets for the room and I can’t wait to see it all finished!

domain: artistic


mass balance kommer
Ball mills are used primary for single stage fine grinding, regrinding, and as the second stage in two stage grinding circuits. According to the need of customers, ball mill can be either wet or dry designs. Ball mills have been designed in standard sizes of the final products between 0.074 mm and 0.4 mm in diameter.
SBM delivers the world’s most comprehensive range of Heavy-duty conveyor belts. Base on more than 30 years of experience in development, manufacture and applications know-how, SBM designed the unique belts and belt systems to meet specific end-user requirements for high performance and cost-efficiency.
BWZ Heavy Duty Apron Feeder
BWZ series heavy duty apron feeder designed by SBM is one new type high-efficiency conveying equipments. It absorbs SBM decades years’ experience in designing &manufacturing conveying machines and the advanced technology of the world. This apron feeder is especially suitable for short-distance transmission.
CS Cone Crusher
Comparing with other kinds of crushers, CS Series spring cone crusher is quite excellent in hard material crushing and the final product has good sharp. The innovations like stable lubrication system and excellent sealing system evidently reduce the production cost, helping you to achieve the highest level of profitability.
With the development of mining industry, investors present various requirements of the features of flotation machine. Now there are many kinds of flotation machines, such as agitator flotation machine, pneumatic flotation machine and pneumatic- agitator flotation machine. And different mineral ores have different hydrophilicity, so the final configurations greatly depend on the professional designs.
Hammer crusher designed by SBM fits for producing 0-3MM coarse powder products. This machine adopts theories of traditional crushing machines and grinding mills. It makes up the shortage of common mills, and it is the best choice to produce coarse powder at big capacity.
Compared with the commonly screening and grading equipments, the High-frequency screen adopts higher frequency. As a result, it is able to damage tension force of the pulp surface. Also the fine particles are able to oscillate speedily on the surface of the screen because of the high frequency, and the big expecting minerals are isolated from the pulp easily.
HJ Series Jaw Crusher
By analyzing customers’ requirements and absorbing the world-class advanced technology, SBM developed the HJ series jaw crusher. This machine has larger capacity but the energy consumption is quite low. It is to be the ideal substitute products for old ones.
mass balance approach integrating the natural isotope signature of nitrate (NO3-, ammo. and analyzed by Membrane Inlet Mass Spectrometry (MIMS) to quantify 15NH4+ concen.
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2014.03.25:, through the mass balance Eq. (1).:From the mass balance Eq 1 of gas in the container through~~···.
mass balance modeling is important to know the precise amount of required alloys for the LF input with respect to scrap composition. In present study, chemical reactions with ma.
【】:Using the Ecopath mass-balance trophodynamic model,this paper analyzed the trophic levels,flows,food web structure and ecosystem maturity of the East China Sea,an.
Find best value and selection for your BRAND NEW Womens New Balance Boston Mass 02134 8 D search on eBay. World's leading marketplace. Skip to main content Enter y.
Arendt, A., Sharp, M., 1999. Energy Balance Measurements on a Canadian High Arctic Glacier and Their Implications for Mass Balance Modeling. IAHs Pub1., 256: 165–172 Br.
Mass balance excretion studies in laboratory animals and humans using radiolabeled compounds represent a standard part of the development process for new drugs. From thes.
Waters Extrel Mass Spectrometry Circuit Board Mercury D Waters Extrel Mass Spectro. Mettler Model AC 100-S2 Analytical Digital Balance Scal Micromass Stream Select Mo.
④The Energy balance equation and mass-balance equation were established, and then the sludge microwave drying mathematical model was made available:Results above pro.
: Applying the mass balance and the reaction equilibrium theory, a dynamic model of carbon content and temperature variation of BOF steelmaking process based on the Co.
This is the first study to indicate the total mass balance of the Antarctic ice sheet is in significant decline, said Isabella Velicogna of the University of Colorado at Boulder. MSN: N.
:;chemical mass balance model;CMB 。(.
Surface Mass Balance of Antarctica?Surface Mass Balance of Antarctica、Surface Mass Balance of Antarctica、Surface Ma.
Mass Balance in Petrochemical Storage Tank Receipt and Payment Based on Data Reconciliation Technique : .
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Ball mills are used primary for single stage fine grinding, regrinding, and as the second stage in two…


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By Author / Illustrator
Angela McAllister, Aitch
Frances Lincoln Publishers Ltd
This beautiful book of stories takes readers on a journey around the world with 50 best-loved tales, featuring creatures big and small.
Prepare for a story time like no other as you delve into this beautifully-illustrated collection of classic stories featuring tales about your favourite animals from every corner of the globe. This anthology of animal stories brings together the most loved animal-themed fables, myths and legends including The Three Little Pigs, The Ugly Duckling, Why the Swallow's Tail is Forked and the story of Ananse and the Python.
Lively retellings from best-selling author Angela McAllister are brought to life with sumptuous illustrations from Romanian-born illustrator, Aitch, in this treasury to treasure for a lifetime. For story lovers young and old this is the perfect anthology for all the family and animal lovers everywhere.
This book allows you to travel the world as you learn the folk tales and origins behind some of the animals that inhabit the each country. Accompanied by beautiful illiustrations, these short tales are easy to follow and understand, even for children as young as five. The mixture of well known and new stories also works well to make sure anyone can access the book. For example, many children will be familiar with the story of The Three Little Pigs, The Three Billy Goats Gruff and The Ugly Duckling and will enjoy reading them again but they will equally enjoy learning about different cultures through the telling of other stories such as How the Kangaroo Got Her Pouch, Why Hippo Lives in the Water and The Nodding Tiger. This collection of stories was used well in a topic about 'Around the World' and, being short in their length, we were able to read many of the stories when we had a few spare minutes in our day. Primarily used to help us learn about countries in the world and where to find them, we also found good quality links to English and PHSE through working with this book. The children enjoyed locating the countries and continents once they had heard their stories and making comparisons to stories they had already heard. The children even worked towards writing their own country themed stories in an attempt to create their own book for our own library. The morals within some of the stories allowed for deep and meaningful circle time discussions. Overall, this book is a wonderful collections of short stories which would only improve any library it becomes part of. 127 pages / Ages 5+ / Reviewed by Kyle Matravers, teacher.
Suggested Reading Age 5+

domain: library


text:
Sudoku Pro App Download
Size: 5.92 MB | Version: v1.4| File Type: APP | System: Android
The description of Sudoku Pro
This versiob is ad-free. Free version of the game with advertising is also aviable.
Sudoku is a logic-based number-placement puzzle. The objective is to fill a 9×9 grid with digits so that each column, each row, and each of the nine 3×3 sub-grids that compose the grid (also called “boxes”, “blocks”, “regions”, or “sub-squares”) contains all of the digits from 1 to 9. The puzzle setter provides a partially completed grid.
~ Mobile Download APK ?
- 1. Download the Apk file by clicking the download button below .
- 2. Install and run it game will start after downloading. If the instalation didn’t work, try again next day.
- 3. It’s easy.Enjoy it!

domain: game


Poll data published Friday shows that Germans welcome Chancellor Angela Merkel's decision to run for a fourth term. SPD leader and Vice Chancellor Sigmar Gabriel, however, has less to smile about.
Around two-thirds of Germans say they welcome Chancellor Angela Merkel's decision to stand for a fourth term as chancellor in next year's election, according to a poll published on Friday.
The "Politbarometer" poll, commissioned by the German broadcaster ZDF, found that 64 percent backed the chancellor's decision, compared to 33 percent who opposed it.
Among registered supporters of the center-right Christian Democratic Union (CDU) party, Merkel's approval rate was as high as 89 percent.
The poll also showed that if the election were held this Sunday, Merkel's conservative Union bloc - the CDU and their Bavarian sister party, the Christian Social Union (CSU) - would take around 36 percent of the vote, retaining their spot as the leading party. The Social Democratic Party (SPD), by contrast, would only win 21 percent.
As "Politbarometer" points out, this would likely be enough for the Union parties to form a coalition with the Greens and centrist Free Democratic Party. It would not, however, be enough for Germany's left-leaning parties to form a so-called red-red-green coalition, consisting of the SPD, the Left Party and Greens.
Left voters prefer Schulz
Friday's poll results also shed light on who voters would prefer to see leading the SDP, with current European Parliament President Martin Schulz significantly outranking the current party head Sigmar Gabriel.
Some 51 percent of respondents said they would favor Schulz to be the SPD's candidate for chancellor, compared to 29 percent who said they preferred Gabriel. Among registered SPD supporters, Schulz's approval rating to lead the party into the elections rose to 64 percent, while Gabriel's sank to 27 percent.
Schulz has not declared that he will run for the chancellorship. However, he announced on Thursday that he will stand down from his EU post to return to German politics. The SPD is expected to announce their candidate for the chancellorship by the end of January.
However, polls show that Merkel would defeat both prospective SPD candidates to the chancellorship.
The chancellor is elected by secret ballot in Germany's lower house, the Bundestag, by newly elected members following the vote. The precise date for next year's election has yet to be set.
The telephone poll randomly sampled 1,258 voters between November 22 and 24.
The poll also included questions concerning refugees, personal well-being and Turkey's prospective accession to the EU. You can read the full results here.


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If you can tick more than 5 of the below you could be suffering from Rushing Women’s Syndrome:-
[trx_columns count=”2″] [trx_column_item]
- Coffee is a daily fix
- Just swallow food rather than chewing it
- Short-term memory is poor
- Feeling of not enough hours in the day
- You can’t sit down unless you are beyond tired
- Suffer with bloated stomach and digestive problems
- Sleep is compromised to get jobs done late at night
- Always irritable
- “Me time” is a luxury you can never afford
- Rarely ask for help
- Take your phone everywhere, even the toilet
- Rarely notice special moments
- Can’t remember the last time you really laughed
- Always look for more ways to be loved or praised
- Take short shallow breaths
- Constantly feel guilty
- You bark “so busy” or “stressed” far too often when people simply ask how you are
- Find it difficult to switch off without wine
This is now a real syndrome which is affecting a lot of women of all ages. The psychological and biochemical damage caused by a life of stress is nothing new, but this syndrome is new.
We don’t have the time to shop and prepare regular well balanced healthy meals. We bolt down our food, so the body has no time to fully prepare the stomach acid and digestive enzymes required to digest our food properly. We feel bloated and can’t shift those excess pounds or actually taste and saviour the food on our plates. How did we come to be in this state? In the past 20 years with the advent of the internet and mobile phones we are on call 24/7. There is now no real down time. We work longer hours, whilst maintaining all the domestic duties at home. We are doing a double shift of work and it’s taking its toll. A prolonged chemical cascade of stress hormones is increasing our susceptibility to depression, anxiety, infertility, digestive disorders, high blood pressure and obesity to name but a few. We’re tired but wired and constantly on alert. Existing in the ‘fight or flight’ state for too long means we suffer on every level. We store body fat, sleep poorly, suffer with tense muscles, hair thins and skin problems flare up and yes our libido goes out the window too!
When we are under constant stress, messages are sent to the pituitary gland that fires off the sympathetic nervous system and all the necessary hormones, so we are ready for ‘fight or flight’. All of the body’s glands and systems that are involved in producing the ‘fight or flight’ effect, can be rebalanced and supported through regular reflexology treatments. You can also make some lifestyle changes, which can include revising your nutritional intake, meditation, take regular exercise that you enjoy, having an honest conversation with yourself about alcohol and caffeine intake, putting some me time aside each day (even just 10 mins). Simply just by saying NO occasionally can actually be an act of kindness for all and it could make you a lot nicer person to be around!

domain: medical


text:
Thanksgiving is nearly here (how did that happen?), and so I find myself dreaming up pumpkin-themed crafts, recipes and décor. Are you the same? 😁
I love a tasty grazing board or charcuterie platter for entertaining, so for each season I try to re-invent the classic cheese board spread to bring a little fun to my party tables!
Pumpkin Shaped Cheese Ball Appetizer
A charcuterie or cheese board is something that is still so popular, and one of my favorite ways to serve appetizers for any party of holiday!
The main ingredient in this cheese ball is cream cheese and it’s also the binding ingredient to help tie all the other flavors and ingredients together.
You could mix all the ingredients together and serve them inside a bowl like a dip. But where’s the fun in that? 😉
But you can do what I did, and make your cheese ball into a pumpkin shape to wow your guests! I promise, it’s super easy!
Like I said, this pumpkin cheese ball appetizer is SO easy to make and you can actually add any flavors you like in the mixture.
I personally love the little salty/sweet kick the smoked bacon and caramelized onions add to the mixture. But you could skip that or substitute the bacon for ham, chorizo or some other charcuterie of your choice.
I also used only a couple of cheeses for this appetizer, so it turned out to be a much more economical party spread than the usual cheese and charcuterie board!
For coating your cheese ball you can use a third cheese to add more color or an extra depth of flavor, but I didn’t bother.
You can also coat the cheese ball with some grated Parmesan cheese, dried herbs, chopped nuts or even chopped dried cranberries.
This is a totally versatile appetizer recipe, and you can basically add all or any of your favorite flavors as the add-ons.
I also used finely diced red, green and yellow peppers for color and crunch, alongside some other flavorings like garlic powder, smoked paprika and dried chives and herbs.
You can also make this pumpkin shaped cheese ball appetizer a couple of days ahead of your party or celebration, which makes it the perfect Thanksgiving appetizer to leave you free to concentrate on that turkey and other trimming! 👍
Check out how to make this delicious Fall appetizer in the quick video below:
Hope you like the recipe and feel inspired to have a go! If you do, tag me on social media @BirdsParty so I can see and share your creativity! 😍

domain: food


text:
A visit with Ulysses S. Grant at St. Ambrose
Aledo Times Record
DAVENPORT, Iowa—On Saturday, March 22, at 7 p.m., St. Ambrose University alumnus Peter Grady will perform a one-man show, “Unconditional Surrender: A Visit with Ulysses S. Grant,” on the Galvin Fine Arts stage. The show was written by Grady using Grant's memoir, as well as other historical references. Admission to the performance is $6 for adults and $3 for students. The Galvin Fine Arts Center is located on Gaines Street, between Locust and Lombard.
“Ulysses S. Grant comes to life in this informative, humorous and touching portrayal,” according to show’s website. Grady, who is an assistant in the Iowa Attorney General's office, has been active in community theatre in Marshalltown, Iowa, for many years.


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A perfect marriage. A complete menu, which incorporates the best strains of the Casablanca Valley and is combined with the most delicious preparations, allowing the tourist from Valparaíso to get closer to the essence of the Valley and wine tourism.
Casablanca Valley is the pioneer valley for cold weather wines. Its history begins in September of 1982, next to the outstanding Enologist Pablo Morandé who impelled its formation. Its main motivation was the proximity of the coast, the existence of underground water tables and the study of vegetation in the area. Until the germination of the grasses it caught his attention, as well as the sprouting of the thorns, the crops in the peasant orchards, where there was even a vine of seed and table grapes.

domain: agronomy


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Hello friends. Super excited to say that I had a call with a literary agent last week! I can’t reveal anything at the moment (I know, I know, I hate to be a tease, but you’ll get no spoilers from me…) so WATCH THIS SPACE for an exciting announcement soon!
Back to the point of this post…Stop Two on the BLOG TOUR!
I chatted with the ever personable and super nice Vivian Kirkfield on her blog. You can read the actual interview here. She asked questions that were more personal and less about Listening to the Stars, so I’ve copied my answers here:
Vivian: Welcome, Jodie! I’m so glad you stopped by for a visit. Congratulations on THREE books out this year! I know everyone is excited to learn more about you, so let’s get started.
Who were your favorite authors/illustrators when you were a child?
HI Vivian, Thanks for chatting with me! I had a zillion favorites as a kid, many of which were obscure books of the 70s. Sit back, relax, and take in what could have been a HUGE list (but I’ll spare you):
Caps for Sale: A Tale of a Peddler, Some Monkeys and Their Monkey Business written and illustrated by Esphyr Slobodkina. Still one of the most fun read-alouds that I know.
There’s No Such Thing as a Dragon by Jack Kent. Starring the absolute cutest pet of all time.
Corduroy / A Pocket for Corduroy by Dan Freeman. Talk about emotions, I had all the feels reading this.
Just for You by Mercer Mayer. This Little Creature (porcupine? hamster?) made my day with all his (her?) mistakes and mishaps.
But my mostest favoritest, read-under-the-covers-until-mom-yells-at-me-to-put-the-flashlight-away books of childhood were Where the Sidewalk Ends and A Light in the Attic by Shel Silverstein. I memorized his poems, copied them, made them into “performance art” to my parents’ chagrin, and when I was old enough (9 or 10, double digits!), wrote and illustrated my own and sent them to Shel (I felt I could be on a first name basis with him) for him to “include” in his next book. Sadly, he didn’t comply.
Now that I have kids of my own, I find it fascinating to be raising them in Britain, where none of these books are known/loved. Happily, it has allowed me to learn about a whole host of British classics that I never knew, such as Zagazoo by Quentin Blake and The Tiger Who Came to Tea by Judith Kerr.
What do you know now that you wish you knew when you first started writing?
Take your time. Like many wannabe writers, I rushed into sending out my work too early to agents/publishers on the hunt for that illusive acceptance. First drafts are never brilliant (very few of us are (evil) geniuses that way), so take a step back and recognize that writing is a process that evolves over time. Critique partners can really help you see your work more clearly (and point out your weaknesses, which sounds awful, but be open to it and the results may surprise you.)
Getting published isn’t always the validation that many people are seeking. Sure, there are some cheery moments, but mostly writers just “crack on” and get back to work. As Anne Lamott puts it in the wonderful Bird by Bird (still one of my favorite books on the craft):
Good advice, in my mind.
Where do you like to write – inside, outside, special room, laptop, pen and paper?
I don’t have a writing room or office but I feel most comfortable writing in bed, anyway (which annoys my husband to no end. But he’s also my muse, so he tolerates it for the sake of “Art.”
Like many writers, ideas strike everywhere, and I’ve had to learn to write in short bursts—fitting it in between the rest of life (including homeschooling during the extensive lockdowns we’ve had in England.)
This past year I wrote most of my nonfiction books sitting in the car during my daughter’s soccer practice (parents weren’t allowed to congregate near the field). I tend to have great ideas in the shower, too, so I often have soggy first drafts.
When do you write – early morning, late in the day, middle of the night, on schedule, as the muse strikes?
I envy those writers who have schedules (from the 5 am writers’ clubs to those who keep their butt in chairs until they have 1,000 words on the page). Maybe someday I’ll make a structure I can stick to, but that doesn’t fit my life right now. Even so, I continually remind myself that I AM a real writer, even if I’m just jotting ideas or scribbling notes. Every finished draft is a super-mega-WIN in my book, and one to be celebrated (even if it’s rubbish).
Why do you write for children?
Your question reminds me of a quote by Rainer Maria Rilke: “Go into yourself,” Rilke suggests in Letters to a Young Poet. “Find out the reason that commands you to write; [and] see whether it has spread its roots into the very depths of your heart.”
Formerly, I had a love/hate relationship with writing, having written everything from essays to plays to short stories to poetry. Taking Rilke’s suggestion, I think the “reason that commands” me to write is a primal need to express myself, but I always felt compelled to do so in an angst-ridden, soul-plumbing, adult-y way.
When I began writing for children I found that the love/hate dichotomy disappeared and it became pure joy. And who doesn’t want more pure joy in their life?
I’m also fascinated about the idea of being “in the zone.” Artists, athletes, musicians all aim for that moment when the dopamine or serotonin kicks in and the world around you disappears. In a sense, I’m always striving for that feeling of calm transcendence that for me comes from being creative, and I tend to get that feeling a lot when I’m writing for kids.
Having said all that, I also think writing for kids is like giving them the most wonderful gift in the world. Sharing a book with a child—and watching their eyes light up, their senses heightened, their focus concentrated, and their creative mind sparked—has to be one of my highlights of parenthood. So, by extension, I’m hoping that other families and teachers get to experience more of this through my writing.
That’s it! Now you hopefully know a bit more about me. Happy writing everyone!
(And of course don’t forget, Listening to the Stars is available NOW!)

domain: hobby


|Publication number||US8037575 B2|
|Application number||US 12/211,624|
|Publication date||18 Oct 2011|
|Filing date||16 Sep 2008|
|Priority date||28 Feb 2008|
|Also published as||CN101807219A, CN101807219B, US20090222785|
|Publication number||12211624, 211624, US 8037575 B2, US 8037575B2, US-B2-8037575, US8037575 B2, US8037575B2|
|Inventors||Ying-Chou Cheng, Chih-Ming Lai, Ru-Gun Liu, Tsong-Hua Ou, Min-Hong Wu, Yih-Yuh Doong, Hsiao-Shu CHAO, Yi-Kan Cheng, Yao-Ching Ku, Cliff Hou|
|Original Assignee||Taiwan Semiconductor Manufacturing Company, Ltd.|
|Export Citation||BiBTeX, EndNote, RefMan|
|Patent Citations (66), Non-Patent Citations (21), Referenced by (16), Classifications (9), Legal Events (2)|
|External Links: USPTO, USPTO Assignment, Espacenet|
This application claims the benefit of U.S. Provisional Application 61/032,358 entitled “A METHOD FOR SHAPE AND TIMING EQUIVALENT DIMENSION EXTRACTION,” filed Feb. 28, 2008, herein incorporated by reference in its entirety.
The present disclosure is related to the following commonly-assigned U.S. patent applications, the entire disclosures of which are incorporated herein by reference: U.S. application Ser. No. 12/025,933 filed Feb. 5, 2008 by inventors Francis Ko et al. for “Automatic Virtual Metrology for Semiconductor Wafer Result Prediction”; and U.S. application Ser. No. 11/748,604 filed May 15, 2007 by inventors Ru-Gun Liu et al. for “MODEL IMPORT FOR ELECTRONIC DESIGN AUTOMATION”.
Semiconductor technologies are continually progressing to smaller feature sizes, such as 65 nanometers, 45 nanometers, and below. Integrated circuits (IC) design and fabrication technologies have been exploited to a limit and need more tuning in designing and also interactions between designing and manufacturing.
Accurate simulation of today's devices needs to account for real device geometry complexities after the lithography and etching processes, especially when the channel length shrinks to 65-nm and below. The device performance is believed to be quite different from what designers expect in the conventional IC design flow. The traditional design lacks consideration of the photolithography effects and pattern geometrical operations from the manufacturing side.
For the deep sub-micron circuit design, a purely rectangular shape is almost impossible to achieve in manufacturing. A potential risk is hence imposed on the linkage between design and manufacturing. However, there is no additional parameter in the current SPICE model card to describe the effect of shape distortions. For example, the corner rounding of the L-shape Active region near the poly-silicon gate will be different from that of the T-shaped Active region. The same issue arises in poly-silicon with a hammerhead near the gate area. Several works have attempted to model or characterize non-rectangular devices by slicing a transistor into small parallel devices, and then summing up the currents contributed from those small sliced transistors. This old approach is intuitive but lacks proper models to accurately describe the narrow width and short channel effects of sliced devices. In addition, the sliced devices might fall into the sub-ground region with dimensions less than the minimum of the binning boundary of the SPICE model.
In current digital IC design flow, there are several commercial tools utilized to do the physical checking of devices, such as the well-known DRC rules or further advanced DFM lithography hotspot check rules. Designers have to modify the layout once the layout violates the physical design rules. However, all the methods mentioned are rule-based approaches. There are no tools that can provide a real time electrical performance check for designers. Another disadvantage of the current approaches is that they cannot deal with complicated circuit layout environments. Moreover, there is a limitation on the grid resolution of the database libraries for current rule-based approaches.
Aspects of the present disclosure are best understood from the following detailed description when read in association with the accompanying figures. It is noted that, in accordance with the standard practice in the industry, various features in the drawings are not drawn to scale. In fact, the dimensions of illustrated features may be arbitrarily increased or decreased for clarity of discussion.
It is understood that the following disclosure provides many different embodiments, or examples, for implementing different features of the invention. Specific examples of components and arrangements are described below to simplify the present disclosure. These are, of course, merely examples and are not intended to be limiting. For example, the formation of a first feature over or on a second feature in the description that follows may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features may be formed between the first and second features, such that the first and second features may not be in direct contact. In addition, the present disclosure may repeat reference numerals and/or letters in the various examples. This repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed.
Design for manufacturability (DFM) is an integration of manufacturing data and design procedure for better yield and design efficiency. An interaction and communication between designer and manufacturer is enhanced thereby for more accurate, faster, and more efficient design. In one example, various manufacturing data are formulated, quantified, and integrated to enable collaboration between manufacturer and designer, reduce design time and design cost, and increase manufacturing yield and production performance.
The IC design method 100 may begin at step 102 by providing an IC design layout of an IC device. The IC device is taken as an example for simplicity to illustrate the design method. In one example, the IC device includes a MOSFET device. An exemplary IC device 120 and its layout in various perspectives is illustrated in
The IC design method 100 proceeds to step 104 by generating an IC layout contour based on the IC design layout 122 and other design data, such as a gate electrode and an active region. The generating of an IC layout contour is a process to simulate the IC device to generate its physical dimensions and geometries based on its design layout. In another embodiment, the generating process further utilizes the manufacturing data associated with an IC manufacturer to be implemented to fabricate the IC device. In one embodiment, the manufacturing data includes lithography processing data, such as statistical data of focus and/or energy (or dose) and masks associated with lithography exposure, to transfer an IC design layout (such as a channel region 122) defined in the mask to an IC feature on a wafer. In another embodiment, the manufacturing data also includes other relevant processing data, such as etching data including etchant characteristics. The simulation will generate virtual fabricated features corresponding to the IC design layout. In this example of
The IC design method 100 proceeds to step 106 by generating an effective rectangle from the IC layout contour. The effective rectangle is a geometry that can be simulated easily and more efficiently. The generating of the effective rectangle is explained in more detail with the IC device 120 as an example. First, find a maximum rectangle 128 inside the IC layout contour defined by the gate electrode contour 126 and the active region contour 124. This step can be implemented automatically using a geometrical calculation algorithm. Then, find a width correction to the maximum rectangle according to the difference between the channel contour and the maximum rectangle 128. For example, find an average difference between the channel contour and the maximum rectangle 128 among all the points of both sides of the maximum rectangle 128 along the length direction. Similarly, find a length correction to the maximum rectangle according to the difference between the channel contour and the maximum rectangle 128. For example, find an average difference between the channel contour and the maximum rectangle 128 among all the points of the both sides of the maximum rectangle 128 along the width direction. In one embodiment, the effective rectangle 130 is a rectangle with a width equal to the width of the maximum rectangle plus the width correction and a length equal to the length of the maximum rectangle plus the length correction.
The IC design method 100 proceeds to step 108 by simulating the IC device for its electrical performance based on the effective rectangle 130. The simulation can be performed by a suitable simulation tool such as the simulated program with integrated circuit emphasis (SPICE). SPICE is a tool to provide complete physical simulation including output signal deformation, signal level, and time delay. SPICE is a circuit-analysis program developed by UC Berkeley. The simulated results may include various electrical parameters, such as saturation current. In another embodiment, the simulated results include other electrical performance, such as short channel effect and the associated performance deviation. In a further embodiment, the step 108 further includes various verification and inspection to identify hotspots that may cause quality issues and/or reliability issues to the IC device. In one example, various criteria are defined to check the simulated electrical parameters and to find from the simulated results if any area is out of the tolerable ranges according to the predefined criteria.
The IC design method 110 may proceed to step 112 by generating a maximum rectangle 128 inside the IC layout contour defined by the gate electrode contour 126 and the active region contour 124. This can be implemented automatically using a geometrical calculation algorithm.
The IC design method 110 proceeds to step 114 by finding a width correction and a length correction to the maximum rectangle according to the difference between the channel contour and the maximum rectangle 128. For example, take an average width difference between the channel contour and the maximum rectangle 128 among all the points of both sides of the maximum rectangle 128 along the length direction as a width correction. Similarly, take an average length difference between the channel contour and the maximum rectangle 128 among all the points of both sides of the maximum rectangle 128 along the width direction as the length correction. In one embodiment, an effective rectangle 130 is defined as a rectangle with a width equal to the width of the maximum rectangle plus the width correction and a length equal to the length of the maximum rectangle plus the length correction. The effective rectangle is used as the channel region for simulation to extract electrical performance parameters and other relevant data. The simulation can be performed by a relevant simulation tool such as SPICE. The simulated results may include various electrical parameters such as saturation current. In another embodiment, the simulated results include other electrical performance characteristics, such as short channel effect and the associated performance deviation.
The IC design method 110 proceeds to step 116 by extracting the sensitivities of the width correction and the length correction to an electrical parameter of the IC device from the simulation results using the effective rectangle 130 as the channel region. Take the saturation current Ids as an example. The maximum rectangle can be used as the channel region and is simulated for its saturation current Idsmax
In one embodiment, the above simulated results can be accumulated to build a design data library such that the data library can be used as a table for future design simulation. When a new IC design layout is in consideration, the IC layout contour is generated from the IC design layout. The maximum rectangle is generated accordingly. When the maximum rectangle matches one of IC layout in the data library, the relevant sensitivities can be used for electrical performance evaluation based on the above equation or the like.
In other embodiments, the design method 100 or the method 110 may proceed to tape-out. After all the verifications of the design functional specification, signal timing, device connectivity, and design rule of layout are accomplished, the layout will be taped out and be provided to a manufacturer, such as a semiconductor foundry for mask fabrication and IC chip fabrication.
The design flow then proceeds to step 206. The physical parameters, dimensions, and/or geometries such as layout contours simulated from the above step can be fed to the shape-to-electric (S2E) engine 208 to simulate electrical performance of the IC device based on the IC layout contours according to the method 100 and/or the method 110. The S2E engine is designed operable to implement the method 110 in one embodiment. In another embodiment, the S2E engine transforms the irregular channel region into a shape of a rectangle with equivalent length and width for each MOS device. Consequently, each transistor can be easily identified and simulated. Hence the electric parameters are extracted from the simulated results efficiently. During the step 206 of simulating for the electric parameters from the geometric parameters of the IC device, the simulation process files may be encrypted and provided to the S2E engine for shape to electric simulation. Then electric parameters, such as on-current (Ion), off-current (Ioff), effective width (Weff), effective length (Leff) and other parameters, are extracted from the simulation result.
At the next step 210, the extracted electric parameters from the S2E engine are provided to the SPICE model and the SPICE netlist is modified accordingly for further circuit simulation and analysis by designer to tune the design layout of the IC device. The above process flow may be repeated for fine tuning the IC device design.
In various embodiments, the above disclosed method can be incorporated into a normal IC design flow in one embodiment. Therefore, the normal IC design can resume from the simulated results from the S2E engine. The disclosed design method provides an aggressive approach to extract the equivalent length and width for non-rectangular transistors and is proposed and demonstrated on the 65-nm and 45-nm nodes. This approach is easy to apply to the regular circuit design flow without significant modifications. The new model prior to the device inspection can be saved. In addition, it can turn the non-ideal channel region, induced by manufacturing limitations and unfriendly design types, into a set of representative information. Based on this method, we have developed a packaged tool kit, called the Shape-to-Electrical engine (S2E), for designers to simulate the exact design performance.
The disclosure provides the method for IC designing and simulation in another embodiment. When simulating and designing an IC device, such as a transistor, a feature of the IC device, such as a gate region, is usually distorted and has an irregular shape.
where the Cg1, Cg2, Cg3, Cf1, Cf2, Cf3 are the relevant tuning factors. The parameter η is a weighting factor, and the L, W and the L′, W′ are sets of the device dimensions drawn and extracted, respectively. The parameter Rpatterning indicates the index of the distorted channel region, and dI*sat is the difference of the normalized driving current for electrics.
These two equations can be expressed as a simple transmission matrix for the geometry and electrics in Equation (3),
where the GL and Gw are the sensitivity functions, and AElectrics and BGeometry are the matrices of the electrical part and the geometrical part, respectively.
The operation for S2E is simple and fully compatible to the current IC design flow. As illustrated in
Several tests have been performed to evaluate the compatibility with EDA tools. In various examples, the accuracy of the results is verified with the experimental data from the 65-nm to 55-nm technology nodes. The first investigation is CD variation (CDV) check based on the conditions with Focus-Exposure-Matrix (FEM) splits. The second one is to perform the full chip verification for those transistors with potential electrical hotspots. In these two exemplary investigations, several hotspots were identified and classified.
The CDV check reveals the possibility to investigate the gate CD variations after contour simulation by the S2E engine. The CDV results can be used to check whether the design meets the designer's expectations. The CDV check plays an important role in DFM because it is a direct indication of the CD variation sensitivity of the design. Meanwhile, the S2E engine is capable of verifying the gate CD of the full chip efficiently.
The verification with S2E engine on a 65-nm actual circuit has been demonstrated in another example. The primary work is to identify the risky design patterns and its impact on the electrical performance caused by corner rounding. In this example, several transistors have been identified and indicated for the severity of the impact on electrical performances. For example, a small device with serious Active and Poly rounding is identified. Consequently, the S2E engine facilitates not only the CDV qualification but also the investigation of corner rounding.
The S2E engine can derive the driving current of a non-ideal device from its shape to inspect whether the behaviors of the device are acceptable. The electrical data from devices with various shapes can be identified and correlated beforehand. The data contains the information of designing and manufacturing, including the design size, the pattern style, the optical proximity effect, the etching bias, CMP polishing compensation, and so forth. Therefore, it is necessary to correlate the overall behavior of dimension changes to electrical performance. The correlation can be implemented in the S2E engine to predict the electrical performance of devices. The multiple regression method and a quadratic model are adopted and calibrated with silicon data. Equations (4) to (6) are for the regression are provided below. The data for modeling is acquired either from a SPICE model or from the measurement. The main concept for data modeling is to correlate after-development inspection (ADI) and etching-bias first. The next step is to build a global model with an implicit function of etching-bias and all other parameters.
For characterizing the initial data, a multi-variable regression method is used for silicon data calibration, resulting in Equation (4). The drain current can be expressed as the following:
where CDADI is the measured CD after photoresist development, and Cs (C0, CL, CP, CW and CADI) are constants according to the fitting result. The relation of lithographic pitch effect versus Isat can be sketched as a 3D plot.
Alternatively the data calibration can be carried out with a two-step model, as shown in Equation (5):
where Xn can be length, width, ADI, after-etching inspection (AEI) bias, and some relative parameters. After some algebraic steps, Equation (5) can be cast into a matrix form for programming in practice.
Finally, the normalized Isat,n can be transformed back to the physical domain:
I sat=(offset2 +C*×I sat,n)2.018. (6)
In one example, the model accuracy for silicon calibration is within 5%. Both approaches are adopted for silicon data calibration in this study in either formulating the process libraries or building the lookup tables.
Since the gate CD would be varied due to the drifts of the exposure and focus in the lithography process, the electrical modeling and the characterization of devices are correlated to the process window and its statistical result are concerned. With the splits of process window, the S2E engine can generate a set of corner results including shape and electrical information. The variation range of each electrical parameter corresponding to the process skews can be estimated. A unified statistical expression is proposed to describe the systematic relationship between the process drift and electrical property of the devices. Once the focus-exposure condition is specified, the shift of electrical properties is predictable by Equations (7) and (8):
CDgate,i,j,k=offsetnom +[S CD,thres]i,j ×U thres +ω·[S CD,defocus]i,j ×U defocus, and (7)
(Variance)i,j,k =[S var,thres]i,j ×U thres +ω·[S var,defocus]i,j ×U defocus. (8)
The result of gate CD distribution versus process window is expressed by Equation (9):
Similarly, electrical parameters can be summarized as Equations (10) to (12).
(Y)elec,i,j,k=offsettypical +[S Y,thres]i,j ×U thres +ω·[S Y,defocus]i,j ×U defocus, (10)
(Variance)i,j,k =[S var,thres]i,j ×U thres +ω·[S var,defocus]i,j ×U defocus, and (11)
Y elec,final=(Y elec,i,j,k)+(Variancei,j,k) (12)
where Y indicates one of the electrical parameters, ω is the weighting factor, k means the kth transistor, and i, j indicate the exposure and defocus conditions.
In various embodiments, the disclosed method provides an approach to extract the equivalent dimension for non-rectangular transistors. The S2E engine is developed to characterize the distorted channel region caused by the resolution limit and manufacturing processes. This tool can be incorporated into the existing circuit design flows with slight modifications. The S2E engine can packaged as a tool-kit for effective dimension extraction, CDV inspections, and statistical analysis from shapes to electrics, and eventually the parasitic component extractions for IC design with serious pattern distortion.
The disclosed design methods may have various embodiments, variations, and extensions. For example, the method may be performed in different order, certain loop, and different combinations of various design steps. When the stacking effect is considered, all underlying layers are related to CMP simulation and RC extraction of an overlying layer. The IC design method can be properly modified for optimized performance in dealing with the stacking effect.
The disclosed design method includes two level simulations. The first level simulation is based on the IC design layout to generate physical parameters, dimensions, and geometry, such as the gate electrode contour, the active region contour, and/or the channel contour. The first level simulation may implement an existing physical design tool. For example, the channel contour may be generated from SPICE. Another tool is ASTAP developed by IBM (commercially available versions are typified as HSPIC). SPICE may be used to simulate and generate other geometrical dimensions, which are not sensitive to CMP processes. In one example, SPICE may generate a trench width. In another example, SPICE is used to generate all geometrical dimensions in parallel. In another embodiment, the first level simulation includes a manufacturing simulation, such as a lithography process check (LPC). In LPC simulation, a lithography process is simulated for an IC layout contour. Various failure areas, defect areas, or weak areas associated with the manufacturing process, referred to as hotspots, can be identified for further design tuning.
The second level simulation includes simulating the electrical performance of the IC device based on the IC layout contour. The second level simulation may further include extracting electrical parameters. In one embodiment, the second level simulation includes identifying IC layout hotspots based on predefined criteria. In another embodiment, the second simulation includes building a data library such that the data library can be used as a table for future design simulation. When a new IC design layout is in consideration, the IC layout contour is generated from the IC design layout. The effective rectangle is generated accordingly. The simulation results are saved for the corresponding effective rectangle (such as an effective channel). When the effective channel rectangle of a new IC device matches one of the channel layout in the data library, the saved simulated results can be directly applied to the new IC device for design verification, evaluation, inspection, and/or hotspot identification. The second level simulation utilizes the effective rectangle for the IC layout contour. The second level simulation may further include generating maximum rectangle, the length/width correction, and/or length/width sensitivity.
The disclosed method 100 and/or 110 can be implemented in an environment including a computer system having a microprocessor, an input device, a storage device, a display, and a communication device all interconnected by one or more buses. The storage device could be a floppy drive, hard drive, CD-ROM, optical drive, flash memory, or any other form of storage device. The communication device could be a modem, network card, or any other device to enable the computer system to communicate with other nodes. It is understood that any computer system could represent a plurality of interconnected (whether by intranet or Internet) computer systems, including without limitation, personal computers, mainframes, personal digital assistants (PDAs), and cell phones.
A computer system typically includes at least a hardware capable of executing machine readable instructions, as well as the software for executing acts (typically machine-readable instructions) that produce a desired result. In addition, a computer system may include hybrids of hardware and software, as well as computer sub-systems. Combinations of software and hardware could also be used for providing enhanced functionality and performance for certain embodiments of the present disclosure. One example is to directly build software functions into a silicon chip. The system may be designed to work on any specific architecture. For example, the system may be executed on a single computer, local area networks, client-server networks, wide area networks, internets, hand-held, and other portable and wireless devices and networks.
Thus, the present disclosure provides an integrated circuit (IC) designing method. The method includes an integrated circuit (IC) design method comprising providing an IC layout contour based on an IC design layout of an IC device and IC manufacturing data; generating an effective rectangle layout to represent the IC layout contour; and simulating the IC device using the effective rectangular layout.
In one embodiment of the disclosed method, the providing of the IC layout contour includes providing the manufacturing data associated with an IC manufacturing to be implemented to fabricate the IC device; providing the IC design layout of the IC device; and generating the IC layout contour based on the IC design layout and the IC manufacturing data by simulation. The providing of the IC design layout may include adding optical proximity correction (OPC) features to the IC design layout. The generating of the IC layout contour may include providing lithography data associated with a lithography system of the IC manufacturing. The providing of the lithography data may include providing statistical focus data associated with lithography exposure focus of the lithography system; providing statistical energy data associated with lithography exposure dose of the lithography system; and providing statistical mask data of a mask pattern having the IC design layout. In one embodiment, the IC layout contour is associated with a channel region of a metal-oxide-semiconductor field-effect transistor (MOSFET). The IC layout contour includes an overlap region of a gate contour and an active region contour. In another embodiment, the generating of the effective rectangle includes generating a maximum rectangle inside the IC layout contour, wherein the maximum rectangle defines a width and a length; finding a width correction to the maximum rectangle according to dimensional difference between the maximum rectangle and the IC layout contour in a width direction; and finding a length correction to the maximum rectangle according to difference between the maximum rectangle and the IC layout contour in a length direction. The simulating of the IC device may include finding a width sensitivity of the width correction to an electrical parameter of the IC device; and finding a length sensitivity of the length correction to the electrical parameter. The electrical parameter may include a saturation current of the IC device. The finding a width correction may include calculating an average width difference between the maximum rectangle and the IC layout contour in a width direction. The finding a length correction may include calculating an average length difference between the maximum rectangle and the IC layout contour in a length direction.
The present disclosure also includes another embodiment of an integrated circuit (IC) design method. The method includes generating a channel contour of an IC device according to a design layout of the IC device and IC manufacturing data; extracting an effective channel rectangle from the channel contour; and simulating the channel contour of the IC device using the effective channel rectangle. The IC design method may further include extracting an electrical parameter of the IC device from the simulation of the channel contour utilizing the effective channel rectangle.
In one embodiment of the disclosed method, the generating of the channel contour includes simulating a design channel layout based on manufacturing data. In another embodiment, the manufacturing data includes statistical lithography data. The statistical lithography data may include focus data, energy data, and mask data. In another embodiment, the extracting the effective channel rectangle includes finding a maximum channel rectangle inside the channel contour; and extracting a width correction and a length correction to the maximum channel rectangle based on the channel contour.
The present disclosure also includes another embodiment of an integrated circuit (IC) design method. The method includes providing an IC channel design layout of an IC device; generating an IC channel contour based on the IC design layout and IC manufacturing data; generating an effective channel rectangle based on the IC channel contour; and generating an electrical parameter of the IC device based on the effective channel rectangle.
In one embodiment of the disclosed method, the generating of the effective channel rectangle includes generating an maximum channel rectangle inside the IC channel design layout; and finding a width correction and a length correction to the maximum channel rectangle according to the IC channel contour. The method may further include generating a data library of simulation corresponding to various IC channel design layouts.
The foregoing has outlined features of several embodiments so that those skilled in the art may better understand the detailed description that follows. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages of the embodiments disclosed herein. Those skilled in the art should also realize that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they may make various changes, substitutions and alterations herein without departing from the spirit and scope of the present disclosure.
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|16||Tian, Yuxin, et al., "Impact of photolithography and Mask Variability on Interconnect Parasitics," 10 pages.|
|17||Tsuijikawa, Hiroyuki, et al., "Power=Supply Noise Reduction with Design for Manufacturability," IEICE Trans Fundamentals, vol. E88-A, No. 12, Dec. 2005, 8 pages.|
|18||U.S. Appl. No. 12/025,933, filed Feb. 5, 2008 by Francis Ko, Chih-Wei Lai, Kewei Zuo, Henry Lo, Jean Wang, Ping-Hsu Chen, Chun-Hsien Lin, and Chen-Hua Yu for "Novel Methodology to Realize Automatic Virtual Metrology", 23 pages of text, 7 pages of drawings.|
|19||U.S. Appl. No. 12/025,933, filed Feb. 5, 2008 by Francis Ko, Chih-Wei Lai, Kewei Zuo, Henry Lo, Jean Wang, Ping-hsu Chen, Chun-Hsien Lin, and Chen-Hua yu for "Novel Methodology to Realize Automatic Virtual metrology," 23 pages.|
|20||Yue, H. H., et al., "Fault Detection of Plasma Etchers using Optical Emission Spectra," Aug. 2000, IEEE Transactions on Semiconductor Manufacturing, vol. 13, Issue 3, 12 pages.|
|21||Zhou, Ying, et al., "A New Methodology for Interconnect Parasitics Extraction Considering Photo-Lithography Effects," 6 pages.|
|Citing Patent||Filing date||Publication date||Applicant||Title|
|US8453089 *||3 Oct 2011||28 May 2013||Globalfoundries Singapore Pte. Ltd.||Method and apparatus for pattern adjusted timing via pattern matching|
|US8745554||28 Dec 2009||3 Jun 2014||Taiwan Semiconductor Manufacturing Company, Ltd.||Practical approach to layout migration|
|US8806386||25 Nov 2009||12 Aug 2014||Taiwan Semiconductor Manufacturing Company, Ltd.||Customized patterning modulation and optimization|
|US8887106 *||10 Feb 2012||11 Nov 2014||Taiwan Semiconductor Manufacturing Company, Ltd.||Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication process|
|US8949080 *||25 Aug 2010||3 Feb 2015||Taiwan Semiconductor Manufacturing Company, Ltd.||Methods of designing integrated circuits and systems thereof|
|US9087173 *||21 Oct 2010||21 Jul 2015||Taiwan Semiconductor Manufacturing Company, Ltd.||Determining proximity effect parameters for non-rectangular semiconductor structures|
|US9230052||3 Nov 2014||5 Jan 2016||Taiwan Semiconductor Manufacturing Company, Ltd.||Method of generating a simulation model of a predefined fabrication process|
|US9367655 *||10 Apr 2012||14 Jun 2016||Taiwan Semiconductor Manufacturing Company, Ltd.||Topography-aware lithography pattern check|
|US9495507 *||8 Feb 2016||15 Nov 2016||Taiwan Semiconductor Manufacturing Company, Ltd.||Method for integrated circuit mask patterning|
|US20110124193 *||25 Nov 2009||26 May 2011||Taiwan Semiconductor Manufacturing Company, Ltd.||Customized patterning modulation and optimization|
|US20110161907 *||28 Dec 2009||30 Jun 2011||Taiwan Semiconductor Manufacturing Company, Ltd.||Practical Approach to Layout Migration|
|US20110178778 *||21 Oct 2010||21 Jul 2011||Taiwan Semiconductor Manufacturing Company, Ltd.||Determining proximity effect parameters for non-rectangular semiconductor structures|
|US20120053923 *||25 Aug 2010||1 Mar 2012||Taiwan Semiconductor Manufacturing Company, Ltd.||Methods of designing integrated circuits and systems thereof|
|US20120192125 *||20 Jan 2011||26 Jul 2012||International Business Machines Corporation||Correcting and Optimizing Contours for Optical Proximity Correction Modeling|
|US20130174112 *||10 Feb 2012||4 Jul 2013||Taiwan Semiconductor Manufacturing Company, Ltd.||Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication process|
|US20130267047 *||10 Apr 2012||10 Oct 2013||Taiwan Semiconductor Manufacturing Company Ltd.||Topography-Aware Lithography Pattern Check|
|U.S. Classification||16/54, 430/5, 716/55|
|Cooperative Classification||Y02P90/265, G06F2217/12, Y10T16/2771, G06F17/5036|
|30 Oct 2008||AS||Assignment|
Owner name: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHENG, YING-CHOU;LAI, CHIH-MING;LIU, RU-GUN;AND OTHERS;REEL/FRAME:021764/0461;SIGNING DATES FROM 20081013 TO 20081024
Owner name: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.,
Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:CHENG, YING-CHOU;LAI, CHIH-MING;LIU, RU-GUN;AND OTHERS;SIGNING DATES FROM 20081013 TO 20081024;REEL/FRAME:021764/0461
|1 Apr 2015||FPAY||Fee payment|
Year of fee payment: 4


- Filed Under
A week or so before most elections, I try to do a literature sweep of political party headquarters and retrieve fliers and brochures candidates publish to influence voters.
Sometime the effort just goes for posterity's record. Other times, especially when a candidate hasn't particularly stumped for or against issues, I look for what they have to say about themselves.
If nothing else, one can discover which church they attend. That mingling of religion and politics is always included.
This fall, I had to swing by three headquarters: the mainline Democrats at 214 N. Walnut St., the dissident Democrats a few blocks away on High Street, and Republican HQ, 301 W. Main St. Those candidates known as "malcontent" Republicans don't have their own space, though I understand they're not welcome on West Main.
One piece of literature I should have known was available at both Democrat and Republican Headquarters is titled, "STOP, vote NO to Public Question."
That would be the public question, "Shall Delaware County, Indiana [in case you weren't sure which state?] and the city of Muncie, Indiana [not the Muncie in Illinois or Kansas] reorganize as a single political subdivision?"
The one-page handbill expressly says, "Leaders of both Democrat and Republican parties of Delaware County strongly urge all voters to vote no."
One has to stand in awe to realize how much of a threat reorganizing government in Muncie and Delaware County presents to the power brokers and their status quo.
Even as we ponder a little more unity in local government, a lot of voters will be surprised that the county has been splintered lots more than in prior years as far as the Indiana House of Representatives goes.
Delaware County (Indiana) is partially in four House districts (formerly we were part of two), and wholly comprises one district.
If you didn't vote in the primary election - as 80 percent of registered voters did not do, but since the registered voter number is spurious, let's project that merely two-thirds of all eligible voters did not vote in the primary - you may be surprised at who your choices are for that statehouse chamber.
Washington Township voters, including those in Gaston, have none at all.
No Democrat ran in District 32, nor did the party select one, so Republican P. Eric Turner will return to the House he's served in for 20 years, albeit his constituents will have changed significantly as his district was flattened and spread westward.
All of Union Township - due north of Muncie surrounding the town of Eaton - and three-fourths of Hamilton Township are now the southern tip of District 31, which includes Blackford County, a third of Grant County and a couple of Wells County townships.
Former Blackford County Sheriff Kevin Mahan, a Republican, is the incumbent. His brochure quotes Mahan as saying, "Our work is far from over." Former dental assistant, now stay-at-home mother Katie Morgan, a Democrat who serves on Marion's school board, opposes him.
The other three districts Delaware County's part of or wholly comprising have also changed a lot, but two only minimally inside this county.
Not so District 35. Formerly the district, represented by Republican Jack Lutz, included six Delaware County townships and part of two others. Now the district includes Salem, Mount Pleasant and Harrison townships, plus one precinct in Hamilton and one in Center townships, the latter the southwest corner.
What used to be parts of three other counties partly in the district now is centralized completely in Madison County's rural areas.
Lutz faces Daleville schoolteacher Melanie Wright, a Democrat who lives in Yorktown.
I don't know if the once-safe GOP district may be more competitive now, but that would explain the plethora of radio spots I hear with Republican gubernatorial candidate Mike Pence shilling for Lutz' re-election.
District 33 changed little: now all of Jay and Randolph counties (formerly included only half of the latter) and the four townships on Delaware County's eastern border plus Monroe Township.
Most of the Delaware County territory also was in the former district, though some precincts in Center Township were lost and Monroe Township wasn't previously in.
The district will see a repeat of the 2008 race, with incumbent Republican Bill Davis, a retired businessman, facing school administrator Any Schemenaur, who lost that year by 1,500 votes out of 24,000 cast.
That brings us to District 34 - Muncie Mayor Dennis Tyler's former district .
Former Democrat State Sen. Sue Errington, a dissident who beat her party leaders' candidate in the spring, faces Indiana Wesleyan University administrator Brad Oliver, selected by his party after no Republican ran in the primary.
Larry Riley teaches English at Ball State University. Email him at email@example.com.


I have the need to drive 8 stepper motor together and with different motion behavior for each. Could I just get away with 8 stepper control board (easy driver) + an Arduino with enough pin to get the STEP/DIR from each driver and orchestrate all those motor with a nice code.
Or is there more thing to take in consideration ? More advance driver, or more powerful uC ?
Thanks in advance for any tips/suggestions.


text:
9. Nelson Asaytono
Asaytono wasn’t exactly what one would call a fan favorite. When he left Purefoods in 1991, he immediately took the role as the top kontrabida in Yeng Guiao’s villainous Swift teams (the same role Enrico Villanueva later played at Red Bull). In 1992, he led the league in statistics, but the MVP went to the underdog candidate, San Miguel’s Ato Agustin. No one wanted to vote for the kontrabida.
Years later, Asaytono and Agustin would switch places — literally. They were traded for each other in 1996, and The Bull had a monster season for the Beermen in 1997, but was defeated by Purefoods’ Alvin Patrimonio for the MVP award. (Patrimonio led his team to a title, and Asaytono did not.)

domain: history


TheRaindog writes "AMD has bolstered its dual-core processor lineup with a more affordable dual-core Athlon 64 X2 3800+ that will sell for only $354. Despite its comparatively low 2.0GHz clock speed and only 512KB of L2 cache per core, the X2 3800+ is often faster than Intel's fastest dual-core chips, including the $999 Pentium Extreme Edition 840. The new X2's incredibly low power consumption is also impressive, especially when compared with that of power-hungry Pentium D processors that consume 50-90% more power under load."
"Probably the best operating system in the world is the [operating system]
made for the PDP-11 by Bell Laboratories." - Ted Nelson, October 1977


text:
L'Épicrien Black Cherry Confi 4.4ozt
This confit is perfect with sheep cheese on a toasted baguette or use it as a topping on cheesecake or ice cream.
With its homemade style of production, L'Épicurien has carried out a cooking process that makes all its preparations slowly simmer in cauldrons. The deep and rich colors of fruits or vegetables, together with their delicate flavors, are deliciously revealed. From sweet to savory and everywhere in between, L’Épicurien produces a wide array of confits, jams, and spreads for any occasion.


text:
You are viewing
Wedding Videographers in Park Ridge, IL
It's the end of your wedding day. As you look back and recall the day, you realize it was all a blur of friends, family, and good times. What about all the time you spent planning for that day, though? Wouldn't you rather relive it over and over instead of just having those blurry memories? Well you can if you book a videographer! The videographer will be there for the whole day from the bride getting ready with her bridesmaids until the last guest leaves the reception. Book one of these fantastic videographers to capture your big day! Search for Wedding Videographers in Park Ridge, Illinois above.
Please note that these Wedding Videographers may also travel to Rosemont, Norridge, Harwood Heights, Amf Ohare, Golf, Schiller Park, Lincolnwood, River Grove, Northfield, Northlake, Techny, Winnetka, Stone Park, Wood Dale, River Forest, Kenilworth, Glencoe, Berkeley, Itasca, Hillside, Broadview, Hines, Riverwoods, Medinah, North Riverside, Riverside, La Grange Park, Bannockburn, Oakbrook Terrace, and Lincolnshire.

domain: geography


text:
Bride's Head Revisited offers a wide selection of veils, from Cage veils to Cathedral length. Each veil is hand sewn and made-to-order. We will happily customize to any length or style, and all of our designs can be accented with the finest materials such as French lace, crystals, silk ribbon, and beaded embroidery. The one constant is the quality and care that we devote to each piece.
Please note: our website shows only a selection of our extensive collection. If you don't see what you're looking for, please contact us or contact one of our retailers.
This page is under construction. Thank you for your patience.

domain: design


It might seem a little late for Lamborghini to present its most recent production car, the Huracán, until now. Although the reason for such a delay wasn’t announced, the first LP610-4 badged cars have already made it to México and are being either prepared for delivery or enjoyed by customers already.
For the official presentation, Lamborghini de México gathered both the proud owners of the cars and some of their most appreciated customers to the Centro Dinámico Pegaso track, where they could drive their own cars and get to know them better, or test the demo Huracán in a controlled and safe environment. There’s not much more left to say about the car or the way it drives, when everything has already been said in our in depht review.
It is said that everyone had a great time during the day, even though it rained later on, which was no problem for the four wheel drive Lambos. Both Ferrari and Aston Martin were present, you might think that getting delivery of your 340 km/h Huracán is crazy enough, but there are some clients who decided to arrive in a Ferrari just to make things a tad more interesting.
Nonetheless it wasn’t the Huracán nor the 50° Anniversario Aventador that caught the eye of those who attended, but the utter beauty of the girls that represented the brand.
Once you’ve seen the gallery, tell us what you think. Do you believe that a true car enthusiast should focus on the Lambos instead of the girls, as someone told us on Instagram? Share the post with your friends and let us know!


text:
The new partnership will support agents and growers with integrated farm risk management platform FarmCommand
Farmers Edge, a provider of digital agriculture solutions, has partnered with Ohio Valley Insurance to transform the way it offers insurance services to farmers.
Through the partnership, Ohio Valley Insurance is expected to deliver insurance services supported by a data-driven model.
Established in 2003, Ohio Valley Insurance is based in Kentucky and operates across neighbouring states such as Indiana, Illinois, Tennessee and Missouri, offering crop insurance to farmers cultivating diverse crops such as barley, corn, soybean, sorghum, tobacco and wheat.
Farmers Edge will equip the insurance agency with FarmCommand, an integrated farm risk management platform, for automated acreage reporting, streamlining and accelerating claims processing and to match growers risk with the right risk mitigation plan.
FarmCommand has a suite of digital tools for enhanced data management for growers, offering them the option to seamlessly share information to automate insurance processes.
The platform can also combine field-level data, remote sensing, and AI-driven models, offering a unique set of imagery-derived maps, precise predictive crop models and automatic crop health change detection for optimised crop production and monitoring of fields from anywhere.
Ohio Valley Insurance owner and crop agent Allan Murray said: “Through this partnership with Farmers Edge, we are digitising our core services to create a stronger, more meaningful connection with our crop insurance customers that shows we truly care about the success of their farms.
“Additionally, automating insurance paperwork unleashes tremendous efficiency, and by gaining unprecedented intelligence about our growers’ farming operations, we can make data-driven risk management decisions that best protect our clients as well as our portfolios. Everyone wins in this new digital model.”
Farmers Edge CEO and co-founder Wade Barnes said: “With roughly two million farms in the United States, insurance companies are rapidly adopting digital tools to create a unique customer experience that is faster, more efficient, and fundamentally smarter.
“Because crop insurance rates are set by the federal government in the United States, offering distinctive, disruptive services is the key to long-term success for insurance companies. Through this new alliance, Ohio Valley Insurance is futureproofing its business with a flexible, scalable model geared toward providing value-added services and outcomes.”
In January this year, American Crop Insurance partnered with Farmers Edge to offer data-driven insurance services and personalised cover for farmers.

domain: finance


Welcome to our web site!
- PS-Tronic s.r.o.
is a company handling with applications of information technologies.
Our activities are realisation of IT systems and providing of service
care of computer systems.
- We are sorry
but no more pages are available in english at the moment. We work hard to
- For more information please write or call us:


text:
The major averages ended little changed Thursday as investors awaited the Labor Department's key jobs report.
The Nasdaq slipped 0.2%, while the Dow Jones industrial average lost 0.1%. The S&P 500 edged up a fraction. Volume fell 4% on the NYSE and 5% on the Nasdaq compared to Wednesday, according to preliminary data.
In the stock market today, airline stocks got a boost after JP Morgan issued an upbeat report on the sector.
Elsewhere, home furnishings retailer Bed Bath & Beyond (BBBY) crashed 12% in massive volume after a disappointing earnings report. Profit for the latest quarter rose a less-than-expected 9% from a year earlier to $1.12 a share. The stock crashed through both its 50-day and 200-day lines.
After the close, shares of Alcoa (AA) fell 4% after hours after the aluminum producer reported disappointing quarterly earnings. The stock is back above its 10-week line as it works on the right side of a long cup-shaped base.
The December jobs report will be released Friday at 8:30 a.m. ET. Economists expect nonfarm payrolls to increase 200,000, with the unemployment rate holding steady at 7%.


Bajaj Dominar 250 Rolon Brass Chain & Sprocket Kit
A Rolon Brass chain & Sprocket kit is a set of motorcycle chain and sprockets manufactured by the Indian company Rolon. The kit includes a high-quality brass chain and a set of matching sprockets, which are designed to work together to provide smooth and reliable power transmission.
The chain in the kit is made of high-strength steel and features brass-plated rollers and pins for enhanced durability and corrosion resistance. The sprockets are precision machined from high-quality steel and are designed to match the pitch and tooth count of the chain for optimal performance.
Installing a new chain and sprocket kit can improve the performance and reliability of your motorcycle's drivetrain. Over time, the chain and sprockets on a motorcycle can wear out, leading to decreased performance and potential safety issues. A new kit can help restore power and performance, and improve the overall lifespan of your motorcycle's drivetrain.
It is important to select the appropriate chain and sprocket kit for your specific make and model of motorcycle, and to follow all manufacturer instructions and safety guidelines when installing the new components. Additionally, proper maintenance and lubrication of the chain and sprockets is essential to ensure continued performance and reliability.
* Front Sprocket- 14 Teeth
*Rear Sprocket- 46 Teeth
*120 Link Chain
*Chain type: X ring (6 Holes)
Why Do Customers Love To Purchase From Us?
👉 Go The Extra Mile To Serve Our Customers. We Provide Add More Value Than They Anticipate.
👉 We Provide The Best Solutions Since We Are Aware Of Our Customers’ Needs.
👉 Customer Satisfaction Is Our Main Priority, As Thousands Of Our Clients Attest To.
👉 At The Htrz Modz, We Never Compromise On Quality. We Provide The Highest Quality Products At Unbeatable Pricing.
👉 The Htrz Modz Is Dedicated To Providing High-Quality And World-Class Products And Services In Two Wheeler Industry.


text:
We would like to invite you to participate in the “Implementation of Smart City Projects in the Mediterranean Region” meeting, organized by the European Investment Bank (EIB) with the collaboration of the Polytechnic University of Madrid (UPM), Center for Mediterranean Integration (CMI) and the Urban Agency of Zenata (SAZ) on 10-11 October 2016 in Casablanca, Morocco.
The EIB is one of the main financial and technical supporters to Smart City projects that contribute to economic development through programs like ELENA or ASCIMER (EIB’s Institute EIBURS project) itself, and its lending priorities are focused on the development of urban areas by encouraging integrated planning and management solutions.
The event will consist of a set of lectures on the topic, the presentation of good practices in Smart Initiatives in the Region, a workshop on implementation and governance issues and a site visit to Zenata project, one of the EIB’s flagship projects in sustainable urban development in the FEMIP Region.
With this aim, I would like to propose you to participate as a speaker in one of the sessions of the Program. The organizer will take care of the travel and accommodation expenses of the speakers whereas participants will cover their own expenses. I kindly ask you to send me a confirmation if you are willing to participate as soon as possible.
Please don’t hesitate to contact with Randa AL SABBAGH if you need any other information. email@example.com