This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_group_id\n\t.type\t__ockl_get_group_id,@function\n__ockl_get_group_id: ; @__ockl_get_group_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s14, 0\n\tv_writelane_b32 v2, s13, 1\n\tv_writelane_b32 v2, s12, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n; %bb.1:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n\ts_branch .LBB10_9\n.LBB10_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 6\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 7\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_12\n; %bb.6:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB10_12\n.LBB10_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 8\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_11\n; %bb.8:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB10_11\n.LBB10_9:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n.LBB10_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB10_7\n.LBB10_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB10_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_group_id, .Lfunc_end10-__ockl_get_group_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 988\n; NumSgprs: 33\n; NumVgprs: 3\n; ScratchSize: 40\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_size\n\t.type\t__ockl_get_local_size,@function\n__ockl_get_local_size: ; @__ockl_get_local_size\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s32 offset:104 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr4 : SGPR spill to VGPR lane\n\tv_writelane_b32 v4, s14, 0\n\tv_writelane_b32 v4, s13, 1\n\tv_writelane_b32 v4, s12, 2\n\tv_writelane_b32 v4, s8, 3\n\tv_writelane_b32 v4, s9, 4\n\tv_writelane_b32 v4, s4, 5\n\tv_writelane_b32 v4, s5, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_10\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_20\n\ts_branch .LBB11_15\n.LBB11_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 7\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 10\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 11\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_24\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 12\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_9\n.LBB11_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 12\n\tscratch_load_b64 v[0:1], off, s32 offset:48 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_23\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 2\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_load_b32 s0, s[2:3], 0xc\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_branch .LBB11_23\n.LBB11_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 2\n\ts_load_b32 s3, s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 18\n\ts_mov_b32 s2, 12\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_7\n.LBB11_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 8\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_22\n; %bb.11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_14\n.LBB11_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 14\n\tscratch_load_b64 v[0:1], off, s32 offset:72 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_21\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 1\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_load_b32 s0, s[2:3], 0x10\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_branch .LBB11_21\n.LBB11_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 1\n\ts_load_b32 s3, s[0:1], 0x4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 20\n\ts_mov_b32 s2, 14\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_12\n.LBB11_15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 15\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_18\n.LBB11_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 15\n\tscratch_load_b64 v[0:1], off, s32 offset:88 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_19\n; %bb.17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 0\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_load_b32 s0, s[2:3], 0x14\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_branch .LBB11_19\n.LBB11_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 0\n\ts_load_b32 s3, s[0:1], 0x8\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 22\n\ts_mov_b32 s2, 16\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 15\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_16\n.LBB11_19:\n\tscratch_load_b64 v[0:1], off, s32 offset:96 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n.LBB11_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 9\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:24 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_branch .LBB11_10\n.LBB11_21:\n\tscratch_load_b64 v[0:1], off, s32 offset:80 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n.LBB11_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:64 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_branch .LBB11_4\n.LBB11_23:\n\tscratch_load_b64 v[0:1], off, s32 offset:56 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n.LBB11_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:40 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n.LBB11_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[2:3], off, s32 offset:32 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s32 offset:104 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end11:\n\t.size\t__ockl_get_local_size, .Lfunc_end11-__ockl_get_local_size\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2384\n; NumSgprs: 35\n; NumVgprs: 5\n; ScratchSize: 112\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_10\n\ts_branch .LBB12_9\n.LBB12_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB12_12\n.LBB12_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB12_11\n.LBB12_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB12_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB12_7\n.LBB12_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB12_4\n.LBB12_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB12_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end12:\n\t.size\t__ockl_get_local_id, .Lfunc_end12-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z13infomapKernelPiS_Pf ; -- Begin function _Z13infomapKernelPiS_Pf\n\t.globl\t_Z13infomapKernelPiS_Pf\n\t.p2align\t8\n\t.type\t_Z13infomapKernelPiS_Pf,@function\n_Z13infomapKernelPiS_Pf: ; @_Z13infomapKernelPiS_Pf\n; %bb.0:\n\ts_mov_b32 s32, 0x80\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_writelane_b32 v10, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v10, 0\n\tv_writelane_b32 v10, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v10, 1\n\tv_writelane_b32 v10, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v10, s10, 3\n\tv_writelane_b32 v10, s11, 4\n\tv_writelane_b32 v10, s2, 5\n\tv_writelane_b32 v10, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v10, 5\n\tv_readlane_b32 s1, v10, 6\n\tv_writelane_b32 v10, s4, 7\n\tv_writelane_b32 v10, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:116 ; 4-byte Folded Spill\n\ts_load_b64 s[26:27], s[0:1], 0x0\n\ts_load_b64 s[22:23], s[0:1], 0x8\n\ts_load_b64 s[18:19], s[0:1], 0x10\n\ts_mov_b64 s[2:3], src_private_base\n\ts_mov_b32 s6, 32\n\tv_writelane_b32 v10, s6, 9\n\ts_lshr_b64 s[2:3], s[2:3], s6\n\ts_mov_b32 s15, s2\n\tv_writelane_b32 v10, s15, 10\n\ts_mov_b32 s24, 32\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s15\n\ts_mov_b32 s20, 40\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s15\n\ts_mov_b32 s16, 48\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s15\n\ts_mov_b32 s8, 56\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s15\n\ts_mov_b64 s[2:3], s[8:9]\n\tv_writelane_b32 v10, s2, 11\n\tv_writelane_b32 v10, s3, 12\n\ts_mov_b32 s6, 64\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s15\n\ts_mov_b64 s[2:3], s[6:7]\n\tv_writelane_b32 v10, s2, 13\n\tv_writelane_b32 v10, s3, 14\n\ts_mov_b32 s2, 0x48\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s15\n\ts_mov_b64 s[28:29], s[2:3]\n\tv_writelane_b32 v10, s28, 15\n\tv_writelane_b32 v10, s29, 16\n\ts_mov_b32 s28, 0x50\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s15\n\tv_writelane_b32 v10, s28, 17\n\tv_writelane_b32 v10, s29, 18\n\tv_writelane_b32 v10, s28, 19\n\tv_writelane_b32 v10, s29, 20\n\ts_mov_b32 s28, 0x54\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s15\n\tv_writelane_b32 v10, s28, 21\n\tv_writelane_b32 v10, s29, 22\n\ts_mov_b32 s28, 0x58\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s15\n\tv_writelane_b32 v10, s28, 23\n\tv_writelane_b32 v10, s29, 24\n\ts_mov_b32 s28, 0x5c\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s15\n\tv_writelane_b32 v10, s28, 25\n\tv_writelane_b32 v10, s29, 26\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tv_mov_b32_e32 v2, s18\n\tv_mov_b32_e32 v3, s19\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v10, s8, 27\n\tv_writelane_b32 v10, s9, 28\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, off offset:112 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:116 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s8, v10, 27\n\tv_readlane_b32 s9, v10, 28\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:120 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:104 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:116 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_readlane_b32 s8, v10, 27\n\tv_readlane_b32 s9, v10, 28\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:108 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:104 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v10, 17\n\tv_readlane_b32 s3, v10, 18\n\tv_readlane_b32 s0, v10, 9\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v10, s1, 29\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:96 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_3\n\ts_branch .LBB13_2\n.LBB13_1:\n\ts_branch .LBB13_15\n.LBB13_2:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 25\n\tv_readlane_b32 s1, v10, 26\n\tv_readlane_b32 s2, v10, 23\n\tv_readlane_b32 s3, v10, 24\n\tv_readlane_b32 s4, v10, 19\n\tv_readlane_b32 s5, v10, 20\n\tv_readlane_b32 s6, v10, 15\n\tv_readlane_b32 s7, v10, 16\n\tv_readlane_b32 s8, v10, 21\n\tv_readlane_b32 s9, v10, 22\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s4, 2\n\tv_lshlrev_b64 v[4:5], s4, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s4, v0, v3\n\tv_add_co_ci_u32_e64 v2, s4, v1, v2, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, 0\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v10, s0, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:96 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_branch .LBB13_4\n.LBB13_3:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 29\n\ts_or_saveexec_b32 s0, s0\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v10, s0, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:96 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB13_15\n\ts_branch .LBB13_1\n.LBB13_4: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v9, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v9, 25\n\tv_readlane_b32 s3, v9, 26\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v10, 0\n\tv_readlane_b32 s1, v9, 30\n\tv_writelane_b32 v10, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 32\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 2\n\tv_writelane_b32 v10, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 4\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:100 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_10\n; %bb.5: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v9, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v9, 25\n\tv_readlane_b32 s1, v9, 26\n\tv_readlane_b32 s2, v9, 19\n\tv_readlane_b32 s3, v9, 20\n\tv_readlane_b32 s4, v9, 11\n\tv_readlane_b32 s5, v9, 12\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v0, v[3:4]\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b32 v3, v[3:4]\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshl_add_u32 v3, v0, s0, v3\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 5\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:100 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_8\n; %bb.6: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v9, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v9, 23\n\tv_readlane_b32 s1, v9, 24\n\tv_readlane_b32 s2, v9, 25\n\tv_readlane_b32 s3, v9, 26\n\tv_readlane_b32 s4, v9, 15\n\tv_readlane_b32 s5, v9, 16\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s2, 2\n\tv_lshlrev_b64 v[4:5], s2, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s2, v0, v3\n\tv_add_co_ci_u32_e64 v2, s2, v1, v2, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_gt_f32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 6\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:100 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_9\n; %bb.7: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 21\n\tv_readlane_b32 s1, v10, 22\n\tv_readlane_b32 s2, v10, 25\n\tv_readlane_b32 s3, v10, 26\n\tv_readlane_b32 s4, v10, 23\n\tv_readlane_b32 s5, v10, 24\n\tv_readlane_b32 s6, v10, 15\n\tv_readlane_b32 s7, v10, 16\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s6, 2\n\tv_lshlrev_b64 v[4:5], s6, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s6, v0, v3\n\tv_add_co_ci_u32_e64 v2, s6, v1, v2, s6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB13_9\n.LBB13_8: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB13_11\n.LBB13_9: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB13_8\n.LBB13_10: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v10, 1\n\tv_readlane_b32 s1, v10, 3\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v9, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v10, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v9, s1, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v9, off offset:96 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 7\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:100 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB13_4\n\ts_branch .LBB13_13\n.LBB13_11: ; in Loop: Header=BB13_4 Depth=1\n; %bb.12: ; in Loop: Header=BB13_4 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v9, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 2\n\tv_readlane_b32 s2, v9, 25\n\tv_readlane_b32 s3, v9, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 3\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:100 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_branch .LBB13_10\n.LBB13_13:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:100 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.14:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v10, 19\n\tv_readlane_b32 s3, v10, 20\n\tv_readlane_b32 s0, v10, 21\n\tv_readlane_b32 s1, v10, 22\n\tv_readlane_b32 s4, v10, 13\n\tv_readlane_b32 s5, v10, 14\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[7:8], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v2, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[4:5], s0, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s1, v0, v3\n\tv_add_co_ci_u32_e64 v2, s1, v1, v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tv_lshlrev_b64 v[5:6], s0, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s0, v0, v4\n\tv_add_co_ci_u32_e64 v3, s0, v1, v3, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB13_3\n.LBB13_15:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:96 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z13infomapKernelPiS_Pf\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 240\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 34\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end13:\n\t.size\t_Z13infomapKernelPiS_Pf, .Lfunc_end13-_Z13infomapKernelPiS_Pf\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 3184\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 240\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 36\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tblockIdx\n\t.protected\tblockDim\n\t.protected\tthreadIdx\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tblockIdx\n\t.weak\tblockDim\n\t.weak\tthreadIdx\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 104\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 112\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 120\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 128\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 224\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z13infomapKernelPiS_Pf\n .private_segment_fixed_size: 240\n .sgpr_count: 36\n .sgpr_spill_count: 42\n .symbol: _Z13infomapKernelPiS_Pf.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 14\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":72,"cells":{"id":{"kind":"string","value":"a38198465c27ca17f3a7d8a2eea96dd4616be2aa_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18medianFilterKernelPhS_ii --------------------------\n .section .text._Z18medianFilterKernelPhS_ii,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=46\"\n .align 128\n\n\n\n\n .global _Z18medianFilterKernelPhS_ii\n .type _Z18medianFilterKernelPhS_ii,@function\n .size _Z18medianFilterKernelPhS_ii,(.L_x_34 - _Z18medianFilterKernelPhS_ii)\n .other _Z18medianFilterKernelPhS_ii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18medianFilterKernelPhS_ii:\n.text._Z18medianFilterKernelPhS_ii:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ IADD3 R1, R1, -0x28, RZ ;\n /*0020*/ S2R R0, SR_LMEMHIOFF ;\n /*0030*/ ISETP.GE.U32.AND P0, PT, R1, R0, PT ;\n /*0040*/ @P0 BRA `(.L_x_0) ;\n /*0050*/ BPT.TRAP 0x1 ;\n.L_x_0:\n /*0060*/ MOV R22, c[0x0][0x118] ;\n /*0070*/ MOV R23, c[0x0][0x11c] ;\n /*0080*/ IADD3 R0, R1, RZ, RZ ;\n /*0090*/ MOV R0, R0 ;\n /*00a0*/ MOV R2, R0 ;\n /*00b0*/ MOV R3, RZ ;\n /*00c0*/ MOV R27, R2 ;\n /*00d0*/ MOV R28, R3 ;\n /*00e0*/ MOV R27, R27 ;\n /*00f0*/ MOV R28, R28 ;\n /*0100*/ MOV R2, RZ ;\n /*0110*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0120*/ MOV R5, R2 ;\n /*0130*/ MOV R6, R3 ;\n /*0140*/ MOV R5, R5 ;\n /*0150*/ MOV R6, R6 ;\n /*0160*/ MOV R2, 0x8 ;\n /*0170*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0180*/ MOV R0, R2 ;\n /*0190*/ MOV R2, R3 ;\n /*01a0*/ MOV R0, R0 ;\n /*01b0*/ MOV R2, R2 ;\n /*01c0*/ MOV R3, 0x10 ;\n /*01d0*/ LDC R3, c[0x0][R3+0x160] ;\n /*01e0*/ MOV R3, R3 ;\n /*01f0*/ MOV R4, 0x14 ;\n /*0200*/ LDC R4, c[0x0][R4+0x160] ;\n /*0210*/ MOV R4, R4 ;\n /*0220*/ MOV R5, R5 ;\n /*0230*/ MOV R6, R6 ;\n /*0240*/ IADD3 R7, P0, R27, RZ, RZ ;\n /*0250*/ IADD3.X R8, R28, RZ, RZ, P0, !PT ;\n /*0260*/ IADD3 R9, P0, R27, 0x4, RZ ;\n /*0270*/ IADD3.X R10, R28, RZ, RZ, P0, !PT ;\n /*0280*/ IADD3 R11, P0, R27, 0x8, RZ ;\n /*0290*/ IADD3.X R12, R28, RZ, RZ, P0, !PT ;\n /*02a0*/ IADD3 R13, P0, R27, 0xc, RZ ;\n /*02b0*/ IADD3.X R14, R28, RZ, RZ, P0, !PT ;\n /*02c0*/ IADD3 R15, P0, R27, 0x10, RZ ;\n /*02d0*/ IADD3.X R16, R28, RZ, RZ, P0, !PT ;\n /*02e0*/ IADD3 R17, P0, R27, 0x14, RZ ;\n /*02f0*/ IADD3.X R18, R28, RZ, RZ, P0, !PT ;\n /*0300*/ IADD3 R19, P0, R27, 0x18, RZ ;\n /*0310*/ IADD3.X R20, R28, RZ, RZ, P0, !PT ;\n /*0320*/ IADD3 R21, P0, R27, 0x1c, RZ ;\n /*0330*/ IADD3.X R26, R28, RZ, RZ, P0, !PT ;\n /*0340*/ IADD3 R27, P0, R27, 0x20, RZ ;\n /*0350*/ IADD3.X R28, R28, RZ, RZ, P0, !PT ;\n /*0360*/ MOV R29, c[0x0][0x0] ;\n /*0370*/ S2R R31, SR_CTAID.X ;\n /*0380*/ MOV R31, R31 ;\n /*0390*/ S2R R30, SR_TID.X ;\n /*03a0*/ MOV R30, R30 ;\n /*03b0*/ IMAD R31, R31, R29, R30 ;\n /*03c0*/ MOV R32, c[0x0][0x4] ;\n /*03d0*/ S2R R34, SR_CTAID.Y ;\n /*03e0*/ MOV R34, R34 ;\n /*03f0*/ S2R R33, SR_TID.Y ;\n /*0400*/ MOV R33, R33 ;\n /*0410*/ IMAD R34, R34, R32, R33 ;\n /*0420*/ ISETP.LT.AND P0, PT, R31, R3, PT ;\n /*0430*/ ISETP.LT.AND P1, PT, R34, R4, PT ;\n /*0440*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x80, 0x0 ;\n /*0450*/ IMAD R36, R33, 0x12, R30 ;\n /*0460*/ MOV R35, RZ ;\n /*0470*/ IADD3 R36, R35, R36, RZ ;\n /*0480*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x0 ;\n /*0490*/ MOV R0, R0 ;\n /*04a0*/ MOV R2, R2 ;\n /*04b0*/ MOV R3, R3 ;\n /*04c0*/ MOV R4, R4 ;\n /*04d0*/ MOV R5, R5 ;\n /*04e0*/ MOV R6, R6 ;\n /*04f0*/ MOV R7, R7 ;\n /*0500*/ MOV R8, R8 ;\n /*0510*/ MOV R9, R9 ;\n /*0520*/ MOV R10, R10 ;\n /*0530*/ MOV R11, R11 ;\n /*0540*/ MOV R12, R12 ;\n /*0550*/ MOV R13, R13 ;\n /*0560*/ MOV R14, R14 ;\n /*0570*/ MOV R15, R15 ;\n /*0580*/ MOV R16, R16 ;\n /*0590*/ MOV R17, R17 ;\n /*05a0*/ MOV R18, R18 ;\n /*05b0*/ MOV R19, R19 ;\n /*05c0*/ MOV R20, R20 ;\n /*05d0*/ MOV R21, R21 ;\n /*05e0*/ MOV R26, R26 ;\n /*05f0*/ MOV R27, R27 ;\n /*0600*/ MOV R28, R28 ;\n /*0610*/ MOV R29, R29 ;\n /*0620*/ MOV R30, R30 ;\n /*0630*/ MOV R31, R31 ;\n /*0640*/ MOV R32, R32 ;\n /*0650*/ MOV R33, R33 ;\n /*0660*/ MOV R34, R34 ;\n /*0670*/ MOV R35, R35 ;\n /*0680*/ MOV R36, R36 ;\n /*0690*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*06a0*/ P2R R41, PR, RZ, 0x1 ;\n /*06b0*/ @P0 BRA `(.L_x_1) ;\n /*06c0*/ IMAD R37, R34, R3, R31 ;\n /*06d0*/ MOV R24, R37 ;\n /*06e0*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ;\n /*06f0*/ MOV R24, R24 ;\n /*0700*/ MOV R25, R25 ;\n /*0710*/ MOV R38, R24 ;\n /*0720*/ MOV R39, R25 ;\n /*0730*/ MOV R38, R38 ;\n /*0740*/ MOV R39, R39 ;\n /*0750*/ IADD3 R38, P0, R5, R38, RZ ;\n /*0760*/ IADD3.X R39, R6, R39, RZ, P0, !PT ;\n /*0770*/ MOV R24, R38 ;\n /*0780*/ MOV R25, R39 ;\n /*0790*/ MOV R24, R24 ;\n /*07a0*/ MOV R25, R25 ;\n /*07b0*/ R2UR UR4, R22 ;\n /*07c0*/ R2UR UR5, R23 ;\n /*07d0*/ LDG.E.U8 R24, [R24.64] ;\n /*07e0*/ PRMT R24, R24, 0x7770, RZ ;\n /*07f0*/ PRMT R25, R24, 0x7710, RZ ;\n /*0800*/ IMAD R24, R33, 0x12, RZ ;\n /*0810*/ IADD3 R40, R36, 0x13, RZ ;\n /*0820*/ MOV R40, R40 ;\n /*0830*/ MOV R25, R25 ;\n /*0840*/ STS.U8 [R40], R25 ;\n /*0850*/ ISETP.LT.AND P0, PT, R31, 0x1, PT ;\n /*0860*/ ISETP.NE.AND P1, PT, R30, RZ, PT ;\n /*0870*/ PLOP3.LUT P2, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*0880*/ MOV R37, R37 ;\n /*0890*/ MOV R38, R38 ;\n /*08a0*/ MOV R39, R39 ;\n /*08b0*/ MOV R42, R24 ;\n /*08c0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*08d0*/ PLOP3.LUT P1, PT, P1, PT, PT, 0x80, 0x0 ;\n /*08e0*/ P2R R40, PR, RZ, 0x2 ;\n /*08f0*/ BSSY B0, `(.L_x_2) ;\n /*0900*/ @P2 BRA `(.L_x_3) ;\n /*0910*/ IADD3 R24, P1, R38, -0x1, RZ ;\n /*0920*/ IADD3.X R25, R39, -0x1, RZ, P1, !PT ;\n /*0930*/ MOV R24, R24 ;\n /*0940*/ MOV R25, R25 ;\n /*0950*/ MOV R24, R24 ;\n /*0960*/ MOV R25, R25 ;\n /*0970*/ R2UR UR4, R22 ;\n /*0980*/ R2UR UR5, R23 ;\n /*0990*/ LDG.E.U8 R24, [R24.64] ;\n /*09a0*/ PRMT R24, R24, 0x7770, RZ ;\n /*09b0*/ PRMT R24, R24, 0x7710, RZ ;\n /*09c0*/ IADD3 R25, R35, R42, RZ ;\n /*09d0*/ IADD3 R25, R25, 0x12, RZ ;\n /*09e0*/ MOV R25, R25 ;\n /*09f0*/ MOV R24, R24 ;\n /*0a00*/ STS.U8 [R25], R24 ;\n.L_x_3:\n /*0a10*/ BSYNC B0 ;\n.L_x_2:\n /*0a20*/ IADD3 R24, R29, -0x1, RZ ;\n /*0a30*/ ISETP.NE.AND P1, PT, R30, R24, PT ;\n /*0a40*/ IADD3 R24, R3, -0x1, RZ ;\n /*0a50*/ ISETP.GE.AND P2, PT, R31, R24, PT ;\n /*0a60*/ PLOP3.LUT P3, PT, P1, P2, PT, 0xa8, 0x0 ;\n /*0a70*/ PLOP3.LUT P1, PT, P1, PT, PT, 0x80, 0x0 ;\n /*0a80*/ PLOP3.LUT P2, PT, P2, PT, PT, 0x80, 0x0 ;\n /*0a90*/ BSSY B0, `(.L_x_4) ;\n /*0aa0*/ @P3 BRA `(.L_x_5) ;\n /*0ab0*/ IADD3 R24, P3, R38, 0x1, RZ ;\n /*0ac0*/ IADD3.X R25, R39, RZ, RZ, P3, !PT ;\n /*0ad0*/ MOV R24, R24 ;\n /*0ae0*/ MOV R25, R25 ;\n /*0af0*/ MOV R24, R24 ;\n /*0b00*/ MOV R25, R25 ;\n /*0b10*/ R2UR UR4, R22 ;\n /*0b20*/ R2UR UR5, R23 ;\n /*0b30*/ LDG.E.U8 R24, [R24.64] ;\n /*0b40*/ PRMT R24, R24, 0x7770, RZ ;\n /*0b50*/ PRMT R24, R24, 0x7710, RZ ;\n /*0b60*/ IADD3 R42, R29, R42, RZ ;\n /*0b70*/ IADD3 R42, R35, R42, RZ ;\n /*0b80*/ IADD3 R42, R42, 0x14, RZ ;\n /*0b90*/ MOV R42, R42 ;\n /*0ba0*/ MOV R24, R24 ;\n /*0bb0*/ STS.U8 [R42], R24 ;\n.L_x_5:\n /*0bc0*/ BSYNC B0 ;\n.L_x_4:\n /*0bd0*/ ISETP.NE.AND P5, PT, R33, RZ, PT ;\n /*0be0*/ ISETP.LT.AND P3, PT, R34, 0x1, PT ;\n /*0bf0*/ PLOP3.LUT P4, PT, P5, P3, PT, 0xa8, 0x0 ;\n /*0c00*/ PLOP3.LUT P5, PT, P5, PT, PT, 0x80, 0x0 ;\n /*0c10*/ P2R R42, PR, RZ, 0x20 ;\n /*0c20*/ PLOP3.LUT P3, PT, P3, PT, PT, 0x80, 0x0 ;\n /*0c30*/ BSSY B0, `(.L_x_6) ;\n /*0c40*/ @P4 BRA `(.L_x_7) ;\n /*0c50*/ IADD3 R24, R37, -R3, RZ ;\n /*0c60*/ MOV R24, R24 ;\n /*0c70*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ;\n /*0c80*/ MOV R24, R24 ;\n /*0c90*/ MOV R25, R25 ;\n /*0ca0*/ MOV R43, R24 ;\n /*0cb0*/ MOV R25, R25 ;\n /*0cc0*/ MOV R24, R43 ;\n /*0cd0*/ MOV R25, R25 ;\n /*0ce0*/ IADD3 R24, P4, R5, R24, RZ ;\n /*0cf0*/ IADD3.X R25, R6, R25, RZ, P4, !PT ;\n /*0d00*/ MOV R24, R24 ;\n /*0d10*/ MOV R25, R25 ;\n /*0d20*/ MOV R24, R24 ;\n /*0d30*/ MOV R25, R25 ;\n /*0d40*/ R2UR UR4, R22 ;\n /*0d50*/ R2UR UR5, R23 ;\n /*0d60*/ LDG.E.U8 R24, [R24.64] ;\n /*0d70*/ PRMT R24, R24, 0x7770, RZ ;\n /*0d80*/ PRMT R24, R24, 0x7710, RZ ;\n /*0d90*/ IADD3 R25, R35, R30, RZ ;\n /*0da0*/ IADD3 R25, R25, 0x1, RZ ;\n /*0db0*/ MOV R25, R25 ;\n /*0dc0*/ MOV R24, R24 ;\n /*0dd0*/ STS.U8 [R25], R24 ;\n.L_x_7:\n /*0de0*/ BSYNC B0 ;\n.L_x_6:\n /*0df0*/ IADD3 R24, R32, -0x1, RZ ;\n /*0e00*/ ISETP.NE.AND P4, PT, R33, R24, PT ;\n /*0e10*/ IADD3 R4, R4, -0x1, RZ ;\n /*0e20*/ ISETP.GE.AND P5, PT, R34, R4, PT ;\n /*0e30*/ PLOP3.LUT P6, PT, P4, P5, PT, 0xa8, 0x0 ;\n /*0e40*/ PLOP3.LUT P4, PT, P4, PT, PT, 0x80, 0x0 ;\n /*0e50*/ PLOP3.LUT P5, PT, P5, PT, PT, 0x80, 0x0 ;\n /*0e60*/ BSSY B0, `(.L_x_8) ;\n /*0e70*/ @P6 BRA `(.L_x_9) ;\n /*0e80*/ MOV R24, R3 ;\n /*0e90*/ SHF.R.S32.HI R25, RZ, 0x1f, R24 ;\n /*0ea0*/ MOV R24, R24 ;\n /*0eb0*/ MOV R25, R25 ;\n /*0ec0*/ MOV R4, R24 ;\n /*0ed0*/ MOV R25, R25 ;\n /*0ee0*/ MOV R24, R4 ;\n /*0ef0*/ MOV R25, R25 ;\n /*0f00*/ IADD3 R24, P6, R38, R24, RZ ;\n /*0f10*/ IADD3.X R25, R39, R25, RZ, P6, !PT ;\n /*0f20*/ MOV R24, R24 ;\n /*0f30*/ MOV R25, R25 ;\n /*0f40*/ MOV R24, R24 ;\n /*0f50*/ MOV R25, R25 ;\n /*0f60*/ R2UR UR4, R22 ;\n /*0f70*/ R2UR UR5, R23 ;\n /*0f80*/ LDG.E.U8 R24, [R24.64] ;\n /*0f90*/ PRMT R4, R24, 0x7770, RZ ;\n /*0fa0*/ PRMT R4, R4, 0x7710, RZ ;\n /*0fb0*/ IMAD R24, R32, 0x12, R30 ;\n /*0fc0*/ IADD3 R24, R35, R24, RZ ;\n /*0fd0*/ IADD3 R24, R24, 0x13, RZ ;\n /*0fe0*/ MOV R24, R24 ;\n /*0ff0*/ MOV R4, R4 ;\n /*1000*/ STS.U8 [R24], R4 ;\n.L_x_9:\n /*1010*/ BSYNC B0 ;\n.L_x_8:\n /*1020*/ LOP3.LUT R4, R30, R33, RZ, 0xfc, !PT ;\n /*1030*/ ISETP.NE.AND P6, PT, R4, RZ, PT ;\n /*1040*/ PLOP3.LUT P6, PT, P6, P0, PT, 0xa8, 0x0 ;\n /*1050*/ LOP3.LUT R4, RZ, R3, RZ, 0x33, !PT ;\n /*1060*/ IADD3 R4, R37, R4, RZ ;\n /*1070*/ P2R R39, PR, RZ, 0x40 ;\n /*1080*/ MOV R4, R4 ;\n /*1090*/ SHF.R.S32.HI R24, RZ, 0x1f, R4 ;\n /*10a0*/ MOV R25, R24 ;\n /*10b0*/ MOV R24, R4 ;\n /*10c0*/ MOV R38, R24 ;\n /*10d0*/ MOV R4, R25 ;\n /*10e0*/ MOV R38, R38 ;\n /*10f0*/ MOV R4, R4 ;\n /*1100*/ IADD3 R38, P6, R5, R38, RZ ;\n /*1110*/ IADD3.X R4, R6, R4, RZ, P6, !PT ;\n /*1120*/ ISETP.NE.AND P6, PT, R39, RZ, PT ;\n /*1130*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ;\n /*1140*/ MOV R38, R38 ;\n /*1150*/ MOV R4, R4 ;\n /*1160*/ BSSY B0, `(.L_x_10) ;\n /*1170*/ @P6 BRA `(.L_x_11) ;\n /*1180*/ MOV R24, R38 ;\n /*1190*/ MOV R25, R4 ;\n /*11a0*/ MOV R24, R24 ;\n /*11b0*/ MOV R25, R25 ;\n /*11c0*/ R2UR UR4, R22 ;\n /*11d0*/ R2UR UR5, R23 ;\n /*11e0*/ LDG.E.U8 R24, [R24.64] ;\n /*11f0*/ PRMT R24, R24, 0x7770, RZ ;\n /*1200*/ PRMT R24, R24, 0x7710, RZ ;\n /*1210*/ MOV R24, R24 ;\n /*1220*/ STS.U8 [RZ], R24 ;\n.L_x_11:\n /*1230*/ BSYNC B0 ;\n.L_x_10:\n /*1240*/ ISETP.NE.AND P6, PT, R42, RZ, PT ;\n /*1250*/ PLOP3.LUT P6, PT, P6, P1, PT, 0xa8, 0x0 ;\n /*1260*/ PLOP3.LUT P6, PT, P6, P2, PT, 0xa8, 0x0 ;\n /*1270*/ PLOP3.LUT P6, PT, P3, P6, PT, 0xa8, 0x0 ;\n /*1280*/ BSSY B0, `(.L_x_12) ;\n /*1290*/ @P6 BRA `(.L_x_13) ;\n /*12a0*/ IADD3 R24, P3, R38, 0x2, RZ ;\n /*12b0*/ IADD3.X R25, R4, RZ, RZ, P3, !PT ;\n /*12c0*/ MOV R24, R24 ;\n /*12d0*/ MOV R25, R25 ;\n /*12e0*/ MOV R24, R24 ;\n /*12f0*/ MOV R25, R25 ;\n /*1300*/ R2UR UR4, R22 ;\n /*1310*/ R2UR UR5, R23 ;\n /*1320*/ LDG.E.U8 R24, [R24.64] ;\n /*1330*/ PRMT R4, R24, 0x7770, RZ ;\n /*1340*/ PRMT R4, R4, 0x7710, RZ ;\n /*1350*/ IADD3 R24, R35, R29, RZ ;\n /*1360*/ IADD3 R24, R24, 0x2, RZ ;\n /*1370*/ MOV R24, R24 ;\n /*1380*/ MOV R4, R4 ;\n /*1390*/ STS.U8 [R24], R4 ;\n.L_x_13:\n /*13a0*/ BSYNC B0 ;\n.L_x_12:\n /*13b0*/ ISETP.NE.AND P3, PT, R40, RZ, PT ;\n /*13c0*/ PLOP3.LUT P3, PT, P3, P4, PT, 0xa8, 0x0 ;\n /*13d0*/ PLOP3.LUT P3, PT, P3, P0, PT, 0xa8, 0x0 ;\n /*13e0*/ IADD3 R37, R3, R37, RZ ;\n /*13f0*/ MOV R37, R37 ;\n /*1400*/ SHF.R.S32.HI R24, RZ, 0x1f, R37 ;\n /*1410*/ MOV R25, R24 ;\n /*1420*/ MOV R24, R37 ;\n /*1430*/ MOV R4, R24 ;\n /*1440*/ MOV R24, R25 ;\n /*1450*/ MOV R25, R4 ;\n /*1460*/ MOV R24, R24 ;\n /*1470*/ IADD3 R25, P0, R5, R25, RZ ;\n /*1480*/ IADD3.X R24, R6, R24, RZ, P0, !PT ;\n /*1490*/ IMAD R6, R32, 0x12, R35 ;\n /*14a0*/ PLOP3.LUT P3, PT, P3, P5, PT, 0xa8, 0x0 ;\n /*14b0*/ MOV R25, R25 ;\n /*14c0*/ MOV R24, R24 ;\n /*14d0*/ MOV R6, R6 ;\n /*14e0*/ BSSY B0, `(.L_x_14) ;\n /*14f0*/ @P3 BRA `(.L_x_15) ;\n /*1500*/ IADD3 R4, P0, R25, -0x1, RZ ;\n /*1510*/ IADD3.X R5, R24, -0x1, RZ, P0, !PT ;\n /*1520*/ MOV R4, R4 ;\n /*1530*/ MOV R5, R5 ;\n /*1540*/ MOV R4, R4 ;\n /*1550*/ MOV R5, R5 ;\n /*1560*/ R2UR UR4, R22 ;\n /*1570*/ R2UR UR5, R23 ;\n /*1580*/ LDG.E.U8 R4, [R4.64] ;\n /*1590*/ PRMT R4, R4, 0x7770, RZ ;\n /*15a0*/ PRMT R4, R4, 0x7710, RZ ;\n /*15b0*/ IADD3 R5, R6, 0x12, RZ ;\n /*15c0*/ MOV R5, R5 ;\n /*15d0*/ MOV R4, R4 ;\n /*15e0*/ STS.U8 [R5], R4 ;\n.L_x_15:\n /*15f0*/ BSYNC B0 ;\n.L_x_14:\n /*1600*/ PLOP3.LUT P1, PT, P1, P4, PT, 0xa8, 0x0 ;\n /*1610*/ PLOP3.LUT P1, PT, P1, P2, PT, 0xa8, 0x0 ;\n /*1620*/ PLOP3.LUT P1, PT, P1, P5, PT, 0xa8, 0x0 ;\n /*1630*/ @P1 BRA `(.L_x_1) ;\n /*1640*/ IADD3 R4, P0, R25, 0x1, RZ ;\n /*1650*/ IADD3.X R5, R24, RZ, RZ, P0, !PT ;\n /*1660*/ MOV R4, R4 ;\n /*1670*/ MOV R5, R5 ;\n /*1680*/ MOV R4, R4 ;\n /*1690*/ MOV R5, R5 ;\n /*16a0*/ R2UR UR4, R22 ;\n /*16b0*/ R2UR UR5, R23 ;\n /*16c0*/ LDG.E.U8 R4, [R4.64] ;\n /*16d0*/ PRMT R4, R4, 0x7770, RZ ;\n /*16e0*/ PRMT R4, R4, 0x7710, RZ ;\n /*16f0*/ IADD3 R6, R6, 0x23, RZ ;\n /*1700*/ MOV R6, R6 ;\n /*1710*/ MOV R4, R4 ;\n /*1720*/ STS.U8 [R6], R4 ;\n.L_x_1:\n /*1730*/ WARPSYNC 0xffffffff ;\n /*1740*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*1750*/ ISETP.NE.AND P1, PT, R41, RZ, PT ;\n /*1760*/ ISETP.GE.U32.AND P0, PT, R30, R29, PT ;\n /*1770*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*1780*/ ISETP.GE.U32.AND P1, PT, R33, R32, PT ;\n /*1790*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*17a0*/ @P0 BRA `(.L_x_16) ;\n /*17b0*/ MOV R4, R36 ;\n /*17c0*/ LDS.U8 R4, [R4] ;\n /*17d0*/ PRMT R4, R4, 0x7770, RZ ;\n /*17e0*/ PRMT R5, R4, 0x7710, RZ ;\n /*17f0*/ PRMT R4, R5, 0x7710, RZ ;\n /*1800*/ MOV R4, R4 ;\n /*1810*/ MOV R6, R7 ;\n /*1820*/ MOV R8, R8 ;\n /*1830*/ STL [R6], R4 ;\n /*1840*/ IADD3 R6, R36, 0x1, RZ ;\n /*1850*/ MOV R6, R6 ;\n /*1860*/ LDS.U8 R6, [R6] ;\n /*1870*/ PRMT R6, R6, 0x7770, RZ ;\n /*1880*/ PRMT R24, R6, 0x7710, RZ ;\n /*1890*/ PRMT R6, R24, 0x7710, RZ ;\n /*18a0*/ MOV R6, R6 ;\n /*18b0*/ MOV R9, R9 ;\n /*18c0*/ MOV R10, R10 ;\n /*18d0*/ STL [R9], R6 ;\n /*18e0*/ IADD3 R25, R36, 0x2, RZ ;\n /*18f0*/ MOV R25, R25 ;\n /*1900*/ LDS.U8 R25, [R25] ;\n /*1910*/ PRMT R25, R25, 0x7770, RZ ;\n /*1920*/ MOV R25, R25 ;\n /*1930*/ MOV R11, R11 ;\n /*1940*/ MOV R12, R12 ;\n /*1950*/ STL [R11], R25 ;\n /*1960*/ IADD3 R29, R36, 0x12, RZ ;\n /*1970*/ MOV R29, R29 ;\n /*1980*/ LDS.U8 R29, [R29] ;\n /*1990*/ PRMT R29, R29, 0x7770, RZ ;\n /*19a0*/ MOV R29, R29 ;\n /*19b0*/ MOV R13, R13 ;\n /*19c0*/ MOV R14, R14 ;\n /*19d0*/ STL [R13], R29 ;\n /*19e0*/ IADD3 R30, R36, 0x13, RZ ;\n /*19f0*/ MOV R30, R30 ;\n /*1a00*/ LDS.U8 R30, [R30] ;\n /*1a10*/ PRMT R30, R30, 0x7770, RZ ;\n /*1a20*/ MOV R30, R30 ;\n /*1a30*/ MOV R15, R15 ;\n /*1a40*/ MOV R16, R16 ;\n /*1a50*/ STL [R15], R30 ;\n /*1a60*/ IADD3 R32, R36, 0x14, RZ ;\n /*1a70*/ MOV R32, R32 ;\n /*1a80*/ LDS.U8 R32, [R32] ;\n /*1a90*/ PRMT R32, R32, 0x7770, RZ ;\n /*1aa0*/ MOV R32, R32 ;\n /*1ab0*/ MOV R17, R17 ;\n /*1ac0*/ MOV R18, R18 ;\n /*1ad0*/ STL [R17], R32 ;\n /*1ae0*/ IADD3 R33, R36, 0x24, RZ ;\n /*1af0*/ MOV R33, R33 ;\n /*1b00*/ LDS.U8 R33, [R33] ;\n /*1b10*/ PRMT R33, R33, 0x7770, RZ ;\n /*1b20*/ MOV R33, R33 ;\n /*1b30*/ MOV R19, R19 ;\n /*1b40*/ MOV R20, R20 ;\n /*1b50*/ STL [R19], R33 ;\n /*1b60*/ IADD3 R35, R36, 0x25, RZ ;\n /*1b70*/ MOV R35, R35 ;\n /*1b80*/ LDS.U8 R35, [R35] ;\n /*1b90*/ PRMT R35, R35, 0x7770, RZ ;\n /*1ba0*/ MOV R35, R35 ;\n /*1bb0*/ MOV R21, R21 ;\n /*1bc0*/ MOV R26, R26 ;\n /*1bd0*/ STL [R21], R35 ;\n /*1be0*/ IADD3 R36, R36, 0x26, RZ ;\n /*1bf0*/ MOV R36, R36 ;\n /*1c00*/ LDS.U8 R36, [R36] ;\n /*1c10*/ PRMT R36, R36, 0x7770, RZ ;\n /*1c20*/ MOV R36, R36 ;\n /*1c30*/ MOV R27, R27 ;\n /*1c40*/ MOV R28, R28 ;\n /*1c50*/ STL [R27], R36 ;\n /*1c60*/ PRMT R24, R24, 0x7710, RZ ;\n /*1c70*/ MOV R24, R24 ;\n /*1c80*/ PRMT R5, R5, 0x7710, RZ ;\n /*1c90*/ MOV R5, R5 ;\n /*1ca0*/ ISETP.LE.U32.AND P0, PT, R5, R24, PT ;\n /*1cb0*/ MOV R24, R9 ;\n /*1cc0*/ MOV R10, R10 ;\n /*1cd0*/ MOV R5, R4 ;\n /*1ce0*/ MOV R6, R6 ;\n /*1cf0*/ MOV R25, R25 ;\n /*1d00*/ MOV R29, R29 ;\n /*1d10*/ MOV R30, R30 ;\n /*1d20*/ MOV R32, R32 ;\n /*1d30*/ MOV R33, R33 ;\n /*1d40*/ MOV R35, R35 ;\n /*1d50*/ MOV R4, R36 ;\n /*1d60*/ MOV R24, R24 ;\n /*1d70*/ MOV R36, R10 ;\n /*1d80*/ BSSY B0, `(.L_x_17) ;\n /*1d90*/ @P0 BRA `(.L_x_18) ;\n /*1da0*/ MOV R9, R9 ;\n /*1db0*/ MOV R10, R10 ;\n /*1dc0*/ STL [R9], R5 ;\n /*1dd0*/ MOV R5, R7 ;\n /*1de0*/ MOV R8, R8 ;\n /*1df0*/ MOV R24, R5 ;\n /*1e00*/ MOV R36, R8 ;\n.L_x_18:\n /*1e10*/ BSYNC B0 ;\n.L_x_17:\n /*1e20*/ MOV R5, R24 ;\n /*1e30*/ MOV R24, R36 ;\n /*1e40*/ STL [R5], R6 ;\n /*1e50*/ MOV R5, R9 ;\n /*1e60*/ MOV R6, R10 ;\n /*1e70*/ LDL R5, [R5] ;\n /*1e80*/ ISETP.LE.AND P0, PT, R5, R25, PT ;\n /*1e90*/ MOV R24, R11 ;\n /*1ea0*/ MOV R6, R12 ;\n /*1eb0*/ MOV R5, R5 ;\n /*1ec0*/ MOV R24, R24 ;\n /*1ed0*/ MOV R6, R6 ;\n /*1ee0*/ BSSY B0, `(.L_x_19) ;\n /*1ef0*/ @P0 BRA `(.L_x_20) ;\n /*1f00*/ MOV R6, R11 ;\n /*1f10*/ MOV R12, R12 ;\n /*1f20*/ STL [R6], R5 ;\n /*1f30*/ MOV R5, R7 ;\n /*1f40*/ MOV R6, R8 ;\n /*1f50*/ LDL R5, [R5] ;\n /*1f60*/ ISETP.LE.AND P0, PT, R5, R25, PT ;\n /*1f70*/ MOV R6, R9 ;\n /*1f80*/ MOV R10, R10 ;\n /*1f90*/ MOV R5, R5 ;\n /*1fa0*/ MOV R24, R6 ;\n /*1fb0*/ MOV R6, R10 ;\n /*1fc0*/ @P0 BRA `(.L_x_20) ;\n /*1fd0*/ MOV R6, R9 ;\n /*1fe0*/ MOV R10, R10 ;\n /*1ff0*/ STL [R6], R5 ;\n /*2000*/ MOV R5, R7 ;\n /*2010*/ MOV R6, R8 ;\n /*2020*/ MOV R24, R5 ;\n /*2030*/ MOV R6, R6 ;\n.L_x_20:\n /*2040*/ BSYNC B0 ;\n.L_x_19:\n /*2050*/ MOV R5, R24 ;\n /*2060*/ MOV R6, R6 ;\n /*2070*/ STL [R5], R25 ;\n /*2080*/ MOV R5, R11 ;\n /*2090*/ MOV R6, R12 ;\n /*20a0*/ LDL R5, [R5] ;\n /*20b0*/ ISETP.LE.AND P0, PT, R5, R29, PT ;\n /*20c0*/ MOV R24, R13 ;\n /*20d0*/ MOV R6, R14 ;\n /*20e0*/ MOV R5, R5 ;\n /*20f0*/ MOV R24, R24 ;\n /*2100*/ MOV R6, R6 ;\n /*2110*/ BSSY B0, `(.L_x_21) ;\n /*2120*/ @P0 BRA `(.L_x_22) ;\n /*2130*/ MOV R6, R13 ;\n /*2140*/ MOV R14, R14 ;\n /*2150*/ STL [R6], R5 ;\n /*2160*/ MOV R5, R9 ;\n /*2170*/ MOV R6, R10 ;\n /*2180*/ LDL R5, [R5] ;\n /*2190*/ ISETP.LE.AND P0, PT, R5, R29, PT ;\n /*21a0*/ MOV R6, R11 ;\n /*21b0*/ MOV R12, R12 ;\n /*21c0*/ MOV R5, R5 ;\n /*21d0*/ MOV R24, R6 ;\n /*21e0*/ MOV R6, R12 ;\n /*21f0*/ @P0 BRA `(.L_x_22) ;\n /*2200*/ MOV R6, R11 ;\n /*2210*/ MOV R12, R12 ;\n /*2220*/ STL [R6], R5 ;\n /*2230*/ MOV R5, R7 ;\n /*2240*/ MOV R6, R8 ;\n /*2250*/ LDL R5, [R5] ;\n /*2260*/ ISETP.LE.AND P0, PT, R5, R29, PT ;\n /*2270*/ MOV R6, R9 ;\n /*2280*/ MOV R10, R10 ;\n /*2290*/ MOV R5, R5 ;\n /*22a0*/ MOV R24, R6 ;\n /*22b0*/ MOV R6, R10 ;\n /*22c0*/ @P0 BRA `(.L_x_22) ;\n /*22d0*/ MOV R6, R9 ;\n /*22e0*/ MOV R10, R10 ;\n /*22f0*/ STL [R6], R5 ;\n /*2300*/ MOV R5, R7 ;\n /*2310*/ MOV R6, R8 ;\n /*2320*/ MOV R24, R5 ;\n /*2330*/ MOV R6, R6 ;\n.L_x_22:\n /*2340*/ BSYNC B0 ;\n.L_x_21:\n /*2350*/ MOV R5, R24 ;\n /*2360*/ MOV R6, R6 ;\n /*2370*/ STL [R5], R29 ;\n /*2380*/ MOV R5, R13 ;\n /*2390*/ MOV R6, R14 ;\n /*23a0*/ LDL R5, [R5] ;\n /*23b0*/ ISETP.LE.AND P0, PT, R5, R30, PT ;\n /*23c0*/ MOV R24, R15 ;\n /*23d0*/ MOV R6, R16 ;\n /*23e0*/ MOV R5, R5 ;\n /*23f0*/ MOV R24, R24 ;\n /*2400*/ MOV R6, R6 ;\n /*2410*/ BSSY B0, `(.L_x_23) ;\n /*2420*/ @P0 BRA `(.L_x_24) ;\n /*2430*/ MOV R6, R15 ;\n /*2440*/ MOV R16, R16 ;\n /*2450*/ STL [R6], R5 ;\n /*2460*/ MOV R5, R11 ;\n /*2470*/ MOV R6, R12 ;\n /*2480*/ LDL R5, [R5] ;\n /*2490*/ ISETP.LE.AND P0, PT, R5, R30, PT ;\n /*24a0*/ MOV R6, R13 ;\n /*24b0*/ MOV R14, R14 ;\n /*24c0*/ MOV R5, R5 ;\n /*24d0*/ MOV R24, R6 ;\n /*24e0*/ MOV R6, R14 ;\n /*24f0*/ @P0 BRA `(.L_x_24) ;\n /*2500*/ MOV R6, R13 ;\n /*2510*/ MOV R14, R14 ;\n /*2520*/ STL [R6], R5 ;\n /*2530*/ MOV R5, R9 ;\n /*2540*/ MOV R6, R10 ;\n /*2550*/ LDL R5, [R5] ;\n /*2560*/ ISETP.LE.AND P0, PT, R5, R30, PT ;\n /*2570*/ MOV R6, R11 ;\n /*2580*/ MOV R12, R12 ;\n /*2590*/ MOV R5, R5 ;\n /*25a0*/ MOV R24, R6 ;\n /*25b0*/ MOV R6, R12 ;\n /*25c0*/ @P0 BRA `(.L_x_24) ;\n /*25d0*/ MOV R6, R11 ;\n /*25e0*/ MOV R12, R12 ;\n /*25f0*/ STL [R6], R5 ;\n /*2600*/ MOV R5, R7 ;\n /*2610*/ MOV R6, R8 ;\n /*2620*/ LDL R5, [R5] ;\n /*2630*/ ISETP.LE.AND P0, PT, R5, R30, PT ;\n /*2640*/ MOV R6, R9 ;\n /*2650*/ MOV R10, R10 ;\n /*2660*/ MOV R5, R5 ;\n /*2670*/ MOV R24, R6 ;\n /*2680*/ MOV R6, R10 ;\n /*2690*/ @P0 BRA `(.L_x_24) ;\n /*26a0*/ MOV R6, R9 ;\n /*26b0*/ MOV R10, R10 ;\n /*26c0*/ STL [R6], R5 ;\n /*26d0*/ MOV R5, R7 ;\n /*26e0*/ MOV R6, R8 ;\n /*26f0*/ MOV R24, R5 ;\n /*2700*/ MOV R6, R6 ;\n.L_x_24:\n /*2710*/ BSYNC B0 ;\n.L_x_23:\n /*2720*/ MOV R5, R24 ;\n /*2730*/ MOV R6, R6 ;\n /*2740*/ STL [R5], R30 ;\n /*2750*/ MOV R5, R15 ;\n /*2760*/ MOV R6, R16 ;\n /*2770*/ LDL R5, [R5] ;\n /*2780*/ ISETP.LE.AND P0, PT, R5, R32, PT ;\n /*2790*/ MOV R24, R17 ;\n /*27a0*/ MOV R6, R18 ;\n /*27b0*/ MOV R5, R5 ;\n /*27c0*/ MOV R24, R24 ;\n /*27d0*/ MOV R6, R6 ;\n /*27e0*/ BSSY B0, `(.L_x_25) ;\n /*27f0*/ @P0 BRA `(.L_x_26) ;\n /*2800*/ MOV R6, R17 ;\n /*2810*/ MOV R18, R18 ;\n /*2820*/ STL [R6], R5 ;\n /*2830*/ MOV R5, R13 ;\n /*2840*/ MOV R6, R14 ;\n /*2850*/ LDL R5, [R5] ;\n /*2860*/ ISETP.LE.AND P0, PT, R5, R32, PT ;\n /*2870*/ MOV R6, R15 ;\n /*2880*/ MOV R16, R16 ;\n /*2890*/ MOV R5, R5 ;\n /*28a0*/ MOV R24, R6 ;\n /*28b0*/ MOV R6, R16 ;\n /*28c0*/ @P0 BRA `(.L_x_26) ;\n /*28d0*/ MOV R6, R15 ;\n /*28e0*/ MOV R16, R16 ;\n /*28f0*/ STL [R6], R5 ;\n /*2900*/ MOV R5, R11 ;\n /*2910*/ MOV R6, R12 ;\n /*2920*/ LDL R5, [R5] ;\n /*2930*/ ISETP.LE.AND P0, PT, R5, R32, PT ;\n /*2940*/ MOV R6, R13 ;\n /*2950*/ MOV R14, R14 ;\n /*2960*/ MOV R5, R5 ;\n /*2970*/ MOV R24, R6 ;\n /*2980*/ MOV R6, R14 ;\n /*2990*/ @P0 BRA `(.L_x_26) ;\n /*29a0*/ MOV R6, R13 ;\n /*29b0*/ MOV R14, R14 ;\n /*29c0*/ STL [R6], R5 ;\n /*29d0*/ MOV R5, R9 ;\n /*29e0*/ MOV R6, R10 ;\n /*29f0*/ LDL R5, [R5] ;\n /*2a00*/ ISETP.LE.AND P0, PT, R5, R32, PT ;\n /*2a10*/ MOV R6, R11 ;\n /*2a20*/ MOV R12, R12 ;\n /*2a30*/ MOV R5, R5 ;\n /*2a40*/ MOV R24, R6 ;\n /*2a50*/ MOV R6, R12 ;\n /*2a60*/ @P0 BRA `(.L_x_26) ;\n /*2a70*/ MOV R6, R11 ;\n /*2a80*/ MOV R12, R12 ;\n /*2a90*/ STL [R6], R5 ;\n /*2aa0*/ MOV R5, R7 ;\n /*2ab0*/ MOV R6, R8 ;\n /*2ac0*/ LDL R5, [R5] ;\n /*2ad0*/ ISETP.LE.AND P0, PT, R5, R32, PT ;\n /*2ae0*/ MOV R6, R9 ;\n /*2af0*/ MOV R10, R10 ;\n /*2b00*/ MOV R5, R5 ;\n /*2b10*/ MOV R24, R6 ;\n /*2b20*/ MOV R6, R10 ;\n /*2b30*/ @P0 BRA `(.L_x_26) ;\n /*2b40*/ MOV R6, R9 ;\n /*2b50*/ MOV R10, R10 ;\n /*2b60*/ STL [R6], R5 ;\n /*2b70*/ MOV R5, R7 ;\n /*2b80*/ MOV R6, R8 ;\n /*2b90*/ MOV R24, R5 ;\n /*2ba0*/ MOV R6, R6 ;\n.L_x_26:\n /*2bb0*/ BSYNC B0 ;\n.L_x_25:\n /*2bc0*/ MOV R5, R24 ;\n /*2bd0*/ MOV R6, R6 ;\n /*2be0*/ STL [R5], R32 ;\n /*2bf0*/ MOV R5, R17 ;\n /*2c00*/ MOV R6, R18 ;\n /*2c10*/ LDL R5, [R5] ;\n /*2c20*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*2c30*/ MOV R24, R19 ;\n /*2c40*/ MOV R6, R20 ;\n /*2c50*/ MOV R5, R5 ;\n /*2c60*/ MOV R24, R24 ;\n /*2c70*/ MOV R6, R6 ;\n /*2c80*/ BSSY B0, `(.L_x_27) ;\n /*2c90*/ @P0 BRA `(.L_x_28) ;\n /*2ca0*/ MOV R6, R19 ;\n /*2cb0*/ MOV R20, R20 ;\n /*2cc0*/ STL [R6], R5 ;\n /*2cd0*/ MOV R5, R15 ;\n /*2ce0*/ MOV R6, R16 ;\n /*2cf0*/ LDL R5, [R5] ;\n /*2d00*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*2d10*/ MOV R6, R17 ;\n /*2d20*/ MOV R18, R18 ;\n /*2d30*/ MOV R5, R5 ;\n /*2d40*/ MOV R24, R6 ;\n /*2d50*/ MOV R6, R18 ;\n /*2d60*/ @P0 BRA `(.L_x_28) ;\n /*2d70*/ MOV R6, R17 ;\n /*2d80*/ MOV R18, R18 ;\n /*2d90*/ STL [R6], R5 ;\n /*2da0*/ MOV R5, R13 ;\n /*2db0*/ MOV R6, R14 ;\n /*2dc0*/ LDL R5, [R5] ;\n /*2dd0*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*2de0*/ MOV R6, R15 ;\n /*2df0*/ MOV R16, R16 ;\n /*2e00*/ MOV R5, R5 ;\n /*2e10*/ MOV R24, R6 ;\n /*2e20*/ MOV R6, R16 ;\n /*2e30*/ @P0 BRA `(.L_x_28) ;\n /*2e40*/ MOV R6, R15 ;\n /*2e50*/ MOV R16, R16 ;\n /*2e60*/ STL [R6], R5 ;\n /*2e70*/ MOV R5, R11 ;\n /*2e80*/ MOV R6, R12 ;\n /*2e90*/ LDL R5, [R5] ;\n /*2ea0*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*2eb0*/ MOV R6, R13 ;\n /*2ec0*/ MOV R14, R14 ;\n /*2ed0*/ MOV R5, R5 ;\n /*2ee0*/ MOV R24, R6 ;\n /*2ef0*/ MOV R6, R14 ;\n /*2f00*/ @P0 BRA `(.L_x_28) ;\n /*2f10*/ MOV R6, R13 ;\n /*2f20*/ MOV R14, R14 ;\n /*2f30*/ STL [R6], R5 ;\n /*2f40*/ MOV R5, R9 ;\n /*2f50*/ MOV R6, R10 ;\n /*2f60*/ LDL R5, [R5] ;\n /*2f70*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*2f80*/ MOV R6, R11 ;\n /*2f90*/ MOV R12, R12 ;\n /*2fa0*/ MOV R5, R5 ;\n /*2fb0*/ MOV R24, R6 ;\n /*2fc0*/ MOV R6, R12 ;\n /*2fd0*/ @P0 BRA `(.L_x_28) ;\n /*2fe0*/ MOV R6, R11 ;\n /*2ff0*/ MOV R12, R12 ;\n /*3000*/ STL [R6], R5 ;\n /*3010*/ MOV R5, R7 ;\n /*3020*/ MOV R6, R8 ;\n /*3030*/ LDL R5, [R5] ;\n /*3040*/ ISETP.LE.AND P0, PT, R5, R33, PT ;\n /*3050*/ MOV R6, R9 ;\n /*3060*/ MOV R10, R10 ;\n /*3070*/ MOV R5, R5 ;\n /*3080*/ MOV R24, R6 ;\n /*3090*/ MOV R6, R10 ;\n /*30a0*/ @P0 BRA `(.L_x_28) ;\n /*30b0*/ MOV R6, R9 ;\n /*30c0*/ MOV R10, R10 ;\n /*30d0*/ STL [R6], R5 ;\n /*30e0*/ MOV R5, R7 ;\n /*30f0*/ MOV R6, R8 ;\n /*3100*/ MOV R24, R5 ;\n /*3110*/ MOV R6, R6 ;\n.L_x_28:\n /*3120*/ BSYNC B0 ;\n.L_x_27:\n /*3130*/ MOV R5, R24 ;\n /*3140*/ MOV R6, R6 ;\n /*3150*/ STL [R5], R33 ;\n /*3160*/ MOV R5, R19 ;\n /*3170*/ MOV R6, R20 ;\n /*3180*/ LDL R5, [R5] ;\n /*3190*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*31a0*/ MOV R24, R21 ;\n /*31b0*/ MOV R6, R26 ;\n /*31c0*/ MOV R5, R5 ;\n /*31d0*/ MOV R24, R24 ;\n /*31e0*/ MOV R6, R6 ;\n /*31f0*/ BSSY B0, `(.L_x_29) ;\n /*3200*/ @P0 BRA `(.L_x_30) ;\n /*3210*/ MOV R6, R21 ;\n /*3220*/ MOV R24, R26 ;\n /*3230*/ STL [R6], R5 ;\n /*3240*/ MOV R5, R17 ;\n /*3250*/ MOV R6, R18 ;\n /*3260*/ LDL R5, [R5] ;\n /*3270*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*3280*/ MOV R6, R19 ;\n /*3290*/ MOV R20, R20 ;\n /*32a0*/ MOV R5, R5 ;\n /*32b0*/ MOV R24, R6 ;\n /*32c0*/ MOV R6, R20 ;\n /*32d0*/ @P0 BRA `(.L_x_30) ;\n /*32e0*/ MOV R6, R19 ;\n /*32f0*/ MOV R20, R20 ;\n /*3300*/ STL [R6], R5 ;\n /*3310*/ MOV R5, R15 ;\n /*3320*/ MOV R6, R16 ;\n /*3330*/ LDL R5, [R5] ;\n /*3340*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*3350*/ MOV R6, R17 ;\n /*3360*/ MOV R18, R18 ;\n /*3370*/ MOV R5, R5 ;\n /*3380*/ MOV R24, R6 ;\n /*3390*/ MOV R6, R18 ;\n /*33a0*/ @P0 BRA `(.L_x_30) ;\n /*33b0*/ MOV R6, R17 ;\n /*33c0*/ MOV R18, R18 ;\n /*33d0*/ STL [R6], R5 ;\n /*33e0*/ MOV R5, R13 ;\n /*33f0*/ MOV R6, R14 ;\n /*3400*/ LDL R5, [R5] ;\n /*3410*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*3420*/ MOV R6, R15 ;\n /*3430*/ MOV R16, R16 ;\n /*3440*/ MOV R5, R5 ;\n /*3450*/ MOV R24, R6 ;\n /*3460*/ MOV R6, R16 ;\n /*3470*/ @P0 BRA `(.L_x_30) ;\n /*3480*/ MOV R6, R15 ;\n /*3490*/ MOV R16, R16 ;\n /*34a0*/ STL [R6], R5 ;\n /*34b0*/ MOV R5, R11 ;\n /*34c0*/ MOV R6, R12 ;\n /*34d0*/ LDL R5, [R5] ;\n /*34e0*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*34f0*/ MOV R6, R13 ;\n /*3500*/ MOV R14, R14 ;\n /*3510*/ MOV R5, R5 ;\n /*3520*/ MOV R24, R6 ;\n /*3530*/ MOV R6, R14 ;\n /*3540*/ @P0 BRA `(.L_x_30) ;\n /*3550*/ MOV R6, R13 ;\n /*3560*/ MOV R14, R14 ;\n /*3570*/ STL [R6], R5 ;\n /*3580*/ MOV R5, R9 ;\n /*3590*/ MOV R6, R10 ;\n /*35a0*/ LDL R5, [R5] ;\n /*35b0*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*35c0*/ MOV R6, R11 ;\n /*35d0*/ MOV R12, R12 ;\n /*35e0*/ MOV R5, R5 ;\n /*35f0*/ MOV R24, R6 ;\n /*3600*/ MOV R6, R12 ;\n /*3610*/ @P0 BRA `(.L_x_30) ;\n /*3620*/ MOV R6, R11 ;\n /*3630*/ MOV R12, R12 ;\n /*3640*/ STL [R6], R5 ;\n /*3650*/ MOV R5, R7 ;\n /*3660*/ MOV R6, R8 ;\n /*3670*/ LDL R5, [R5] ;\n /*3680*/ ISETP.LE.AND P0, PT, R5, R35, PT ;\n /*3690*/ MOV R6, R9 ;\n /*36a0*/ MOV R10, R10 ;\n /*36b0*/ MOV R5, R5 ;\n /*36c0*/ MOV R24, R6 ;\n /*36d0*/ MOV R6, R10 ;\n /*36e0*/ @P0 BRA `(.L_x_30) ;\n /*36f0*/ MOV R6, R9 ;\n /*3700*/ MOV R10, R10 ;\n /*3710*/ STL [R6], R5 ;\n /*3720*/ MOV R5, R7 ;\n /*3730*/ MOV R6, R8 ;\n /*3740*/ MOV R24, R5 ;\n /*3750*/ MOV R6, R6 ;\n.L_x_30:\n /*3760*/ BSYNC B0 ;\n.L_x_29:\n /*3770*/ MOV R5, R24 ;\n /*3780*/ MOV R6, R6 ;\n /*3790*/ STL [R5], R35 ;\n /*37a0*/ MOV R5, R21 ;\n /*37b0*/ MOV R6, R26 ;\n /*37c0*/ LDL R5, [R5] ;\n /*37d0*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*37e0*/ MOV R5, R5 ;\n /*37f0*/ BSSY B0, `(.L_x_31) ;\n /*3800*/ @P0 BRA `(.L_x_32) ;\n /*3810*/ MOV R27, R27 ;\n /*3820*/ MOV R28, R28 ;\n /*3830*/ STL [R27], R5 ;\n /*3840*/ MOV R5, R19 ;\n /*3850*/ MOV R6, R20 ;\n /*3860*/ LDL R5, [R5] ;\n /*3870*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3880*/ MOV R27, R21 ;\n /*3890*/ MOV R28, R26 ;\n /*38a0*/ MOV R5, R5 ;\n /*38b0*/ MOV R27, R27 ;\n /*38c0*/ MOV R28, R28 ;\n /*38d0*/ @P0 BRA `(.L_x_32) ;\n /*38e0*/ MOV R21, R21 ;\n /*38f0*/ MOV R26, R26 ;\n /*3900*/ STL [R21], R5 ;\n /*3910*/ MOV R5, R17 ;\n /*3920*/ MOV R6, R18 ;\n /*3930*/ LDL R5, [R5] ;\n /*3940*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3950*/ MOV R27, R19 ;\n /*3960*/ MOV R28, R20 ;\n /*3970*/ MOV R5, R5 ;\n /*3980*/ MOV R27, R27 ;\n /*3990*/ MOV R28, R28 ;\n /*39a0*/ @P0 BRA `(.L_x_32) ;\n /*39b0*/ MOV R19, R19 ;\n /*39c0*/ MOV R20, R20 ;\n /*39d0*/ STL [R19], R5 ;\n /*39e0*/ MOV R5, R15 ;\n /*39f0*/ MOV R6, R16 ;\n /*3a00*/ LDL R5, [R5] ;\n /*3a10*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3a20*/ MOV R27, R17 ;\n /*3a30*/ MOV R28, R18 ;\n /*3a40*/ MOV R5, R5 ;\n /*3a50*/ MOV R27, R27 ;\n /*3a60*/ MOV R28, R28 ;\n /*3a70*/ @P0 BRA `(.L_x_32) ;\n /*3a80*/ MOV R17, R17 ;\n /*3a90*/ MOV R18, R18 ;\n /*3aa0*/ STL [R17], R5 ;\n /*3ab0*/ MOV R5, R13 ;\n /*3ac0*/ MOV R6, R14 ;\n /*3ad0*/ LDL R5, [R5] ;\n /*3ae0*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3af0*/ MOV R27, R15 ;\n /*3b00*/ MOV R28, R16 ;\n /*3b10*/ MOV R5, R5 ;\n /*3b20*/ MOV R27, R27 ;\n /*3b30*/ MOV R28, R28 ;\n /*3b40*/ @P0 BRA `(.L_x_32) ;\n /*3b50*/ MOV R6, R15 ;\n /*3b60*/ MOV R16, R16 ;\n /*3b70*/ STL [R6], R5 ;\n /*3b80*/ MOV R5, R11 ;\n /*3b90*/ MOV R6, R12 ;\n /*3ba0*/ LDL R5, [R5] ;\n /*3bb0*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3bc0*/ MOV R27, R13 ;\n /*3bd0*/ MOV R28, R14 ;\n /*3be0*/ MOV R5, R5 ;\n /*3bf0*/ MOV R27, R27 ;\n /*3c00*/ MOV R28, R28 ;\n /*3c10*/ @P0 BRA `(.L_x_32) ;\n /*3c20*/ MOV R13, R13 ;\n /*3c30*/ MOV R14, R14 ;\n /*3c40*/ STL [R13], R5 ;\n /*3c50*/ MOV R5, R9 ;\n /*3c60*/ MOV R6, R10 ;\n /*3c70*/ LDL R5, [R5] ;\n /*3c80*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3c90*/ MOV R27, R11 ;\n /*3ca0*/ MOV R28, R12 ;\n /*3cb0*/ MOV R5, R5 ;\n /*3cc0*/ MOV R27, R27 ;\n /*3cd0*/ MOV R28, R28 ;\n /*3ce0*/ @P0 BRA `(.L_x_32) ;\n /*3cf0*/ MOV R11, R11 ;\n /*3d00*/ MOV R12, R12 ;\n /*3d10*/ STL [R11], R5 ;\n /*3d20*/ MOV R5, R7 ;\n /*3d30*/ MOV R6, R8 ;\n /*3d40*/ LDL R5, [R5] ;\n /*3d50*/ ISETP.LE.AND P0, PT, R5, R4, PT ;\n /*3d60*/ MOV R27, R9 ;\n /*3d70*/ MOV R28, R10 ;\n /*3d80*/ MOV R5, R5 ;\n /*3d90*/ MOV R27, R27 ;\n /*3da0*/ MOV R28, R28 ;\n /*3db0*/ @P0 BRA `(.L_x_32) ;\n /*3dc0*/ MOV R9, R9 ;\n /*3dd0*/ MOV R10, R10 ;\n /*3de0*/ STL [R9], R5 ;\n /*3df0*/ MOV R7, R7 ;\n /*3e00*/ MOV R8, R8 ;\n /*3e10*/ MOV R27, R7 ;\n /*3e20*/ MOV R28, R8 ;\n.L_x_32:\n /*3e30*/ BSYNC B0 ;\n.L_x_31:\n /*3e40*/ MOV R27, R27 ;\n /*3e50*/ MOV R28, R28 ;\n /*3e60*/ STL [R27], R4 ;\n /*3e70*/ MOV R6, R15 ;\n /*3e80*/ MOV R16, R16 ;\n /*3e90*/ LDL R6, [R6] ;\n /*3ea0*/ IMAD R3, R34, R3, R31 ;\n /*3eb0*/ MOV R3, R3 ;\n /*3ec0*/ SHF.R.S32.HI R4, RZ, 0x1f, R3 ;\n /*3ed0*/ MOV R5, R4 ;\n /*3ee0*/ MOV R4, R3 ;\n /*3ef0*/ MOV R3, R4 ;\n /*3f00*/ MOV R5, R5 ;\n /*3f10*/ MOV R4, R3 ;\n /*3f20*/ MOV R5, R5 ;\n /*3f30*/ MOV R0, R0 ;\n /*3f40*/ MOV R3, R2 ;\n /*3f50*/ IADD3 R2, P0, R0, R4, RZ ;\n /*3f60*/ IADD3.X R3, R3, R5, RZ, P0, !PT ;\n /*3f70*/ MOV R2, R2 ;\n /*3f80*/ MOV R3, R3 ;\n /*3f90*/ MOV R6, R6 ;\n /*3fa0*/ MOV R2, R2 ;\n /*3fb0*/ MOV R3, R3 ;\n /*3fc0*/ R2UR UR4, R22 ;\n /*3fd0*/ R2UR UR5, R23 ;\n /*3fe0*/ STG.E.U8 [R2.64], R6 ;\n.L_x_16:\n /*3ff0*/ EXIT ;\n.L_x_33:\n /*4000*/ BRA `(.L_x_33);\n /*4010*/ NOP;\n /*4020*/ NOP;\n /*4030*/ NOP;\n /*4040*/ NOP;\n /*4050*/ NOP;\n /*4060*/ NOP;\n /*4070*/ NOP;\n /*4080*/ NOP;\n /*4090*/ NOP;\n /*40a0*/ NOP;\n /*40b0*/ NOP;\n /*40c0*/ NOP;\n /*40d0*/ NOP;\n /*40e0*/ NOP;\n /*40f0*/ NOP;\n.L_x_34:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z18medianFilterKernelPhS_ii ; -- Begin function _Z18medianFilterKernelPhS_ii\n\t.globl\t_Z18medianFilterKernelPhS_ii\n\t.p2align\t8\n\t.type\t_Z18medianFilterKernelPhS_ii,@function\n_Z18medianFilterKernelPhS_ii: ; @_Z18medianFilterKernelPhS_ii\n; %bb.0:\n\ts_clause 0x2\n\ts_load_b32 s2, s[0:1], 0x24\n\ts_load_b64 s[12:13], s[0:1], 0x10\n\ts_load_b128 s[8:11], s[0:1], 0x0\n\tv_and_b32_e32 v1, 0x3ff, v0\n\tv_bfe_u32 v0, v0, 10, 10\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u32_u24 v8, v0, 18, v1\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s17, s2, 0xffff\n\ts_lshr_b32 s16, s2, 16\n\tv_mad_u64_u32 v[4:5], null, s14, s17, v[1:2]\n\tv_mad_u64_u32 v[5:6], null, s15, s16, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cmp_gt_i32_e32 vcc_lo, s12, v4\n\tv_cmp_gt_i32_e64 s0, s13, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s14, vcc_lo, s0\n\ts_and_saveexec_b32 s15, s14\n\ts_cbranch_execz .LBB0_17\n; %bb.1:\n\tv_mad_u64_u32 v[6:7], null, v5, s12, v[4:5]\n\tv_cmp_eq_u32_e64 s1, 0, v1\n\tv_cmp_lt_i32_e64 s2, 0, v4\n\tv_mul_u32_u24_e32 v7, 18, v0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_4)\n\ts_and_b32 s3, s1, s2\n\tv_ashrrev_i32_e32 v3, 31, v6\n\tv_add_co_u32 v2, vcc_lo, s8, v6\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v3, vcc_lo, s9, v3, vcc_lo\n\tglobal_load_u8 v9, v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v8, v9 offset:19\n\ts_and_saveexec_b32 s0, s3\n\ts_cbranch_execz .LBB0_3\n; %bb.2:\n\tglobal_load_u8 v9, v[2:3], off offset:-1\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v7, v9 offset:18\n.LBB0_3:\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_add_i32 s0, s17, -1\n\ts_add_i32 s3, s12, -1\n\tv_cmp_eq_u32_e32 vcc_lo, s0, v1\n\tv_cmp_gt_i32_e64 s0, s3, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s4, vcc_lo, s0\n\ts_and_saveexec_b32 s3, s4\n\ts_cbranch_execz .LBB0_5\n; %bb.4:\n\tglobal_load_u8 v9, v[2:3], off offset:1\n\tv_add_nc_u32_e32 v7, s17, v7\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v7, v9 offset:20\n.LBB0_5:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_subrev_nc_u32_e32 v7, s12, v6\n\tv_cmp_eq_u32_e64 s5, 0, v0\n\tv_cmp_lt_i32_e64 s6, 0, v5\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_ashrrev_i32_e32 v9, 31, v7\n\ts_and_b32 s3, s5, s6\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s4, s3\n\ts_cbranch_execz .LBB0_7\n; %bb.6:\n\tv_add_co_u32 v10, s3, s8, v7\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v11, s3, s9, v9, s3\n\tglobal_load_u8 v10, v[10:11], off\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v1, v10 offset:1\n.LBB0_7:\n\ts_or_b32 exec_lo, exec_lo, s4\n\ts_add_i32 s3, s16, -1\n\ts_add_i32 s7, s13, -1\n\tv_cmp_eq_u32_e64 s4, s3, v0\n\tv_cmp_gt_i32_e64 s3, s7, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s7, s4, s3\n\ts_and_saveexec_b32 s13, s7\n\ts_cbranch_execz .LBB0_9\n; %bb.8:\n\ts_ashr_i32 s18, s12, 31\n\tv_add_co_u32 v10, s7, v2, s12\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v11, s7, s18, v3, s7\n\tglobal_load_u8 v12, v[10:11], off\n\tv_mad_u64_u32 v[10:11], null, s16, 18, v[1:2]\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v10, v12 offset:19\n.LBB0_9:\n\ts_or_b32 exec_lo, exec_lo, s13\n\ts_and_b32 s7, s5, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s7, s7, s6\n\ts_and_b32 s7, s1, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s13, s7\n\ts_cbranch_execz .LBB0_11\n; %bb.10:\n\tv_xad_u32 v6, s12, -1, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v11, 31, v6\n\tv_add_co_u32 v10, s7, s8, v6\n\tv_add_co_ci_u32_e64 v11, s7, s9, v11, s7\n\tglobal_load_u8 v6, v[10:11], off\n\tv_mov_b32_e32 v10, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v10, v6\n.LBB0_11:\n\ts_or_b32 exec_lo, exec_lo, s13\n\ts_and_b32 s5, s5, vcc_lo\n\ts_and_b32 s6, s0, s6\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s5, s5, s6\n\ts_and_saveexec_b32 s6, s5\n\ts_cbranch_execz .LBB0_13\n; %bb.12:\n\tv_add_co_u32 v6, s5, s8, v7\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v7, s5, s9, v9, s5\n\tglobal_load_u8 v6, v[6:7], off offset:1\n\tv_mov_b32_e32 v7, s17\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v7, v6 offset:2\n.LBB0_13:\n\ts_or_b32 exec_lo, exec_lo, s6\n\ts_and_b32 s2, s4, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_2) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s1, s1, s2\n\ts_mul_i32 s2, s16, 18\n\ts_and_b32 s1, s1, s3\n\ts_and_saveexec_b32 s5, s1\n\ts_cbranch_execz .LBB0_15\n; %bb.14:\n\ts_ashr_i32 s6, s12, 31\n\tv_add_co_u32 v6, s1, v2, s12\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v7, s1, s6, v3, s1\n\tglobal_load_u8 v6, v[6:7], off offset:-1\n\tv_mov_b32_e32 v7, s2\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v7, v6 offset:18\n.LBB0_15:\n\ts_or_b32 exec_lo, exec_lo, s5\n\ts_and_b32 s1, vcc_lo, s4\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, s1, s0\n\ts_and_b32 s0, s0, s3\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB0_17\n; %bb.16:\n\ts_ashr_i32 s0, s12, 31\n\tv_add_co_u32 v2, vcc_lo, v2, s12\n\tv_add_co_ci_u32_e32 v3, vcc_lo, s0, v3, vcc_lo\n\tglobal_load_u8 v2, v[2:3], off offset:1\n\tv_mov_b32_e32 v3, s2\n\ts_waitcnt vmcnt(0)\n\tds_store_b8 v3, v2 offset:35\n.LBB0_17:\n\ts_or_b32 exec_lo, exec_lo, s15\n\tv_cmp_gt_u32_e32 vcc_lo, s17, v1\n\tv_cmp_gt_u32_e64 s0, s16, v0\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_and_b32 s0, vcc_lo, s0\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, s0, s14\n\ts_and_saveexec_b32 s1, s0\n\ts_cbranch_execz .LBB0_89\n; %bb.18:\n\tds_load_u8 v7, v8\n\tds_load_u8 v13, v8 offset:1\n\tds_load_u8 v2, v8 offset:2\n\tds_load_u8 v3, v8 offset:18\n\tds_load_u8 v9, v8 offset:19\n\tds_load_u8 v10, v8 offset:20\n\tds_load_u8 v11, v8 offset:36\n\tds_load_u8 v12, v8 offset:37\n\tds_load_u8 v8, v8 offset:38\n\ts_mov_b32 s0, exec_lo\n\tv_mov_b32_e32 v6, 0\n\ts_waitcnt lgkmcnt(8)\n\tv_and_b32_e32 v0, 0xffff, v7\n\ts_waitcnt lgkmcnt(7)\n\tv_and_b32_e32 v1, 0xffff, v13\n\ts_waitcnt lgkmcnt(5)\n\tscratch_store_b128 off, v[0:3], off offset:16\n\ts_waitcnt lgkmcnt(1)\n\tscratch_store_b128 off, v[9:12], off offset:32\n\ts_waitcnt lgkmcnt(0)\n\tscratch_store_b32 off, v8, off offset:48\n\tv_cmpx_gt_u16_e64 v7, v13\n\ts_cbranch_execz .LBB0_20\n; %bb.19:\n\tv_mov_b32_e32 v6, -1\n\tscratch_store_b32 off, v0, off offset:20\n.LBB0_20:\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v6\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s0, exec_lo\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:20\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_24\n; %bb.21:\n\tscratch_load_b32 v3, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_23\n; %bb.22:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v3, off offset:20\n.LBB0_23:\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_24:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_mov_b32_e32 v2, 2\n\ts_mov_b32 s0, exec_lo\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_30\n; %bb.25:\n\tscratch_load_b32 v3, off, off offset:20\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_29\n; %bb.26:\n\tscratch_load_b32 v0, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s2, exec_lo\n\tscratch_store_b32 off, v3, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_28\n; %bb.27:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v0, off offset:20\n.LBB0_28:\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_29:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_30:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_mov_b32_e32 v2, 3\n\ts_mov_b32 s0, exec_lo\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_38\n; %bb.31:\n\tscratch_load_b32 v3, off, off offset:24\n\tv_mov_b32_e32 v2, 2\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_37\n; %bb.32:\n\tscratch_load_b32 v0, off, off offset:20\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s2, exec_lo\n\tscratch_store_b32 off, v3, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_36\n; %bb.33:\n\tscratch_load_b32 v3, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s3, exec_lo\n\tscratch_store_b32 off, v0, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_35\n; %bb.34:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v3, off offset:20\n.LBB0_35:\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_36:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_37:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_38:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_mov_b32_e32 v2, 4\n\ts_mov_b32 s0, exec_lo\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_48\n; %bb.39:\n\tscratch_load_b32 v3, off, off offset:28\n\tv_mov_b32_e32 v2, 3\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:36\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_47\n; %bb.40:\n\tscratch_load_b32 v0, off, off offset:24\n\tv_mov_b32_e32 v2, 2\n\ts_mov_b32 s2, exec_lo\n\tscratch_store_b32 off, v3, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_46\n; %bb.41:\n\tscratch_load_b32 v3, off, off offset:20\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s3, exec_lo\n\tscratch_store_b32 off, v0, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_45\n; %bb.42:\n\tscratch_load_b32 v0, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s4, exec_lo\n\tscratch_store_b32 off, v3, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_44\n; %bb.43:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v0, off offset:20\n.LBB0_44:\n\ts_or_b32 exec_lo, exec_lo, s4\n.LBB0_45:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_46:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_47:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_48:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_mov_b32_e32 v2, 5\n\ts_mov_b32 s0, exec_lo\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:36\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_60\n; %bb.49:\n\tscratch_load_b32 v3, off, off offset:32\n\tv_mov_b32_e32 v2, 4\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:40\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_59\n; %bb.50:\n\tscratch_load_b32 v0, off, off offset:28\n\tv_mov_b32_e32 v2, 3\n\ts_mov_b32 s2, exec_lo\n\tscratch_store_b32 off, v3, off offset:36\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_58\n; %bb.51:\n\tscratch_load_b32 v3, off, off offset:24\n\tv_mov_b32_e32 v2, 2\n\ts_mov_b32 s3, exec_lo\n\tscratch_store_b32 off, v0, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_57\n; %bb.52:\n\tscratch_load_b32 v0, off, off offset:20\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s4, exec_lo\n\tscratch_store_b32 off, v3, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_56\n; %bb.53:\n\tscratch_load_b32 v3, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s5, exec_lo\n\tscratch_store_b32 off, v0, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_55\n; %bb.54:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v3, off offset:20\n.LBB0_55:\n\ts_or_b32 exec_lo, exec_lo, s5\n.LBB0_56:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s4\n.LBB0_57:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_58:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_59:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_60:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_mov_b32_e32 v2, 6\n\ts_mov_b32 s0, exec_lo\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:40\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_74\n; %bb.61:\n\tscratch_load_b32 v3, off, off offset:36\n\tv_mov_b32_e32 v2, 5\n\ts_mov_b32 s1, exec_lo\n\tscratch_store_b32 off, v0, off offset:44\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_73\n; %bb.62:\n\tscratch_load_b32 v0, off, off offset:32\n\tv_mov_b32_e32 v2, 4\n\ts_mov_b32 s2, exec_lo\n\tscratch_store_b32 off, v3, off offset:40\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_72\n; %bb.63:\n\tscratch_load_b32 v3, off, off offset:28\n\tv_mov_b32_e32 v2, 3\n\ts_mov_b32 s3, exec_lo\n\tscratch_store_b32 off, v0, off offset:36\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_71\n; %bb.64:\n\tscratch_load_b32 v0, off, off offset:24\n\tv_mov_b32_e32 v2, 2\n\ts_mov_b32 s4, exec_lo\n\tscratch_store_b32 off, v3, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_70\n; %bb.65:\n\tscratch_load_b32 v3, off, off offset:20\n\tv_mov_b32_e32 v2, 1\n\ts_mov_b32 s5, exec_lo\n\tscratch_store_b32 off, v0, off offset:28\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v3, v1\n\ts_cbranch_execz .LBB0_69\n; %bb.66:\n\tscratch_load_b32 v0, off, off offset:16\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s6, exec_lo\n\tscratch_store_b32 off, v3, off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v0, v1\n\ts_cbranch_execz .LBB0_68\n; %bb.67:\n\tv_mov_b32_e32 v2, -1\n\tscratch_store_b32 off, v0, off offset:20\n.LBB0_68:\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_69:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s5\n.LBB0_70:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s4\n.LBB0_71:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_72:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_73:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_74:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v2\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b64 v[0:1], off, off offset:44\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 7\n\ts_and_saveexec_b32 s0, vcc_lo\n\ts_cbranch_execz .LBB0_88\n; %bb.75:\n\tscratch_load_b32 v0, off, off offset:40\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 6\n\ts_and_saveexec_b32 s1, vcc_lo\n\ts_cbranch_execz .LBB0_87\n; %bb.76:\n\tscratch_load_b32 v0, off, off offset:36\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 5\n\ts_and_saveexec_b32 s2, vcc_lo\n\ts_cbranch_execz .LBB0_86\n; %bb.77:\n\tscratch_load_b32 v0, off, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 4\n\ts_and_saveexec_b32 s3, vcc_lo\n\ts_cbranch_execz .LBB0_85\n; %bb.78:\n\tscratch_load_b32 v2, off, off offset:28\n\tv_mov_b32_e32 v0, 3\n\ts_mov_b32 s4, exec_lo\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_gt_i32_e64 v2, v1\n\ts_cbranch_execz .LBB0_84\n; %bb.79:\n\tscratch_load_b32 v0, off, off offset:24\n\tscratch_store_b32 off, v2, off offset:32\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 2\n\ts_and_saveexec_b32 s5, vcc_lo\n\ts_cbranch_execz .LBB0_83\n; %bb.80:\n\tscratch_load_b32 v0, off, off offset:20\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_mov_b32_e32 v0, 1\n\ts_and_saveexec_b32 s6, vcc_lo\n\ts_cbranch_execz .LBB0_82\n; %bb.81:\n\tscratch_load_b32 v0, off, off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, v0, v1\n\tv_cndmask_b32_e64 v0, 0, -1, vcc_lo\n.LBB0_82:\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_83:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s5\n.LBB0_84:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s4\n.LBB0_85:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_86:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s2\n.LBB0_87:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s1\n.LBB0_88:\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_lshlrev_b32_e32 v0, 2, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_add3_u32 v0, 16, v0, 4\n\tscratch_store_b32 v0, v1, off\n\tscratch_load_b32 v2, off, off offset:32\n\tv_mad_u64_u32 v[0:1], null, v5, s12, v[4:5]\n\tv_ashrrev_i32_e32 v1, 31, v0\n\tv_add_co_u32 v0, vcc_lo, s10, v0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b8 v[0:1], v2, off\n.LBB0_89:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z18medianFilterKernelPhS_ii\n\t\t.amdhsa_group_segment_fixed_size 324\n\t\t.amdhsa_private_segment_fixed_size 64\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 14\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 1\n\t\t.amdhsa_next_free_vgpr 14\n\t\t.amdhsa_next_free_sgpr 19\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z18medianFilterKernelPhS_ii, .Lfunc_end0-_Z18medianFilterKernelPhS_ii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 2804\n; NumSgprs: 21\n; NumVgprs: 14\n; ScratchSize: 64\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 324 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 1\n; NumSGPRsForWavesPerEU: 21\n; NumVGPRsForWavesPerEU: 14\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 14\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 20\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 324\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z18medianFilterKernelPhS_ii\n .private_segment_fixed_size: 64\n .sgpr_count: 21\n .sgpr_spill_count: 0\n .symbol: _Z18medianFilterKernelPhS_ii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 14\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":73,"cells":{"id":{"kind":"string","value":"bebf8dbd8287b360f66bba9a5f4727df3daa80b6_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z10count_sortiPiS_S_ --------------------------\n .section .text._Z10count_sortiPiS_S_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=24\"\n .align 128\n\n\n\n\n .global _Z10count_sortiPiS_S_\n .type _Z10count_sortiPiS_S_,@function\n .size _Z10count_sortiPiS_S_,(.L_x_36 - _Z10count_sortiPiS_S_)\n .other _Z10count_sortiPiS_S_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z10count_sortiPiS_S_:\n.text._Z10count_sortiPiS_S_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R16, c[0x0][0x118] ;\n /*0020*/ MOV R17, c[0x0][0x11c] ;\n /*0030*/ MOV R0, RZ ;\n /*0040*/ LDC R0, c[0x0][R0+0x160] ;\n /*0050*/ MOV R0, R0 ;\n /*0060*/ MOV R2, 0x8 ;\n /*0070*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0080*/ MOV R4, R2 ;\n /*0090*/ MOV R5, R3 ;\n /*00a0*/ MOV R4, R4 ;\n /*00b0*/ MOV R5, R5 ;\n /*00c0*/ MOV R2, 0x18 ;\n /*00d0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00e0*/ MOV R6, R2 ;\n /*00f0*/ MOV R7, R3 ;\n /*0100*/ MOV R6, R6 ;\n /*0110*/ MOV R7, R7 ;\n /*0120*/ MOV R2, R4 ;\n /*0130*/ MOV R3, R5 ;\n /*0140*/ S2R R4, SR_TID.X ;\n /*0150*/ MOV R4, R4 ;\n /*0160*/ ISETP.GE.AND P0, PT, R4, R0, PT ;\n /*0170*/ MOV R0, R0 ;\n /*0180*/ MOV R6, R6 ;\n /*0190*/ MOV R7, R7 ;\n /*01a0*/ MOV R2, R2 ;\n /*01b0*/ MOV R3, R3 ;\n /*01c0*/ MOV R4, R4 ;\n /*01d0*/ @P0 BRA `(.L_x_0) ;\n /*01e0*/ MOV R5, c[0x0][0x0] ;\n /*01f0*/ MOV R6, R6 ;\n /*0200*/ MOV R7, R7 ;\n /*0210*/ MOV R13, RZ ;\n /*0220*/ MOV R5, R5 ;\n /*0230*/ MOV R6, R6 ;\n /*0240*/ MOV R7, R7 ;\n /*0250*/ MOV R13, R13 ;\n.L_x_34:\n /*0260*/ MOV R12, R13 ;\n /*0270*/ ISETP.GE.AND P0, PT, R12, R0, PT ;\n /*0280*/ MOV R12, R12 ;\n /*0290*/ BSSY B1, `(.L_x_1) ;\n /*02a0*/ @P0 BRA `(.L_x_2) ;\n /*02b0*/ IMAD.WIDE R8, R4, 0x4, RZ ;\n /*02c0*/ MOV R10, R8 ;\n /*02d0*/ MOV R8, R9 ;\n /*02e0*/ IADD3 R9, P0, R2, R10, RZ ;\n /*02f0*/ IADD3.X R15, R3, R8, RZ, P0, !PT ;\n /*0300*/ IADD3 R10, P0, R6, R10, RZ ;\n /*0310*/ IADD3.X R11, R7, R8, RZ, P0, !PT ;\n /*0320*/ IADD3 R8, R0, -R12, RZ ;\n /*0330*/ LOP3.LUT R14, R8, 0x3, RZ, 0xc0, !PT ;\n /*0340*/ ISETP.EQ.AND P0, PT, R14, RZ, PT ;\n /*0350*/ MOV R13, R12 ;\n /*0360*/ MOV R8, R9 ;\n /*0370*/ MOV R9, R15 ;\n /*0380*/ MOV R10, R10 ;\n /*0390*/ MOV R11, R11 ;\n /*03a0*/ MOV R14, R14 ;\n /*03b0*/ MOV R13, R13 ;\n /*03c0*/ BSSY B0, `(.L_x_3) ;\n /*03d0*/ @P0 BRA `(.L_x_4) ;\n /*03e0*/ MOV R18, R8 ;\n /*03f0*/ MOV R19, R9 ;\n /*0400*/ MOV R18, R18 ;\n /*0410*/ MOV R19, R19 ;\n /*0420*/ R2UR UR4, R16 ;\n /*0430*/ R2UR UR5, R17 ;\n /*0440*/ LDG.E R13, [R18.64] ;\n /*0450*/ IMAD.WIDE R18, R12, 0x4, RZ ;\n /*0460*/ MOV R15, R18 ;\n /*0470*/ MOV R20, R19 ;\n /*0480*/ IADD3 R15, P0, R2, R15, RZ ;\n /*0490*/ IADD3.X R20, R3, R20, RZ, P0, !PT ;\n /*04a0*/ MOV R18, R15 ;\n /*04b0*/ MOV R19, R20 ;\n /*04c0*/ MOV R18, R18 ;\n /*04d0*/ MOV R19, R19 ;\n /*04e0*/ R2UR UR4, R16 ;\n /*04f0*/ R2UR UR5, R17 ;\n /*0500*/ LDG.E R19, [R18.64] ;\n /*0510*/ ISETP.GT.AND P0, PT, R13, R19, PT ;\n /*0520*/ MOV R13, R13 ;\n /*0530*/ MOV R18, R15 ;\n /*0540*/ MOV R15, R20 ;\n /*0550*/ MOV R19, R19 ;\n /*0560*/ BSSY B2, `(.L_x_5) ;\n /*0570*/ BSSY B3, `(.L_x_6) ;\n /*0580*/ @P0 BRA `(.L_x_7) ;\n /*0590*/ ISETP.NE.AND P0, PT, R13, R19, PT ;\n /*05a0*/ ISETP.LE.AND P1, PT, R4, R12, PT ;\n /*05b0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*05c0*/ @P0 BREAK B3 ;\n /*05d0*/ @P0 BRA `(.L_x_8) ;\n.L_x_7:\n /*05e0*/ BSYNC B3 ;\n.L_x_6:\n /*05f0*/ MOV R20, R10 ;\n /*0600*/ MOV R21, R11 ;\n /*0610*/ MOV R20, R20 ;\n /*0620*/ MOV R21, R21 ;\n /*0630*/ R2UR UR4, R16 ;\n /*0640*/ R2UR UR5, R17 ;\n /*0650*/ LDG.E R20, [R20.64] ;\n /*0660*/ IADD3 R13, R20, 0x1, RZ ;\n /*0670*/ MOV R20, R10 ;\n /*0680*/ MOV R21, R11 ;\n /*0690*/ MOV R20, R20 ;\n /*06a0*/ MOV R21, R21 ;\n /*06b0*/ R2UR UR4, R16 ;\n /*06c0*/ R2UR UR5, R17 ;\n /*06d0*/ STG.E [R20.64], R13 ;\n /*06e0*/ BRA `(.L_x_8) ;\n.L_x_8:\n /*06f0*/ BSYNC B2 ;\n.L_x_5:\n /*0700*/ IADD3 R13, R12, 0x1, RZ ;\n /*0710*/ ISETP.EQ.AND P0, PT, R14, 0x1, PT ;\n /*0720*/ MOV R13, R13 ;\n /*0730*/ @P0 BRA `(.L_x_4) ;\n /*0740*/ MOV R20, R8 ;\n /*0750*/ MOV R21, R9 ;\n /*0760*/ MOV R20, R20 ;\n /*0770*/ MOV R21, R21 ;\n /*0780*/ R2UR UR4, R16 ;\n /*0790*/ R2UR UR5, R17 ;\n /*07a0*/ LDG.E R19, [R20.64] ;\n /*07b0*/ IADD3 R20, P0, R18, 0x4, RZ ;\n /*07c0*/ IADD3.X R21, R15, RZ, RZ, P0, !PT ;\n /*07d0*/ MOV R20, R20 ;\n /*07e0*/ MOV R21, R21 ;\n /*07f0*/ MOV R20, R20 ;\n /*0800*/ MOV R21, R21 ;\n /*0810*/ R2UR UR4, R16 ;\n /*0820*/ R2UR UR5, R17 ;\n /*0830*/ LDG.E R20, [R20.64] ;\n /*0840*/ ISETP.GT.AND P0, PT, R19, R20, PT ;\n /*0850*/ MOV R19, R19 ;\n /*0860*/ MOV R20, R20 ;\n /*0870*/ BSSY B2, `(.L_x_9) ;\n /*0880*/ BSSY B3, `(.L_x_10) ;\n /*0890*/ @P0 BRA `(.L_x_11) ;\n /*08a0*/ ISETP.NE.AND P0, PT, R19, R20, PT ;\n /*08b0*/ ISETP.LE.AND P1, PT, R4, R13, PT ;\n /*08c0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*08d0*/ @P0 BREAK B3 ;\n /*08e0*/ @P0 BRA `(.L_x_12) ;\n.L_x_11:\n /*08f0*/ BSYNC B3 ;\n.L_x_10:\n /*0900*/ MOV R20, R10 ;\n /*0910*/ MOV R21, R11 ;\n /*0920*/ MOV R20, R20 ;\n /*0930*/ MOV R21, R21 ;\n /*0940*/ R2UR UR4, R16 ;\n /*0950*/ R2UR UR5, R17 ;\n /*0960*/ LDG.E R20, [R20.64] ;\n /*0970*/ IADD3 R13, R20, 0x1, RZ ;\n /*0980*/ MOV R20, R10 ;\n /*0990*/ MOV R21, R11 ;\n /*09a0*/ MOV R20, R20 ;\n /*09b0*/ MOV R21, R21 ;\n /*09c0*/ R2UR UR4, R16 ;\n /*09d0*/ R2UR UR5, R17 ;\n /*09e0*/ STG.E [R20.64], R13 ;\n /*09f0*/ BRA `(.L_x_12) ;\n.L_x_12:\n /*0a00*/ BSYNC B2 ;\n.L_x_9:\n /*0a10*/ IADD3 R13, R12, 0x2, RZ ;\n /*0a20*/ ISETP.EQ.AND P0, PT, R14, 0x2, PT ;\n /*0a30*/ MOV R13, R13 ;\n /*0a40*/ @P0 BRA `(.L_x_4) ;\n /*0a50*/ MOV R20, R8 ;\n /*0a60*/ MOV R21, R9 ;\n /*0a70*/ MOV R20, R20 ;\n /*0a80*/ MOV R21, R21 ;\n /*0a90*/ R2UR UR4, R16 ;\n /*0aa0*/ R2UR UR5, R17 ;\n /*0ab0*/ LDG.E R20, [R20.64] ;\n /*0ac0*/ IADD3 R14, P0, R18, 0x8, RZ ;\n /*0ad0*/ IADD3.X R15, R15, RZ, RZ, P0, !PT ;\n /*0ae0*/ MOV R14, R14 ;\n /*0af0*/ MOV R15, R15 ;\n /*0b00*/ MOV R14, R14 ;\n /*0b10*/ MOV R15, R15 ;\n /*0b20*/ R2UR UR4, R16 ;\n /*0b30*/ R2UR UR5, R17 ;\n /*0b40*/ LDG.E R14, [R14.64] ;\n /*0b50*/ ISETP.GT.AND P0, PT, R20, R14, PT ;\n /*0b60*/ MOV R20, R20 ;\n /*0b70*/ MOV R14, R14 ;\n /*0b80*/ BSSY B2, `(.L_x_13) ;\n /*0b90*/ BSSY B3, `(.L_x_14) ;\n /*0ba0*/ @P0 BRA `(.L_x_15) ;\n /*0bb0*/ ISETP.NE.AND P0, PT, R20, R14, PT ;\n /*0bc0*/ ISETP.LE.AND P1, PT, R4, R13, PT ;\n /*0bd0*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*0be0*/ @P0 BREAK B3 ;\n /*0bf0*/ @P0 BRA `(.L_x_16) ;\n.L_x_15:\n /*0c00*/ BSYNC B3 ;\n.L_x_14:\n /*0c10*/ MOV R14, R10 ;\n /*0c20*/ MOV R15, R11 ;\n /*0c30*/ MOV R14, R14 ;\n /*0c40*/ MOV R15, R15 ;\n /*0c50*/ R2UR UR4, R16 ;\n /*0c60*/ R2UR UR5, R17 ;\n /*0c70*/ LDG.E R14, [R14.64] ;\n /*0c80*/ IADD3 R13, R14, 0x1, RZ ;\n /*0c90*/ MOV R14, R10 ;\n /*0ca0*/ MOV R15, R11 ;\n /*0cb0*/ MOV R14, R14 ;\n /*0cc0*/ MOV R15, R15 ;\n /*0cd0*/ R2UR UR4, R16 ;\n /*0ce0*/ R2UR UR5, R17 ;\n /*0cf0*/ STG.E [R14.64], R13 ;\n /*0d00*/ BRA `(.L_x_16) ;\n.L_x_16:\n /*0d10*/ BSYNC B2 ;\n.L_x_13:\n /*0d20*/ IADD3 R13, R12, 0x3, RZ ;\n /*0d30*/ MOV R13, R13 ;\n.L_x_4:\n /*0d40*/ BSYNC B0 ;\n.L_x_3:\n /*0d50*/ LOP3.LUT R12, RZ, R12, RZ, 0x33, !PT ;\n /*0d60*/ IADD3 R12, R12, R0, RZ ;\n /*0d70*/ ISETP.LT.U32.AND P0, PT, R12, 0x3, PT ;\n /*0d80*/ @P0 BRA `(.L_x_2) ;\n /*0d90*/ IMAD.WIDE R14, R13, 0x4, RZ ;\n /*0da0*/ MOV R12, R14 ;\n /*0db0*/ MOV R14, R15 ;\n /*0dc0*/ IADD3 R12, P0, R2, R12, RZ ;\n /*0dd0*/ IADD3.X R14, R3, R14, RZ, P0, !PT ;\n /*0de0*/ MOV R12, R12 ;\n /*0df0*/ MOV R14, R14 ;\n.L_x_33:\n /*0e00*/ MOV R18, R12 ;\n /*0e10*/ MOV R19, R14 ;\n /*0e20*/ MOV R18, R18 ;\n /*0e30*/ MOV R19, R19 ;\n /*0e40*/ R2UR UR4, R16 ;\n /*0e50*/ R2UR UR5, R17 ;\n /*0e60*/ LDG.E R15, [R18.64] ;\n /*0e70*/ MOV R18, R8 ;\n /*0e80*/ MOV R19, R9 ;\n /*0e90*/ MOV R18, R18 ;\n /*0ea0*/ MOV R19, R19 ;\n /*0eb0*/ R2UR UR4, R16 ;\n /*0ec0*/ R2UR UR5, R17 ;\n /*0ed0*/ LDG.E R18, [R18.64] ;\n /*0ee0*/ ISETP.GT.AND P0, PT, R18, R15, PT ;\n /*0ef0*/ MOV R19, R15 ;\n /*0f00*/ MOV R15, R18 ;\n /*0f10*/ BSSY B0, `(.L_x_17) ;\n /*0f20*/ BSSY B2, `(.L_x_18) ;\n /*0f30*/ @P0 BRA `(.L_x_19) ;\n /*0f40*/ ISETP.NE.AND P0, PT, R15, R19, PT ;\n /*0f50*/ ISETP.LE.AND P1, PT, R4, R13, PT ;\n /*0f60*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*0f70*/ @P0 BREAK B2 ;\n /*0f80*/ @P0 BRA `(.L_x_20) ;\n.L_x_19:\n /*0f90*/ BSYNC B2 ;\n.L_x_18:\n /*0fa0*/ MOV R18, R10 ;\n /*0fb0*/ MOV R19, R11 ;\n /*0fc0*/ MOV R18, R18 ;\n /*0fd0*/ MOV R19, R19 ;\n /*0fe0*/ R2UR UR4, R16 ;\n /*0ff0*/ R2UR UR5, R17 ;\n /*1000*/ LDG.E R18, [R18.64] ;\n /*1010*/ IADD3 R15, R18, 0x1, RZ ;\n /*1020*/ MOV R18, R10 ;\n /*1030*/ MOV R19, R11 ;\n /*1040*/ MOV R18, R18 ;\n /*1050*/ MOV R19, R19 ;\n /*1060*/ R2UR UR4, R16 ;\n /*1070*/ R2UR UR5, R17 ;\n /*1080*/ STG.E [R18.64], R15 ;\n /*1090*/ MOV R18, R8 ;\n /*10a0*/ MOV R19, R9 ;\n /*10b0*/ MOV R18, R18 ;\n /*10c0*/ MOV R19, R19 ;\n /*10d0*/ R2UR UR4, R16 ;\n /*10e0*/ R2UR UR5, R17 ;\n /*10f0*/ LDG.E R18, [R18.64] ;\n /*1100*/ MOV R15, R18 ;\n /*1110*/ BRA `(.L_x_20) ;\n.L_x_20:\n /*1120*/ BSYNC B0 ;\n.L_x_17:\n /*1130*/ IADD3 R18, P0, R12, 0x4, RZ ;\n /*1140*/ IADD3.X R19, R14, RZ, RZ, P0, !PT ;\n /*1150*/ MOV R18, R18 ;\n /*1160*/ MOV R19, R19 ;\n /*1170*/ MOV R18, R18 ;\n /*1180*/ MOV R19, R19 ;\n /*1190*/ R2UR UR4, R16 ;\n /*11a0*/ R2UR UR5, R17 ;\n /*11b0*/ LDG.E R18, [R18.64] ;\n /*11c0*/ ISETP.GT.AND P0, PT, R15, R18, PT ;\n /*11d0*/ MOV R18, R18 ;\n /*11e0*/ BSSY B0, `(.L_x_21) ;\n /*11f0*/ BSSY B2, `(.L_x_22) ;\n /*1200*/ @P0 BRA `(.L_x_23) ;\n /*1210*/ ISETP.NE.AND P0, PT, R15, R18, PT ;\n /*1220*/ IADD3 R18, R13, 0x1, RZ ;\n /*1230*/ ISETP.LE.AND P1, PT, R4, R18, PT ;\n /*1240*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*1250*/ @P0 BREAK B2 ;\n /*1260*/ @P0 BRA `(.L_x_24) ;\n.L_x_23:\n /*1270*/ BSYNC B2 ;\n.L_x_22:\n /*1280*/ MOV R18, R10 ;\n /*1290*/ MOV R19, R11 ;\n /*12a0*/ MOV R18, R18 ;\n /*12b0*/ MOV R19, R19 ;\n /*12c0*/ R2UR UR4, R16 ;\n /*12d0*/ R2UR UR5, R17 ;\n /*12e0*/ LDG.E R18, [R18.64] ;\n /*12f0*/ IADD3 R15, R18, 0x1, RZ ;\n /*1300*/ MOV R18, R10 ;\n /*1310*/ MOV R19, R11 ;\n /*1320*/ MOV R18, R18 ;\n /*1330*/ MOV R19, R19 ;\n /*1340*/ R2UR UR4, R16 ;\n /*1350*/ R2UR UR5, R17 ;\n /*1360*/ STG.E [R18.64], R15 ;\n /*1370*/ MOV R18, R8 ;\n /*1380*/ MOV R19, R9 ;\n /*1390*/ MOV R18, R18 ;\n /*13a0*/ MOV R19, R19 ;\n /*13b0*/ R2UR UR4, R16 ;\n /*13c0*/ R2UR UR5, R17 ;\n /*13d0*/ LDG.E R18, [R18.64] ;\n /*13e0*/ MOV R15, R18 ;\n /*13f0*/ BRA `(.L_x_24) ;\n.L_x_24:\n /*1400*/ BSYNC B0 ;\n.L_x_21:\n /*1410*/ IADD3 R18, P0, R12, 0x8, RZ ;\n /*1420*/ IADD3.X R19, R14, RZ, RZ, P0, !PT ;\n /*1430*/ MOV R18, R18 ;\n /*1440*/ MOV R19, R19 ;\n /*1450*/ MOV R18, R18 ;\n /*1460*/ MOV R19, R19 ;\n /*1470*/ R2UR UR4, R16 ;\n /*1480*/ R2UR UR5, R17 ;\n /*1490*/ LDG.E R18, [R18.64] ;\n /*14a0*/ ISETP.GT.AND P0, PT, R15, R18, PT ;\n /*14b0*/ MOV R18, R18 ;\n /*14c0*/ BSSY B0, `(.L_x_25) ;\n /*14d0*/ BSSY B2, `(.L_x_26) ;\n /*14e0*/ @P0 BRA `(.L_x_27) ;\n /*14f0*/ ISETP.NE.AND P0, PT, R15, R18, PT ;\n /*1500*/ IADD3 R18, R13, 0x2, RZ ;\n /*1510*/ ISETP.LE.AND P1, PT, R4, R18, PT ;\n /*1520*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*1530*/ @P0 BREAK B2 ;\n /*1540*/ @P0 BRA `(.L_x_28) ;\n.L_x_27:\n /*1550*/ BSYNC B2 ;\n.L_x_26:\n /*1560*/ MOV R18, R10 ;\n /*1570*/ MOV R19, R11 ;\n /*1580*/ MOV R18, R18 ;\n /*1590*/ MOV R19, R19 ;\n /*15a0*/ R2UR UR4, R16 ;\n /*15b0*/ R2UR UR5, R17 ;\n /*15c0*/ LDG.E R18, [R18.64] ;\n /*15d0*/ IADD3 R15, R18, 0x1, RZ ;\n /*15e0*/ MOV R18, R10 ;\n /*15f0*/ MOV R19, R11 ;\n /*1600*/ MOV R18, R18 ;\n /*1610*/ MOV R19, R19 ;\n /*1620*/ R2UR UR4, R16 ;\n /*1630*/ R2UR UR5, R17 ;\n /*1640*/ STG.E [R18.64], R15 ;\n /*1650*/ MOV R18, R8 ;\n /*1660*/ MOV R19, R9 ;\n /*1670*/ MOV R18, R18 ;\n /*1680*/ MOV R19, R19 ;\n /*1690*/ R2UR UR4, R16 ;\n /*16a0*/ R2UR UR5, R17 ;\n /*16b0*/ LDG.E R18, [R18.64] ;\n /*16c0*/ MOV R15, R18 ;\n /*16d0*/ BRA `(.L_x_28) ;\n.L_x_28:\n /*16e0*/ BSYNC B0 ;\n.L_x_25:\n /*16f0*/ IADD3 R18, P0, R12, 0xc, RZ ;\n /*1700*/ IADD3.X R19, R14, RZ, RZ, P0, !PT ;\n /*1710*/ MOV R18, R18 ;\n /*1720*/ MOV R19, R19 ;\n /*1730*/ MOV R18, R18 ;\n /*1740*/ MOV R19, R19 ;\n /*1750*/ R2UR UR4, R16 ;\n /*1760*/ R2UR UR5, R17 ;\n /*1770*/ LDG.E R18, [R18.64] ;\n /*1780*/ ISETP.GT.AND P0, PT, R15, R18, PT ;\n /*1790*/ MOV R18, R18 ;\n /*17a0*/ BSSY B0, `(.L_x_29) ;\n /*17b0*/ BSSY B2, `(.L_x_30) ;\n /*17c0*/ @P0 BRA `(.L_x_31) ;\n /*17d0*/ ISETP.NE.AND P0, PT, R15, R18, PT ;\n /*17e0*/ IADD3 R15, R13, 0x3, RZ ;\n /*17f0*/ ISETP.LE.AND P1, PT, R4, R15, PT ;\n /*1800*/ PLOP3.LUT P0, PT, P1, P0, PT, 0xa8, 0x0 ;\n /*1810*/ @P0 BREAK B2 ;\n /*1820*/ @P0 BRA `(.L_x_32) ;\n.L_x_31:\n /*1830*/ BSYNC B2 ;\n.L_x_30:\n /*1840*/ MOV R18, R10 ;\n /*1850*/ MOV R19, R11 ;\n /*1860*/ MOV R18, R18 ;\n /*1870*/ MOV R19, R19 ;\n /*1880*/ R2UR UR4, R16 ;\n /*1890*/ R2UR UR5, R17 ;\n /*18a0*/ LDG.E R18, [R18.64] ;\n /*18b0*/ IADD3 R15, R18, 0x1, RZ ;\n /*18c0*/ MOV R18, R10 ;\n /*18d0*/ MOV R19, R11 ;\n /*18e0*/ MOV R18, R18 ;\n /*18f0*/ MOV R19, R19 ;\n /*1900*/ R2UR UR4, R16 ;\n /*1910*/ R2UR UR5, R17 ;\n /*1920*/ STG.E [R18.64], R15 ;\n /*1930*/ BRA `(.L_x_32) ;\n.L_x_32:\n /*1940*/ BSYNC B0 ;\n.L_x_29:\n /*1950*/ IADD3 R12, P0, R12, 0x10, RZ ;\n /*1960*/ IADD3.X R14, R14, RZ, RZ, P0, !PT ;\n /*1970*/ IADD3 R13, R13, 0x4, RZ ;\n /*1980*/ ISETP.LT.AND P0, PT, R13, R0, PT ;\n /*1990*/ MOV R12, R12 ;\n /*19a0*/ MOV R14, R14 ;\n /*19b0*/ MOV R13, R13 ;\n /*19c0*/ @P0 BRA `(.L_x_33) ;\n.L_x_2:\n /*19d0*/ BSYNC B1 ;\n.L_x_1:\n /*19e0*/ IADD3 R4, R4, R5, RZ ;\n /*19f0*/ ISETP.LT.AND P0, PT, R4, R0, PT ;\n /*1a00*/ MOV R4, R4 ;\n /*1a10*/ @P0 BRA `(.L_x_34) ;\n.L_x_0:\n /*1a20*/ EXIT ;\n.L_x_35:\n /*1a30*/ BRA `(.L_x_35);\n /*1a40*/ NOP;\n /*1a50*/ NOP;\n /*1a60*/ NOP;\n /*1a70*/ NOP;\n /*1a80*/ NOP;\n /*1a90*/ NOP;\n /*1aa0*/ NOP;\n /*1ab0*/ NOP;\n /*1ac0*/ NOP;\n /*1ad0*/ NOP;\n /*1ae0*/ NOP;\n /*1af0*/ NOP;\n.L_x_36:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"sort_gpu.hip\"\n\t.globl\t_Z25__device_stub__count_sortiPiS_S_ # -- Begin function _Z25__device_stub__count_sortiPiS_S_\n\t.p2align\t4, 0x90\n\t.type\t_Z25__device_stub__count_sortiPiS_S_,@function\n_Z25__device_stub__count_sortiPiS_S_: # @_Z25__device_stub__count_sortiPiS_S_\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovl\t%edi, 4(%rsp)\n\tmovq\t%rsi, 72(%rsp)\n\tmovq\t%rdx, 64(%rsp)\n\tmovq\t%rcx, 56(%rsp)\n\tleaq\t4(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t40(%rsp), %rdi\n\tleaq\t24(%rsp), %rsi\n\tleaq\t16(%rsp), %rdx\n\tleaq\t8(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t40(%rsp), %rsi\n\tmovl\t48(%rsp), %edx\n\tmovq\t24(%rsp), %rcx\n\tmovl\t32(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z10count_sortiPiS_S_, %edi\n\tpushq\t8(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t24(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z25__device_stub__count_sortiPiS_S_, .Lfunc_end0-_Z25__device_stub__count_sortiPiS_S_\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 32\n\tsubq\t$144, %rsp\n\t.cfi_def_cfa_offset 176\n\t.cfi_offset %rbx, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %rbp, -16\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tmovl\t$1, %edx\n\tcallq\thipMallocManaged\n\tleaq\t32(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tmovl\t$1, %edx\n\tcallq\thipMallocManaged\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tmovl\t$1, %edx\n\tcallq\thipMallocManaged\n\txorl\t%ecx, %ecx\n\tmovq\t16(%rsp), %rax\n\t.p2align\t4, 0x90\n.LBB1_1: # =>This Inner Loop Header: Depth=1\n\tleal\t1(%rcx), %edx\n\tmovl\t%edx, (%rax,%rcx,4)\n\tleal\t2(%rcx), %edx\n\tmovl\t%edx, 4(%rax,%rcx,4)\n\tleal\t3(%rcx), %edx\n\tmovl\t%edx, 8(%rax,%rcx,4)\n\tleal\t4(%rcx), %edx\n\tmovl\t%edx, 12(%rax,%rcx,4)\n\tleal\t5(%rcx), %edx\n\tmovl\t%edx, 16(%rax,%rcx,4)\n\tleal\t6(%rcx), %edx\n\tmovl\t%edx, 20(%rax,%rcx,4)\n\tleal\t7(%rcx), %edx\n\tmovl\t%edx, 24(%rax,%rcx,4)\n\tleaq\t8(%rcx), %rdx\n\tmovl\t%edx, 28(%rax,%rcx,4)\n\tmovq\t%rdx, %rcx\n\tcmpq\t$2048, %rdx # imm = 0x800\n\tjne\t.LBB1_1\n# %bb.2:\n\tmovq\t8(%rsp), %rdi\n\txorl\t%ebx, %ebx\n\tmovl\t$8192, %edx # imm = 0x2000\n\txorl\t%esi, %esi\n\tcallq\tmemset@PLT\n\tmovabsq\t$4294967297, %rdi # imm = 0x100000001\n\tleaq\t255(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_4\n# %bb.3:\n\tmovq\t16(%rsp), %rax\n\tmovq\t32(%rsp), %rcx\n\tmovq\t8(%rsp), %rdx\n\tmovl\t$2048, 28(%rsp) # imm = 0x800\n\tmovq\t%rax, 104(%rsp)\n\tmovq\t%rcx, 96(%rsp)\n\tmovq\t%rdx, 88(%rsp)\n\tleaq\t28(%rsp), %rax\n\tmovq\t%rax, 112(%rsp)\n\tleaq\t104(%rsp), %rax\n\tmovq\t%rax, 120(%rsp)\n\tleaq\t96(%rsp), %rax\n\tmovq\t%rax, 128(%rsp)\n\tleaq\t88(%rsp), %rax\n\tmovq\t%rax, 136(%rsp)\n\tleaq\t72(%rsp), %rdi\n\tleaq\t56(%rsp), %rsi\n\tleaq\t48(%rsp), %rdx\n\tleaq\t40(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t72(%rsp), %rsi\n\tmovl\t80(%rsp), %edx\n\tmovq\t56(%rsp), %rcx\n\tmovl\t64(%rsp), %r8d\n\tleaq\t112(%rsp), %r9\n\tmovl\t$_Z10count_sortiPiS_S_, %edi\n\tpushq\t40(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t56(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$16, %rsp\n\t.cfi_adjust_cfa_offset -16\n.LBB1_4:\n\tcallq\thipDeviceSynchronize\n\tmovb\t$1, %bpl\n\tmovq\t8(%rsp), %rax\n\txorl\t%r14d, %r14d\n\t.p2align\t4, 0x90\n.LBB1_5: # =>This Inner Loop Header: Depth=1\n\tmovl\t(%rax,%r14,4), %esi\n\tmovl\t$.L.str, %edi\n\txorl\t%eax, %eax\n\tcallq\tprintf\n\tmovq\t8(%rsp), %rax\n\tmovl\t(%rax,%r14,4), %ecx\n\tcmpq\t%rcx, %r14\n\tmovzbl\t%bpl, %ebp\n\tcmovnel\t%ebx, %ebp\n\tincq\t%r14\n\tcmpq\t$2048, %r14 # imm = 0x800\n\tjne\t.LBB1_5\n# %bb.6:\n\ttestb\t$1, %bpl\n\tmovl\t$.Lstr, %eax\n\tmovl\t$.Lstr.3, %edi\n\tcmoveq\t%rax, %rdi\n\tcallq\tputs@PLT\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t32(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\txorl\t%eax, %eax\n\taddq\t$144, %rsp\n\t.cfi_def_cfa_offset 32\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB2_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB2_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z10count_sortiPiS_S_, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end2:\n\t.size\t__hip_module_ctor, .Lfunc_end2-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB3_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB3_2:\n\tretq\n.Lfunc_end3:\n\t.size\t__hip_module_dtor, .Lfunc_end3-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_Z10count_sortiPiS_S_,@object # @_Z10count_sortiPiS_S_\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z10count_sortiPiS_S_\n\t.p2align\t3, 0x0\n_Z10count_sortiPiS_S_:\n\t.quad\t_Z25__device_stub__count_sortiPiS_S_\n\t.size\t_Z10count_sortiPiS_S_, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"%d \"\n\t.size\t.L.str, 4\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z10count_sortiPiS_S_\"\n\t.size\t.L__unnamed_1, 22\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.type\t.Lstr,@object # @str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.Lstr:\n\t.asciz\t\"\\nFalse \"\n\t.size\t.Lstr, 8\n\n\t.type\t.Lstr.3,@object # @str.3\n.Lstr.3:\n\t.asciz\t\"\\nTrue \"\n\t.size\t.Lstr.3, 7\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":74,"cells":{"id":{"kind":"string","value":"ed160102b6a95830f33b50b59fea5f18446d0de5_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z23parallelReductionKernelPfS_j --------------------------\n .section .text._Z23parallelReductionKernelPfS_j,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=16\"\n .align 128\n\n\n\n\n .global _Z23parallelReductionKernelPfS_j\n .type _Z23parallelReductionKernelPfS_j,@function\n .size _Z23parallelReductionKernelPfS_j,(.L_x_5 - _Z23parallelReductionKernelPfS_j)\n .other _Z23parallelReductionKernelPfS_j,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z23parallelReductionKernelPfS_j:\n.text._Z23parallelReductionKernelPfS_j:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R6, SR_CTAID.X ;\n /*0020*/ MOV R4, RZ ;\n /*0030*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0040*/ S2R R13, SR_TID.X ;\n /*0050*/ IMAD R2, R6, c[0x0][0x0], R13 ;\n /*0060*/ ISETP.GE.U32.AND P0, PT, R2, c[0x0][0x170], PT ;\n /*0070*/ @!P0 MOV R3, 0x4 ;\n /*0080*/ @!P0 IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ;\n /*0090*/ @!P0 LDG.E R4, [R2.64] ;\n /*00a0*/ IMAD.MOV.U32 R0, RZ, RZ, c[0x0][0x0] ;\n /*00b0*/ SHF.L.U32 R5, R13, 0x2, RZ ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R0, 0x42, PT ;\n /*00d0*/ STS [R13.X4], R4 ;\n /*00e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*00f0*/ @!P0 BRA `(.L_x_0) ;\n.L_x_1:\n /*0100*/ SHF.R.U32.HI R4, RZ, 0x1, R0 ;\n /*0110*/ ISETP.GE.U32.AND P0, PT, R13, R4, PT ;\n /*0120*/ @!P0 IMAD R2, R4, 0x4, R5 ;\n /*0130*/ @!P0 LDS R3, [R13.X4] ;\n /*0140*/ @!P0 LDS R2, [R2] ;\n /*0150*/ @!P0 FADD R3, R3, R2 ;\n /*0160*/ @!P0 STS [R13.X4], R3 ;\n /*0170*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0180*/ ISETP.GT.U32.AND P0, PT, R0, 0x83, PT ;\n /*0190*/ MOV R0, R4 ;\n /*01a0*/ @P0 BRA `(.L_x_1) ;\n.L_x_0:\n /*01b0*/ ISETP.GT.U32.AND P0, PT, R13, 0x1f, PT ;\n /*01c0*/ BSSY B0, `(.L_x_2) ;\n /*01d0*/ @P0 BRA `(.L_x_3) ;\n /*01e0*/ LDS R0, [R13.X4] ;\n /*01f0*/ LDS R3, [R13.X4+0x80] ;\n /*0200*/ LDS R5, [R13.X4+0x40] ;\n /*0210*/ LDS R7, [R13.X4+0x20] ;\n /*0220*/ LDS R9, [R13.X4+0x10] ;\n /*0230*/ LDS R11, [R13.X4+0x8] ;\n /*0240*/ FADD R0, R0, R3 ;\n /*0250*/ LDS R3, [R13.X4+0x4] ;\n /*0260*/ FADD R0, R0, R5 ;\n /*0270*/ FADD R0, R0, R7 ;\n /*0280*/ FADD R0, R0, R9 ;\n /*0290*/ FADD R0, R0, R11 ;\n /*02a0*/ FADD R0, R0, R3 ;\n /*02b0*/ STS [R13.X4], R0 ;\n.L_x_3:\n /*02c0*/ BSYNC B0 ;\n.L_x_2:\n /*02d0*/ ISETP.NE.AND P0, PT, R13, RZ, PT ;\n /*02e0*/ @P0 EXIT ;\n /*02f0*/ LDS R5, [RZ] ;\n /*0300*/ MOV R3, 0x4 ;\n /*0310*/ IMAD.WIDE.U32 R2, R6, R3, c[0x0][0x168] ;\n /*0320*/ STG.E [R2.64], R5 ;\n /*0330*/ EXIT ;\n.L_x_4:\n /*0340*/ BRA `(.L_x_4);\n /*0350*/ NOP;\n /*0360*/ NOP;\n /*0370*/ NOP;\n /*0380*/ NOP;\n /*0390*/ NOP;\n /*03a0*/ NOP;\n /*03b0*/ NOP;\n /*03c0*/ NOP;\n /*03d0*/ NOP;\n /*03e0*/ NOP;\n /*03f0*/ NOP;\n.L_x_5:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z23parallelReductionKernelPfS_j ; -- Begin function _Z23parallelReductionKernelPfS_j\n\t.globl\t_Z23parallelReductionKernelPfS_j\n\t.p2align\t8\n\t.type\t_Z23parallelReductionKernelPfS_j,@function\n_Z23parallelReductionKernelPfS_j: ; @_Z23parallelReductionKernelPfS_j\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s3, s[0:1], 0x24\n\ts_load_b32 s4, s[0:1], 0x10\n\ts_mov_b32 s2, s15\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s3, s3, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mad_u64_u32 v[1:2], null, s2, s3, v[0:1]\n\tv_mov_b32_e32 v2, 0\n\tv_cmp_gt_u32_e32 vcc_lo, s4, v1\n\ts_and_saveexec_b32 s4, vcc_lo\n\ts_cbranch_execz .LBB0_2\n; %bb.1:\n\ts_load_b64 s[6:7], s[0:1], 0x0\n\tv_mov_b32_e32 v2, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[1:2], 2, v[1:2]\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v1, vcc_lo, s6, v1\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v2, vcc_lo, s7, v2, vcc_lo\n\tglobal_load_b32 v2, v[1:2], off\n.LBB0_2:\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_lshl_add_u32 v1, v0, 2, 0\n\ts_cmpk_lt_u32 s3, 0x42\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v1, v2\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\ts_branch .LBB0_4\n\t.p2align\t6\n.LBB0_3: ; in Loop: Header=BB0_4 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s5\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\ts_cmpk_lt_u32 s3, 0x84\n\ts_mov_b32 s3, s4\n.LBB0_4: ; =>This Inner Loop Header: Depth=1\n\tbuffer_gl0_inv\n\ts_cbranch_scc1 .LBB0_7\n; %bb.5: ; in Loop: Header=BB0_4 Depth=1\n\ts_lshr_b32 s4, s3, 1\n\ts_mov_b32 s5, exec_lo\n\tv_cmpx_gt_u32_e64 s4, v0\n\ts_cbranch_execz .LBB0_3\n; %bb.6: ; in Loop: Header=BB0_4 Depth=1\n\tv_add_nc_u32_e32 v2, s4, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshl_add_u32 v2, v2, 2, 0\n\tds_load_b32 v2, v2\n\tds_load_b32 v3, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_add_f32_e32 v2, v2, v3\n\tds_store_b32 v1, v2\n\ts_branch .LBB0_3\n.LBB0_7:\n\ts_mov_b32 s3, exec_lo\n\tv_cmpx_gt_u32_e32 32, v0\n\ts_cbranch_execz .LBB0_9\n; %bb.8:\n\tv_lshl_add_u32 v6, v0, 2, 0\n\tds_load_b32 v7, v1\n\tds_load_2addr_b32 v[2:3], v6 offset0:16 offset1:32\n\tds_load_2addr_b32 v[4:5], v6 offset0:4 offset1:8\n\ts_waitcnt lgkmcnt(1)\n\tv_add_f32_e32 v3, v3, v7\n\tds_load_2addr_b32 v[6:7], v6 offset0:1 offset1:2\n\tv_add_f32_e32 v2, v3, v2\n\ts_waitcnt lgkmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_f32_e32 v2, v2, v5\n\tv_add_f32_e32 v2, v2, v4\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_f32_e32 v2, v2, v7\n\tv_add_f32_e32 v2, v2, v6\n\tds_store_b32 v1, v2\n.LBB0_9:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_mov_b32 s3, exec_lo\n\tv_cmpx_eq_u32_e32 0, v0\n\ts_cbranch_execz .LBB0_11\n; %bb.10:\n\tv_dual_mov_b32 v0, 0 :: v_dual_mov_b32 v1, 0\n\ts_load_b64 s[0:1], s[0:1], 0x8\n\ts_mov_b32 s3, 0\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_lshl_b64 s[2:3], s[2:3], 2\n\tds_load_b32 v0, v0\n\ts_waitcnt lgkmcnt(0)\n\ts_add_u32 s0, s0, s2\n\ts_addc_u32 s1, s1, s3\n\tglobal_store_b32 v1, v0, s[0:1]\n.LBB0_11:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z23parallelReductionKernelPfS_j\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 8\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z23parallelReductionKernelPfS_j, .Lfunc_end0-_Z23parallelReductionKernelPfS_j\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 452\n; NumSgprs: 18\n; NumVgprs: 8\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 0\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 8\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 144\n .size: 4\n .value_kind: hidden_dynamic_lds_size\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z23parallelReductionKernelPfS_j\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z23parallelReductionKernelPfS_j.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 8\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":75,"cells":{"id":{"kind":"string","value":"b119d83011fbc3aee55ec6ecdf755bb334a6bbc5_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z11PowerKernalPiS_i --------------------------\n .section .text._Z11PowerKernalPiS_i,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=8\"\n .align 128\n\n\n\n\n .global _Z11PowerKernalPiS_i\n .type _Z11PowerKernalPiS_i,@function\n .size _Z11PowerKernalPiS_i,(.L_x_6 - _Z11PowerKernalPiS_i)\n .other _Z11PowerKernalPiS_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z11PowerKernalPiS_i:\n.text._Z11PowerKernalPiS_i:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R0, SR_CTAID.X ;\n /*0020*/ ISETP.NE.AND P0, PT, RZ, c[0x0][0x170], PT ;\n /*0030*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0040*/ IMAD.MOV.U32 R5, RZ, RZ, RZ ;\n /*0050*/ S2R R3, SR_TID.X ;\n /*0060*/ IMAD R0, R0, c[0x0][0x0], R3 ;\n /*0070*/ @!P0 BRA `(.L_x_0) ;\n /*0080*/ IMAD.MOV.U32 R2, RZ, RZ, c[0x0][0x170] ;\n /*0090*/ UMOV UR4, URZ ;\n /*00a0*/ IADD3 R3, R2.reuse, -0x1, RZ ;\n /*00b0*/ LOP3.LUT R2, R2, 0x3, RZ, 0xc0, !PT ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R3, 0x3, PT ;\n /*00d0*/ @!P0 BRA `(.L_x_1) ;\n /*00e0*/ IADD3 R3, -R2, c[0x0][0x170], RZ ;\n /*00f0*/ UMOV UR5, 0xffffffff ;\n.L_x_2:\n /*0100*/ IADD3 R3, R3, -0x4, RZ ;\n /*0110*/ UIADD3 UR5, UR5, 0x4, URZ ;\n /*0120*/ ISETP.NE.AND P0, PT, R3, RZ, PT ;\n /*0130*/ @P0 BRA `(.L_x_2) ;\n /*0140*/ UIADD3 UR4, UR5, 0x1, URZ ;\n.L_x_1:\n /*0150*/ ISETP.NE.AND P0, PT, R2, RZ, PT ;\n /*0160*/ @!P0 BRA `(.L_x_3) ;\n /*0170*/ UIADD3 UR5, UR4, -0x1, URZ ;\n.L_x_4:\n /*0180*/ IADD3 R2, R2, -0x1, RZ ;\n /*0190*/ UIADD3 UR5, UR5, 0x1, URZ ;\n /*01a0*/ ISETP.NE.AND P0, PT, R2, RZ, PT ;\n /*01b0*/ @P0 BRA `(.L_x_4) ;\n.L_x_3:\n /*01c0*/ LEA R2, R0, 0x86960000, 0x5 ;\n /*01d0*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ;\n /*01e0*/ IMAD.WIDE.U32 R2, R2, R3, c[0x0][0x160] ;\n /*01f0*/ LDG.E R2, [R2.64] ;\n /*0200*/ IADD3 R5, R2, UR5, RZ ;\n.L_x_0:\n /*0210*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ;\n /*0220*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ;\n /*0230*/ STG.E [R2.64], R5 ;\n /*0240*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0250*/ EXIT ;\n.L_x_5:\n /*0260*/ BRA `(.L_x_5);\n /*0270*/ NOP;\n /*0280*/ NOP;\n /*0290*/ NOP;\n /*02a0*/ NOP;\n /*02b0*/ NOP;\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n.L_x_6:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"dram_1.hip\"\n\t.globl\t_Z26__device_stub__PowerKernalPiS_i # -- Begin function _Z26__device_stub__PowerKernalPiS_i\n\t.p2align\t4, 0x90\n\t.type\t_Z26__device_stub__PowerKernalPiS_i,@function\n_Z26__device_stub__PowerKernalPiS_i: # @_Z26__device_stub__PowerKernalPiS_i\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$104, %rsp\n\t.cfi_def_cfa_offset 112\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovl\t%edx, 12(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t12(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t48(%rsp), %rdi\n\tleaq\t32(%rsp), %rsi\n\tleaq\t24(%rsp), %rdx\n\tleaq\t16(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t48(%rsp), %rsi\n\tmovl\t56(%rsp), %edx\n\tmovq\t32(%rsp), %rcx\n\tmovl\t40(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z11PowerKernalPiS_i, %edi\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$120, %rsp\n\t.cfi_adjust_cfa_offset -120\n\tretq\n.Lfunc_end0:\n\t.size\t_Z26__device_stub__PowerKernalPiS_i, .Lfunc_end0-_Z26__device_stub__PowerKernalPiS_i\n\t.cfi_endproc\n # -- End function\n\t.section\t.rodata.cst4,\"aM\",@progbits,4\n\t.p2align\t2, 0x0 # -- Begin function main\n.LCPI1_0:\n\t.long\t0x447a0000 # float 1000\n\t.text\n\t.globl\tmain\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 32\n\tsubq\t$128, %rsp\n\t.cfi_def_cfa_offset 160\n\t.cfi_offset %rbx, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %rbp, -16\n\tcmpl\t$2, %edi\n\tjne\t.LBB1_56\n# %bb.1:\n\tmovabsq\t$9037152256, %rbx # imm = 0x21AA80000\n\tmovq\t8(%rsi), %rdi\n\txorl\t%esi, %esi\n\tmovl\t$10, %edx\n\tcallq\tstrtol\n\tmovq\t%rax, %r14\n\tmovl\t$.L.str.1, %edi\n\tmovl\t%r14d, %esi\n\txorl\t%eax, %eax\n\tcallq\tprintf\n\tmovq\t%rbx, %rdi\n\tcallq\tmalloc\n\tmovq\t%rax, h_A(%rip)\n\ttestq\t%rax, %rax\n\tjne\t.LBB1_10\n# %bb.2:\n\tmovq\td_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_4\n# %bb.3:\n\tcallq\thipFree\n.LBB1_4:\n\tmovq\td_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_6\n# %bb.5:\n\tcallq\thipFree\n.LBB1_6:\n\tmovq\th_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_8\n# %bb.7:\n\tcallq\tfree\n.LBB1_8:\n\tmovq\th_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_10\n# %bb.9:\n\tcallq\tfree\n.LBB1_10:\n\tmovq\t%rbx, %rdi\n\tcallq\tmalloc\n\tmovq\t%rax, h_C(%rip)\n\ttestq\t%rax, %rax\n\tjne\t.LBB1_19\n# %bb.11:\n\tmovq\td_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_13\n# %bb.12:\n\tcallq\thipFree\n.LBB1_13:\n\tmovq\td_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_15\n# %bb.14:\n\tcallq\thipFree\n.LBB1_15:\n\tmovq\th_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_17\n# %bb.16:\n\tcallq\tfree\n.LBB1_17:\n\tmovq\th_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_19\n# %bb.18:\n\tcallq\tfree\n.LBB1_19:\n\tmovl\t$d_A, %edi\n\tmovq\t%rbx, %rsi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_20\n# %bb.22:\n\tmovl\t$d_C, %edi\n\tmovq\t%rbx, %rsi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_23\n# %bb.24:\n\tmovq\td_A(%rip), %rdi\n\tmovq\th_A(%rip), %rsi\n\tmovq\t%rbx, %rdx\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_25\n# %bb.26:\n\tmovl\t$0, 4(%rsp)\n\tleaq\t16(%rsp), %rdi\n\tcallq\thipEventCreate\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_27\n# %bb.28:\n\tleaq\t8(%rsp), %rdi\n\tcallq\thipEventCreate\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_29\n# %bb.30:\n\tmovq\t16(%rsp), %rdi\n\txorl\t%esi, %esi\n\tcallq\thipEventRecord\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_31\n# %bb.32:\n\tmovabsq\t$4294967376, %rdi # imm = 0x100000050\n\tleaq\t176(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_34\n# %bb.33:\n\tmovq\td_A(%rip), %rax\n\tmovq\td_C(%rip), %rcx\n\tmovq\t%rax, 88(%rsp)\n\tmovq\t%rcx, 80(%rsp)\n\tmovl\t%r14d, 28(%rsp)\n\tleaq\t88(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t80(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t28(%rsp), %rax\n\tmovq\t%rax, 112(%rsp)\n\tleaq\t64(%rsp), %rdi\n\tleaq\t48(%rsp), %rsi\n\tleaq\t40(%rsp), %rdx\n\tleaq\t32(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t64(%rsp), %rsi\n\tmovl\t72(%rsp), %edx\n\tmovq\t48(%rsp), %rcx\n\tmovl\t56(%rsp), %r8d\n\tleaq\t96(%rsp), %r9\n\tmovl\t$_Z11PowerKernalPiS_i, %edi\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t48(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$16, %rsp\n\t.cfi_adjust_cfa_offset -16\n.LBB1_34:\n\tmovq\t8(%rsp), %rdi\n\txorl\t%esi, %esi\n\tcallq\thipEventRecord\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_35\n# %bb.36:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipEventSynchronize\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_37\n# %bb.38:\n\tmovq\t16(%rsp), %rsi\n\tmovq\t8(%rsp), %rdx\n\tleaq\t4(%rsp), %rdi\n\tcallq\thipEventElapsedTime\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_39\n# %bb.40:\n\tmovss\t4(%rsp), %xmm0 # xmm0 = mem[0],zero,zero,zero\n\tdivss\t.LCPI1_0(%rip), %xmm0\n\tcvtss2sd\t%xmm0, %xmm0\n\tmovl\t$.L.str.3, %edi\n\tmovb\t$1, %al\n\tcallq\tprintf\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_57\n# %bb.41:\n\tcallq\thipDeviceSynchronize\n\tmovq\th_C(%rip), %rdi\n\tmovq\td_C(%rip), %rsi\n\tmovq\t%rbx, %rdx\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_42\n# %bb.43:\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipEventDestroy\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_44\n# %bb.45:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipEventDestroy\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_46\n# %bb.47:\n\tmovq\td_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_49\n# %bb.48:\n\tcallq\thipFree\n.LBB1_49:\n\tmovq\td_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_51\n# %bb.50:\n\tcallq\thipFree\n.LBB1_51:\n\tmovq\th_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_53\n# %bb.52:\n\tcallq\tfree\n.LBB1_53:\n\tmovq\th_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB1_55\n# %bb.54:\n\tcallq\tfree\n.LBB1_55:\n\txorl\t%eax, %eax\n\taddq\t$128, %rsp\n\t.cfi_def_cfa_offset 32\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_56:\n\t.cfi_def_cfa_offset 160\n\tmovq\tstderr(%rip), %rdi\n\tmovq\t(%rsi), %rdx\n\tmovl\t$.L.str, %esi\n\txorl\t%eax, %eax\n\tcallq\tfprintf\n\tmovl\t$1, %edi\n\tcallq\texit\n.LBB1_20:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$108, %ecx\n\tjmp\t.LBB1_21\n.LBB1_23:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$110, %ecx\n\tjmp\t.LBB1_21\n.LBB1_25:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$113, %ecx\n\tjmp\t.LBB1_21\n.LBB1_27:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$118, %ecx\n\tjmp\t.LBB1_21\n.LBB1_29:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$119, %ecx\n\tjmp\t.LBB1_21\n.LBB1_31:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$123, %ecx\n\tjmp\t.LBB1_21\n.LBB1_35:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$126, %ecx\n\tjmp\t.LBB1_21\n.LBB1_37:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$128, %ecx\n\tjmp\t.LBB1_21\n.LBB1_39:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$129, %ecx\n\tjmp\t.LBB1_21\n.LBB1_57:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovq\t%rax, %r10\n\tsubq\t$8, %rsp\n\t.cfi_adjust_cfa_offset 8\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovl\t$.L.str.4, %r8d\n\tmovq\t%rbx, %rdi\n\tmovl\t$132, %ecx\n\tmovl\t%ebp, %r9d\n\txorl\t%eax, %eax\n\tpushq\t%r10\n\t.cfi_adjust_cfa_offset 8\n\tcallq\tfprintf\n\taddq\t$16, %rsp\n\t.cfi_adjust_cfa_offset -16\n\tmovl\t$-1, %edi\n\tcallq\texit\n.LBB1_42:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$137, %ecx\n\tjmp\t.LBB1_21\n.LBB1_44:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$139, %ecx\n\tjmp\t.LBB1_21\n.LBB1_46:\n\tmovq\tstderr(%rip), %rbx\n\tmovl\t%eax, %edi\n\tmovl\t%eax, %ebp\n\tcallq\thipGetErrorString\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$.L.str.2, %edx\n\tmovq\t%rbx, %rdi\n\tmovl\t$140, %ecx\n.LBB1_21:\n\tmovl\t%ebp, %r8d\n\tmovq\t%rax, %r9\n\txorl\t%eax, %eax\n\tcallq\tfprintf\n\tmovl\t$-1, %edi\n\tcallq\texit\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.globl\t_Z16CleanupResourcesv # -- Begin function _Z16CleanupResourcesv\n\t.p2align\t4, 0x90\n\t.type\t_Z16CleanupResourcesv,@function\n_Z16CleanupResourcesv: # @_Z16CleanupResourcesv\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovq\td_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB2_2\n# %bb.1:\n\tcallq\thipFree\n.LBB2_2:\n\tmovq\td_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB2_4\n# %bb.3:\n\tcallq\thipFree\n.LBB2_4:\n\tmovq\th_A(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB2_6\n# %bb.5:\n\tcallq\tfree\n.LBB2_6:\n\tmovq\th_C(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB2_7\n# %bb.8:\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\tfree # TAILCALL\n.LBB2_7:\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tretq\n.Lfunc_end2:\n\t.size\t_Z16CleanupResourcesv, .Lfunc_end2-_Z16CleanupResourcesv\n\t.cfi_endproc\n # -- End function\n\t.globl\t_Z10RandomInitPii # -- Begin function _Z10RandomInitPii\n\t.p2align\t4, 0x90\n\t.type\t_Z10RandomInitPii,@function\n_Z10RandomInitPii: # @_Z10RandomInitPii\n\t.cfi_startproc\n# %bb.0:\n\ttestl\t%esi, %esi\n\tjle\t.LBB3_4\n# %bb.1:\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 32\n\t.cfi_offset %rbx, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %r15, -16\n\tmovq\t%rdi, %rbx\n\tmovl\t%esi, %r14d\n\txorl\t%r15d, %r15d\n\t.p2align\t4, 0x90\n.LBB3_2: # =>This Inner Loop Header: Depth=1\n\tcallq\trand\n\tcltq\n\tmovq\t%rax, %rcx\n\tshlq\t$30, %rcx\n\taddq\t%rax, %rcx\n\tmovq\t%rcx, %rax\n\tshrq\t$63, %rax\n\tsarq\t$61, %rcx\n\taddl\t%eax, %ecx\n\tmovl\t%ecx, (%rbx,%r15,4)\n\tincq\t%r15\n\tcmpq\t%r15, %r14\n\tjne\t.LBB3_2\n# %bb.3:\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 8\n\t.cfi_restore %rbx\n\t.cfi_restore %r14\n\t.cfi_restore %r15\n.LBB3_4:\n\tretq\n.Lfunc_end3:\n\t.size\t_Z10RandomInitPii, .Lfunc_end3-_Z10RandomInitPii\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB4_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB4_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z11PowerKernalPiS_i, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end4:\n\t.size\t__hip_module_ctor, .Lfunc_end4-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB5_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB5_2:\n\tretq\n.Lfunc_end5:\n\t.size\t__hip_module_dtor, .Lfunc_end5-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\th_A,@object # @h_A\n\t.bss\n\t.globl\th_A\n\t.p2align\t3, 0x0\nh_A:\n\t.quad\t0\n\t.size\th_A, 8\n\n\t.type\th_B,@object # @h_B\n\t.globl\th_B\n\t.p2align\t3, 0x0\nh_B:\n\t.quad\t0\n\t.size\th_B, 8\n\n\t.type\th_C,@object # @h_C\n\t.globl\th_C\n\t.p2align\t3, 0x0\nh_C:\n\t.quad\t0\n\t.size\th_C, 8\n\n\t.type\td_A,@object # @d_A\n\t.globl\td_A\n\t.p2align\t3, 0x0\nd_A:\n\t.quad\t0\n\t.size\td_A, 8\n\n\t.type\td_B,@object # @d_B\n\t.globl\td_B\n\t.p2align\t3, 0x0\nd_B:\n\t.quad\t0\n\t.size\td_B, 8\n\n\t.type\td_C,@object # @d_C\n\t.globl\td_C\n\t.p2align\t3, 0x0\nd_C:\n\t.quad\t0\n\t.size\td_C, 8\n\n\t.type\t_Z11PowerKernalPiS_i,@object # @_Z11PowerKernalPiS_i\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z11PowerKernalPiS_i\n\t.p2align\t3, 0x0\n_Z11PowerKernalPiS_i:\n\t.quad\t_Z26__device_stub__PowerKernalPiS_i\n\t.size\t_Z11PowerKernalPiS_i, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"usage: %s #iterations\\n\"\n\t.size\t.L.str, 23\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Power Microbenchmark with %d iterations\\n\"\n\t.size\t.L.str.1, 41\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"CUDA_repos/speverel/gpgpu-sim_simulations/master/benchmarks/src/cuda/gpuwattch-ubench/dram_benchmarks/dram_r12/dram_1.hip\"\n\t.size\t.L.str.2, 122\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"gpu execution time = %.2f s\\n\"\n\t.size\t.L.str.3, 29\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"kernel launch failure\"\n\t.size\t.L.str.4, 22\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"%s(%i) : CUDA Runtime API error %d: %s.\\n\"\n\t.size\t.L.str.5, 41\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\"%s(%i) : getLastCudaError() CUDA error : %s : (%d) %s.\\n\"\n\t.size\t.L.str.6, 56\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z11PowerKernalPiS_i\"\n\t.size\t.L__unnamed_1, 21\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":76,"cells":{"id":{"kind":"string","value":"003b03dba5c0f045b3eb04bf58619e8c8dc5b765_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z17convolutionKernelPfS_S_i --------------------------\n .section .text._Z17convolutionKernelPfS_S_i,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=30\"\n .align 128\n\n\n\n\n .global _Z17convolutionKernelPfS_S_i\n .type _Z17convolutionKernelPfS_S_i,@function\n .size _Z17convolutionKernelPfS_S_i,(.L_x_21 - _Z17convolutionKernelPfS_S_i)\n .other _Z17convolutionKernelPfS_S_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z17convolutionKernelPfS_S_i:\n.text._Z17convolutionKernelPfS_S_i:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R16, c[0x0][0x118] ;\n /*0020*/ MOV R17, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R22, R2 ;\n /*0060*/ MOV R23, R3 ;\n /*0070*/ MOV R22, R22 ;\n /*0080*/ MOV R23, R23 ;\n /*0090*/ MOV R2, 0x8 ;\n /*00a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00b0*/ MOV R14, R2 ;\n /*00c0*/ MOV R13, R3 ;\n /*00d0*/ MOV R14, R14 ;\n /*00e0*/ MOV R13, R13 ;\n /*00f0*/ MOV R2, 0x10 ;\n /*0100*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0110*/ MOV R12, R2 ;\n /*0120*/ MOV R11, R3 ;\n /*0130*/ MOV R12, R12 ;\n /*0140*/ MOV R11, R11 ;\n /*0150*/ MOV R0, 0x18 ;\n /*0160*/ LDC R0, c[0x0][R0+0x160] ;\n /*0170*/ MOV R10, R0 ;\n /*0180*/ S2R R0, SR_CTAID.Y ;\n /*0190*/ MOV R0, R0 ;\n /*01a0*/ SHF.L.U32 R0, R0, 0x4, RZ ;\n /*01b0*/ S2R R9, SR_TID.Y ;\n /*01c0*/ MOV R9, R9 ;\n /*01d0*/ IADD3 R0, R0, R9, RZ ;\n /*01e0*/ S2R R2, SR_CTAID.X ;\n /*01f0*/ MOV R2, R2 ;\n /*0200*/ SHF.L.U32 R2, R2, 0x4, RZ ;\n /*0210*/ S2R R8, SR_TID.X ;\n /*0220*/ MOV R8, R8 ;\n /*0230*/ IADD3 R7, R2, R8, RZ ;\n /*0240*/ ISETP.LT.AND P0, PT, R0, R10, PT ;\n /*0250*/ ISETP.LT.AND P1, PT, R7, R10, PT ;\n /*0260*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x80, 0x0 ;\n /*0270*/ MOV R20, RZ ;\n /*0280*/ IMAD R6, R9, 0x48, R20 ;\n /*0290*/ SHF.L.U32 R21, R8, 0x2, RZ ;\n /*02a0*/ IADD3 R5, R6, R21, RZ ;\n /*02b0*/ IMAD R2, R0, R10, R7 ;\n /*02c0*/ MOV R22, R22 ;\n /*02d0*/ MOV R23, R23 ;\n /*02e0*/ IMAD.WIDE R2, R2, 0x4, RZ ;\n /*02f0*/ MOV R4, R2 ;\n /*0300*/ MOV R3, R3 ;\n /*0310*/ IADD3 R15, P1, R22, R4, RZ ;\n /*0320*/ IADD3.X R2, R23, R3, RZ, P1, !PT ;\n /*0330*/ MOV R14, R14 ;\n /*0340*/ MOV R13, R13 ;\n /*0350*/ MOV R12, R12 ;\n /*0360*/ MOV R11, R11 ;\n /*0370*/ MOV R10, R10 ;\n /*0380*/ MOV R9, R9 ;\n /*0390*/ MOV R18, R0 ;\n /*03a0*/ MOV R8, R8 ;\n /*03b0*/ MOV R7, R7 ;\n /*03c0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*03d0*/ MOV R20, R20 ;\n /*03e0*/ MOV R6, R6 ;\n /*03f0*/ MOV R21, R21 ;\n /*0400*/ MOV R5, R5 ;\n /*0410*/ MOV R22, R22 ;\n /*0420*/ MOV R23, R23 ;\n /*0430*/ MOV R4, R4 ;\n /*0440*/ MOV R0, R3 ;\n /*0450*/ MOV R15, R15 ;\n /*0460*/ MOV R19, R2 ;\n /*0470*/ BSSY B0, `(.L_x_0) ;\n /*0480*/ @P0 BRA `(.L_x_1) ;\n /*0490*/ BRA `(.L_x_2) ;\n.L_x_1:\n /*04a0*/ MOV R2, R15 ;\n /*04b0*/ MOV R3, R19 ;\n /*04c0*/ MOV R2, R2 ;\n /*04d0*/ MOV R3, R3 ;\n /*04e0*/ R2UR UR4, R16 ;\n /*04f0*/ R2UR UR5, R17 ;\n /*0500*/ LDG.E R2, [R2.64] ;\n /*0510*/ IADD3 R3, R5, 0x4c, RZ ;\n /*0520*/ MOV R3, R3 ;\n /*0530*/ STS [R3], R2 ;\n /*0540*/ BRA `(.L_x_3) ;\n.L_x_2:\n /*0550*/ MOV R3, RZ ;\n /*0560*/ IADD3 R2, R5, 0x4c, RZ ;\n /*0570*/ MOV R2, R2 ;\n /*0580*/ STS [R2], R3 ;\n /*0590*/ BRA `(.L_x_3) ;\n.L_x_3:\n /*05a0*/ BSYNC B0 ;\n.L_x_0:\n /*05b0*/ ISETP.EQ.AND P1, PT, R9, RZ, PT ;\n /*05c0*/ ISETP.GT.AND P2, PT, R18, RZ, PT ;\n /*05d0*/ PLOP3.LUT P3, PT, P1, P2, PT, 0x80, 0x0 ;\n /*05e0*/ IADD3 R24, R18, 0x1, RZ ;\n /*05f0*/ IMAD R2, R24, R10, R7 ;\n /*0600*/ IMAD.WIDE R2, R2, 0x4, RZ ;\n /*0610*/ MOV R26, R2 ;\n /*0620*/ MOV R27, R3 ;\n /*0630*/ IADD3 R26, P4, R22, R26, RZ ;\n /*0640*/ IADD3.X R27, R23, R27, RZ, P4, !PT ;\n /*0650*/ IADD3 R25, R20, R21, RZ ;\n /*0660*/ IADD3 R18, R18, -0x1, RZ ;\n /*0670*/ IMAD R2, R18, R10, R7 ;\n /*0680*/ IMAD.WIDE R2, R2, 0x4, RZ ;\n /*0690*/ MOV R18, R2 ;\n /*06a0*/ MOV R2, R3 ;\n /*06b0*/ IADD3 R22, P4, R22, R18, RZ ;\n /*06c0*/ IADD3.X R23, R23, R2, RZ, P4, !PT ;\n /*06d0*/ PLOP3.LUT P1, PT, P1, PT, PT, 0x80, 0x0 ;\n /*06e0*/ PLOP3.LUT P2, PT, P2, PT, PT, 0x80, 0x0 ;\n /*06f0*/ MOV R18, R24 ;\n /*0700*/ MOV R20, R26 ;\n /*0710*/ MOV R21, R27 ;\n /*0720*/ MOV R25, R25 ;\n /*0730*/ MOV R22, R22 ;\n /*0740*/ MOV R23, R23 ;\n /*0750*/ BSSY B0, `(.L_x_4) ;\n /*0760*/ @P3 BRA `(.L_x_5) ;\n /*0770*/ BRA `(.L_x_6) ;\n.L_x_5:\n /*0780*/ MOV R2, R22 ;\n /*0790*/ MOV R3, R23 ;\n /*07a0*/ MOV R2, R2 ;\n /*07b0*/ MOV R3, R3 ;\n /*07c0*/ R2UR UR4, R16 ;\n /*07d0*/ R2UR UR5, R17 ;\n /*07e0*/ LDG.E R2, [R2.64] ;\n /*07f0*/ IADD3 R25, R25, 0x4, RZ ;\n /*0800*/ MOV R25, R25 ;\n /*0810*/ STS [R25], R2 ;\n /*0820*/ BRA `(.L_x_7) ;\n.L_x_6:\n /*0830*/ ISETP.NE.AND P3, PT, R9, 0xf, PT ;\n /*0840*/ ISETP.GE.AND P4, PT, R18, R10, PT ;\n /*0850*/ PLOP3.LUT P3, PT, P3, P4, PT, 0xa8, 0x0 ;\n /*0860*/ @P3 BRA `(.L_x_7) ;\n /*0870*/ MOV R2, R20 ;\n /*0880*/ MOV R3, R21 ;\n /*0890*/ MOV R2, R2 ;\n /*08a0*/ MOV R3, R3 ;\n /*08b0*/ R2UR UR4, R16 ;\n /*08c0*/ R2UR UR5, R17 ;\n /*08d0*/ LDG.E R2, [R2.64] ;\n /*08e0*/ IADD3 R25, R25, 0x4cc, RZ ;\n /*08f0*/ MOV R25, R25 ;\n /*0900*/ STS [R25], R2 ;\n /*0910*/ BRA `(.L_x_7) ;\n.L_x_7:\n /*0920*/ BSYNC B0 ;\n.L_x_4:\n /*0930*/ ISETP.EQ.AND P3, PT, R8, RZ, PT ;\n /*0940*/ ISETP.GT.AND P4, PT, R7, RZ, PT ;\n /*0950*/ PLOP3.LUT P5, PT, P3, P4, PT, 0x80, 0x0 ;\n /*0960*/ PLOP3.LUT P3, PT, P3, PT, PT, 0x80, 0x0 ;\n /*0970*/ PLOP3.LUT P4, PT, P4, PT, PT, 0x80, 0x0 ;\n /*0980*/ BSSY B0, `(.L_x_8) ;\n /*0990*/ @P5 BRA `(.L_x_9) ;\n /*09a0*/ BRA `(.L_x_10) ;\n.L_x_9:\n /*09b0*/ IADD3 R2, P5, R15, -0x4, RZ ;\n /*09c0*/ IADD3.X R3, R19, -0x1, RZ, P5, !PT ;\n /*09d0*/ MOV R2, R2 ;\n /*09e0*/ MOV R3, R3 ;\n /*09f0*/ MOV R2, R2 ;\n /*0a00*/ MOV R3, R3 ;\n /*0a10*/ R2UR UR4, R16 ;\n /*0a20*/ R2UR UR5, R17 ;\n /*0a30*/ LDG.E R2, [R2.64] ;\n /*0a40*/ IADD3 R6, R6, 0x48, RZ ;\n /*0a50*/ MOV R6, R6 ;\n /*0a60*/ STS [R6], R2 ;\n /*0a70*/ BRA `(.L_x_11) ;\n.L_x_10:\n /*0a80*/ ISETP.NE.AND P5, PT, R8, 0xf, PT ;\n /*0a90*/ IADD3 R2, R7, 0x1, RZ ;\n /*0aa0*/ ISETP.GE.AND P6, PT, R2, R10, PT ;\n /*0ab0*/ PLOP3.LUT P5, PT, P5, P6, PT, 0xa8, 0x0 ;\n /*0ac0*/ @P5 BRA `(.L_x_11) ;\n /*0ad0*/ IADD3 R2, P5, R15, 0x4, RZ ;\n /*0ae0*/ IADD3.X R3, R19, RZ, RZ, P5, !PT ;\n /*0af0*/ MOV R2, R2 ;\n /*0b00*/ MOV R3, R3 ;\n /*0b10*/ MOV R2, R2 ;\n /*0b20*/ MOV R3, R3 ;\n /*0b30*/ R2UR UR4, R16 ;\n /*0b40*/ R2UR UR5, R17 ;\n /*0b50*/ LDG.E R2, [R2.64] ;\n /*0b60*/ IADD3 R6, R6, 0x8c, RZ ;\n /*0b70*/ MOV R6, R6 ;\n /*0b80*/ STS [R6], R2 ;\n /*0b90*/ BRA `(.L_x_11) ;\n.L_x_11:\n /*0ba0*/ BSYNC B0 ;\n.L_x_8:\n /*0bb0*/ LOP3.LUT R2, R9, R8, RZ, 0xfc, !PT ;\n /*0bc0*/ ISETP.EQ.AND P5, PT, R2, RZ, PT ;\n /*0bd0*/ PLOP3.LUT P5, PT, P5, P2, PT, 0x80, 0x0 ;\n /*0be0*/ PLOP3.LUT P5, PT, P4, P5, PT, 0x80, 0x0 ;\n /*0bf0*/ @P5 BRA `(.L_x_12) ;\n /*0c00*/ BRA `(.L_x_13) ;\n.L_x_12:\n /*0c10*/ IADD3 R2, P1, R22, -0x4, RZ ;\n /*0c20*/ IADD3.X R3, R23, -0x1, RZ, P1, !PT ;\n /*0c30*/ MOV R2, R2 ;\n /*0c40*/ MOV R3, R3 ;\n /*0c50*/ MOV R2, R2 ;\n /*0c60*/ MOV R3, R3 ;\n /*0c70*/ R2UR UR4, R16 ;\n /*0c80*/ R2UR UR5, R17 ;\n /*0c90*/ LDG.E R2, [R2.64] ;\n /*0ca0*/ STS [RZ], R2 ;\n /*0cb0*/ BRA `(.L_x_14) ;\n.L_x_13:\n /*0cc0*/ ISETP.EQ.AND P5, PT, R8, 0xf, PT ;\n /*0cd0*/ PLOP3.LUT P1, PT, P1, P5, PT, 0x80, 0x0 ;\n /*0ce0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x80, 0x0 ;\n /*0cf0*/ IADD3 R7, R7, 0x1, RZ ;\n /*0d00*/ ISETP.LT.AND P2, PT, R7, R10, PT ;\n /*0d10*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x80, 0x0 ;\n /*0d20*/ MOV R7, R7 ;\n /*0d30*/ @P1 BRA `(.L_x_15) ;\n /*0d40*/ BRA `(.L_x_16) ;\n.L_x_15:\n /*0d50*/ IADD3 R2, P1, R22, 0x4, RZ ;\n /*0d60*/ IADD3.X R3, R23, RZ, RZ, P1, !PT ;\n /*0d70*/ MOV R2, R2 ;\n /*0d80*/ MOV R3, R3 ;\n /*0d90*/ MOV R2, R2 ;\n /*0da0*/ MOV R3, R3 ;\n /*0db0*/ R2UR UR4, R16 ;\n /*0dc0*/ R2UR UR5, R17 ;\n /*0dd0*/ LDG.E R2, [R2.64] ;\n /*0de0*/ IADD3 R3, RZ, 0x44, RZ ;\n /*0df0*/ MOV R3, R3 ;\n /*0e00*/ STS [R3], R2 ;\n /*0e10*/ BRA `(.L_x_14) ;\n.L_x_16:\n /*0e20*/ ISETP.EQ.AND P1, PT, R9, 0xf, PT ;\n /*0e30*/ PLOP3.LUT P1, PT, P1, P3, PT, 0x80, 0x0 ;\n /*0e40*/ ISETP.LT.AND P2, PT, R18, R10, PT ;\n /*0e50*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x80, 0x0 ;\n /*0e60*/ PLOP3.LUT P1, PT, P4, P1, PT, 0x80, 0x0 ;\n /*0e70*/ @P1 BRA `(.L_x_17) ;\n /*0e80*/ BRA `(.L_x_18) ;\n.L_x_17:\n /*0e90*/ IADD3 R2, P1, R20, -0x4, RZ ;\n /*0ea0*/ IADD3.X R3, R21, -0x1, RZ, P1, !PT ;\n /*0eb0*/ MOV R2, R2 ;\n /*0ec0*/ MOV R3, R3 ;\n /*0ed0*/ MOV R2, R2 ;\n /*0ee0*/ MOV R3, R3 ;\n /*0ef0*/ R2UR UR4, R16 ;\n /*0f00*/ R2UR UR5, R17 ;\n /*0f10*/ LDG.E R2, [R2.64] ;\n /*0f20*/ IADD3 R3, RZ, 0x4c8, RZ ;\n /*0f30*/ MOV R3, R3 ;\n /*0f40*/ STS [R3], R2 ;\n /*0f50*/ BRA `(.L_x_14) ;\n.L_x_18:\n /*0f60*/ ISETP.GE.AND P1, PT, R18, R10, PT ;\n /*0f70*/ ISETP.NE.AND P2, PT, R8, 0xf, PT ;\n /*0f80*/ ISETP.NE.AND P3, PT, R9, 0xf, PT ;\n /*0f90*/ PLOP3.LUT P2, PT, P3, P2, PT, 0xa8, 0x0 ;\n /*0fa0*/ PLOP3.LUT P1, PT, P2, P1, PT, 0xa8, 0x0 ;\n /*0fb0*/ ISETP.GE.AND P2, PT, R7, R10, PT ;\n /*0fc0*/ PLOP3.LUT P1, PT, P2, P1, PT, 0xa8, 0x0 ;\n /*0fd0*/ @P1 BRA `(.L_x_14) ;\n /*0fe0*/ IADD3 R2, P1, R20, 0x4, RZ ;\n /*0ff0*/ IADD3.X R3, R21, RZ, RZ, P1, !PT ;\n /*1000*/ MOV R2, R2 ;\n /*1010*/ MOV R3, R3 ;\n /*1020*/ MOV R2, R2 ;\n /*1030*/ MOV R3, R3 ;\n /*1040*/ R2UR UR4, R16 ;\n /*1050*/ R2UR UR5, R17 ;\n /*1060*/ LDG.E R2, [R2.64] ;\n /*1070*/ IADD3 R3, RZ, 0x50c, RZ ;\n /*1080*/ MOV R3, R3 ;\n /*1090*/ STS [R3], R2 ;\n /*10a0*/ BRA `(.L_x_14) ;\n.L_x_14:\n /*10b0*/ WARPSYNC 0xffffffff ;\n /*10c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*10d0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x0 ;\n /*10e0*/ @P0 BRA `(.L_x_19) ;\n /*10f0*/ MOV R12, R12 ;\n /*1100*/ MOV R11, R11 ;\n /*1110*/ MOV R2, R12 ;\n /*1120*/ MOV R3, R11 ;\n /*1130*/ MOV R2, R2 ;\n /*1140*/ MOV R3, R3 ;\n /*1150*/ R2UR UR4, R16 ;\n /*1160*/ R2UR UR5, R17 ;\n /*1170*/ LDG.E R2, [R2.64] ;\n /*1180*/ MOV R3, R5 ;\n /*1190*/ LDS R3, [R3] ;\n /*11a0*/ FFMA R6, R2, R3, RZ ;\n /*11b0*/ IADD3 R2, R5, 0x4, RZ ;\n /*11c0*/ MOV R2, R2 ;\n /*11d0*/ LDS R7, [R2] ;\n /*11e0*/ IADD3 R2, P0, R12, 0x4, RZ ;\n /*11f0*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*1200*/ MOV R2, R2 ;\n /*1210*/ MOV R3, R3 ;\n /*1220*/ MOV R2, R2 ;\n /*1230*/ MOV R3, R3 ;\n /*1240*/ R2UR UR4, R16 ;\n /*1250*/ R2UR UR5, R17 ;\n /*1260*/ LDG.E R2, [R2.64] ;\n /*1270*/ FFMA R6, R2, R7, R6 ;\n /*1280*/ IADD3 R2, R5, 0x8, RZ ;\n /*1290*/ MOV R2, R2 ;\n /*12a0*/ LDS R7, [R2] ;\n /*12b0*/ IADD3 R2, P0, R12, 0x8, RZ ;\n /*12c0*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*12d0*/ MOV R2, R2 ;\n /*12e0*/ MOV R3, R3 ;\n /*12f0*/ MOV R2, R2 ;\n /*1300*/ MOV R3, R3 ;\n /*1310*/ R2UR UR4, R16 ;\n /*1320*/ R2UR UR5, R17 ;\n /*1330*/ LDG.E R2, [R2.64] ;\n /*1340*/ FFMA R6, R2, R7, R6 ;\n /*1350*/ IADD3 R2, R5, 0x48, RZ ;\n /*1360*/ MOV R2, R2 ;\n /*1370*/ LDS R7, [R2] ;\n /*1380*/ IADD3 R2, P0, R12, 0xc, RZ ;\n /*1390*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*13a0*/ MOV R2, R2 ;\n /*13b0*/ MOV R3, R3 ;\n /*13c0*/ MOV R2, R2 ;\n /*13d0*/ MOV R3, R3 ;\n /*13e0*/ R2UR UR4, R16 ;\n /*13f0*/ R2UR UR5, R17 ;\n /*1400*/ LDG.E R2, [R2.64] ;\n /*1410*/ FFMA R6, R2, R7, R6 ;\n /*1420*/ IADD3 R2, R5, 0x4c, RZ ;\n /*1430*/ MOV R2, R2 ;\n /*1440*/ LDS R7, [R2] ;\n /*1450*/ IADD3 R2, P0, R12, 0x10, RZ ;\n /*1460*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*1470*/ MOV R2, R2 ;\n /*1480*/ MOV R3, R3 ;\n /*1490*/ MOV R2, R2 ;\n /*14a0*/ MOV R3, R3 ;\n /*14b0*/ R2UR UR4, R16 ;\n /*14c0*/ R2UR UR5, R17 ;\n /*14d0*/ LDG.E R2, [R2.64] ;\n /*14e0*/ FFMA R6, R2, R7, R6 ;\n /*14f0*/ IADD3 R2, R5, 0x50, RZ ;\n /*1500*/ MOV R2, R2 ;\n /*1510*/ LDS R7, [R2] ;\n /*1520*/ IADD3 R2, P0, R12, 0x14, RZ ;\n /*1530*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*1540*/ MOV R2, R2 ;\n /*1550*/ MOV R3, R3 ;\n /*1560*/ MOV R2, R2 ;\n /*1570*/ MOV R3, R3 ;\n /*1580*/ R2UR UR4, R16 ;\n /*1590*/ R2UR UR5, R17 ;\n /*15a0*/ LDG.E R2, [R2.64] ;\n /*15b0*/ FFMA R6, R2, R7, R6 ;\n /*15c0*/ IADD3 R2, R5, 0x90, RZ ;\n /*15d0*/ MOV R2, R2 ;\n /*15e0*/ LDS R7, [R2] ;\n /*15f0*/ IADD3 R2, P0, R12, 0x18, RZ ;\n /*1600*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*1610*/ MOV R2, R2 ;\n /*1620*/ MOV R3, R3 ;\n /*1630*/ MOV R2, R2 ;\n /*1640*/ MOV R3, R3 ;\n /*1650*/ R2UR UR4, R16 ;\n /*1660*/ R2UR UR5, R17 ;\n /*1670*/ LDG.E R2, [R2.64] ;\n /*1680*/ FFMA R6, R2, R7, R6 ;\n /*1690*/ IADD3 R2, R5, 0x94, RZ ;\n /*16a0*/ MOV R2, R2 ;\n /*16b0*/ LDS R7, [R2] ;\n /*16c0*/ IADD3 R2, P0, R12, 0x1c, RZ ;\n /*16d0*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*16e0*/ MOV R2, R2 ;\n /*16f0*/ MOV R3, R3 ;\n /*1700*/ MOV R2, R2 ;\n /*1710*/ MOV R3, R3 ;\n /*1720*/ R2UR UR4, R16 ;\n /*1730*/ R2UR UR5, R17 ;\n /*1740*/ LDG.E R2, [R2.64] ;\n /*1750*/ FFMA R6, R2, R7, R6 ;\n /*1760*/ IADD3 R5, R5, 0x98, RZ ;\n /*1770*/ MOV R5, R5 ;\n /*1780*/ LDS R5, [R5] ;\n /*1790*/ IADD3 R2, P0, R12, 0x20, RZ ;\n /*17a0*/ IADD3.X R3, R11, RZ, RZ, P0, !PT ;\n /*17b0*/ MOV R2, R2 ;\n /*17c0*/ MOV R3, R3 ;\n /*17d0*/ MOV R2, R2 ;\n /*17e0*/ MOV R3, R3 ;\n /*17f0*/ R2UR UR4, R16 ;\n /*1800*/ R2UR UR5, R17 ;\n /*1810*/ LDG.E R2, [R2.64] ;\n /*1820*/ FFMA R5, R2, R5, R6 ;\n /*1830*/ MOV R2, R14 ;\n /*1840*/ MOV R13, R13 ;\n /*1850*/ IADD3 R2, P0, R2, R4, RZ ;\n /*1860*/ IADD3.X R0, R13, R0, RZ, P0, !PT ;\n /*1870*/ MOV R2, R2 ;\n /*1880*/ MOV R3, R0 ;\n /*1890*/ MOV R2, R2 ;\n /*18a0*/ MOV R3, R3 ;\n /*18b0*/ R2UR UR4, R16 ;\n /*18c0*/ R2UR UR5, R17 ;\n /*18d0*/ STG.E [R2.64], R5 ;\n.L_x_19:\n /*18e0*/ EXIT ;\n.L_x_20:\n /*18f0*/ BRA `(.L_x_20);\n /*1900*/ NOP;\n /*1910*/ NOP;\n /*1920*/ NOP;\n /*1930*/ NOP;\n /*1940*/ NOP;\n /*1950*/ NOP;\n /*1960*/ NOP;\n /*1970*/ NOP;\n.L_x_21:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z17convolutionKernelPfS_S_i ; -- Begin function _Z17convolutionKernelPfS_S_i\n\t.globl\t_Z17convolutionKernelPfS_S_i\n\t.p2align\t8\n\t.type\t_Z17convolutionKernelPfS_S_i,@function\n_Z17convolutionKernelPfS_S_i: ; @_Z17convolutionKernelPfS_S_i\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s10, s[0:1], 0x18\n\ts_load_b64 s[8:9], s[0:1], 0x0\n\tv_bfe_u32 v2, v0, 10, 10\n\tv_and_b32_e32 v3, 0x3ff, v0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_lshl_add_u32 v1, s15, 4, v2\n\tv_lshl_add_u32 v0, s14, 4, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_max_i32_e32 v4, v1, v0\n\ts_waitcnt lgkmcnt(0)\n\tv_cmp_gt_i32_e32 vcc_lo, s10, v4\n\tv_mov_b32_e32 v4, 0\n\ts_and_saveexec_b32 s3, vcc_lo\n\ts_cbranch_execz .LBB0_2\n; %bb.1:\n\tv_mad_u64_u32 v[4:5], null, v1, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v5, 31, v4\n\tv_lshlrev_b64 v[4:5], 2, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v4, s2, s8, v4\n\tv_add_co_ci_u32_e64 v5, s2, s9, v5, s2\n\tglobal_load_b32 v4, v[4:5], off\n.LBB0_2:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_lshlrev_b32_e32 v5, 2, v3\n\tv_cmp_eq_u32_e64 s3, 0, v2\n\tv_cmp_lt_i32_e64 s2, 0, v1\n\ts_mov_b32 s4, 0\n ; implicit-def: $sgpr6\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mad_u32_u24 v5, v2, 0x48, v5\n\ts_and_b32 s5, s3, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_3) | instid1(SALU_CYCLE_1)\n\ts_xor_b32 s5, s5, -1\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:76\n ; implicit-def: $vgpr4\n\ts_and_saveexec_b32 s7, s5\n\ts_xor_b32 s7, exec_lo, s7\n; %bb.3:\n\tv_add_nc_u32_e32 v4, 1, v1\n\tv_cmp_eq_u32_e64 s4, 15, v2\n\ts_movk_i32 s6, 0x4c8\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_gt_i32_e64 s5, s10, v4\n\ts_and_b32 s4, s4, s5\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_b32 s4, s4, exec_lo\n; %bb.4:\n\ts_or_saveexec_b32 s5, s7\n\tv_mov_b32_e32 v5, s6\n\ts_xor_b32 exec_lo, exec_lo, s5\n; %bb.5:\n\tv_dual_mov_b32 v5, 0 :: v_dual_add_nc_u32 v4, -1, v1\n\ts_or_b32 s4, s4, exec_lo\n; %bb.6:\n\ts_or_b32 exec_lo, exec_lo, s5\n\ts_and_saveexec_b32 s5, s4\n\ts_cbranch_execz .LBB0_8\n; %bb.7:\n\tv_mad_u64_u32 v[6:7], null, v4, s10, v[0:1]\n\tv_lshl_add_u32 v5, v3, 2, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v7, 31, v6\n\tv_lshlrev_b64 v[6:7], 2, v[6:7]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v6, s4, s8, v6\n\tv_add_co_ci_u32_e64 v7, s4, s9, v7, s4\n\tglobal_load_b32 v4, v[6:7], off\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:4\n.LBB0_8:\n\ts_or_b32 exec_lo, exec_lo, s5\n\tv_cmp_eq_u32_e64 s5, 0, v3\n\tv_cmp_lt_i32_e64 s4, 0, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s6, s5, s4\n\ts_xor_b32 s6, s6, -1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s7, s6\n\ts_xor_b32 s11, exec_lo, s7\n\ts_cbranch_execz .LBB0_12\n; %bb.9:\n\tv_add_nc_u32_e32 v4, 1, v0\n\tv_cmp_eq_u32_e64 s6, 15, v3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_gt_i32_e64 s7, s10, v4\n\ts_and_b32 s6, s6, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s7, s6\n\ts_cbranch_execz .LBB0_11\n; %bb.10:\n\tv_mad_u64_u32 v[4:5], null, v1, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v5, 31, v4\n\tv_lshlrev_b64 v[4:5], 2, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v4, s6, s8, v4\n\tv_add_co_ci_u32_e64 v5, s6, s9, v5, s6\n\tglobal_load_b32 v4, v[4:5], off offset:4\n\tv_mul_u32_u24_e32 v5, 0x48, v2\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:140\n.LBB0_11:\n\ts_or_b32 exec_lo, exec_lo, s7\n.LBB0_12:\n\ts_and_not1_saveexec_b32 s7, s11\n\ts_cbranch_execz .LBB0_14\n; %bb.13:\n\tv_mad_u64_u32 v[4:5], null, v1, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v5, 31, v4\n\tv_lshlrev_b64 v[4:5], 2, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v4, s6, s8, v4\n\tv_add_co_ci_u32_e64 v5, s6, s9, v5, s6\n\tglobal_load_b32 v4, v[4:5], off offset:-4\n\tv_mul_u32_u24_e32 v5, 0x48, v2\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:72\n.LBB0_14:\n\ts_or_b32 exec_lo, exec_lo, s7\n\tv_or_b32_e32 v4, v2, v3\n\ts_mov_b32 s11, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u32_e64 s6, 0, v4\n\ts_and_b32 s6, s6, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s6, s6, s4\n\ts_xor_b32 s6, s6, -1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s7, s6\n\ts_xor_b32 s7, exec_lo, s7\n\ts_cbranch_execz .LBB0_31\n; %bb.15:\n\tv_cmp_eq_u32_e64 s6, 15, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s3, s3, s6\n\ts_xor_b32 s12, s3, -1\n\ts_and_saveexec_b32 s13, s3\n; %bb.16:\n\tv_add_nc_u32_e32 v4, 1, v0\n\ts_xor_b32 s2, s2, -1\n\ts_mov_b32 s11, exec_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_le_i32_e64 s3, s10, v4\n\ts_or_b32 s2, s2, s3\n\ts_and_not1_b32 s3, s12, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 s12, s3, s2\n; %bb.17:\n\ts_or_b32 exec_lo, exec_lo, s13\n\ts_and_saveexec_b32 s2, s12\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_xor_b32 s12, exec_lo, s2\n\ts_cbranch_execz .LBB0_28\n; %bb.18:\n\tv_cmp_eq_u32_e64 s2, 15, v2\n ; implicit-def: $vgpr4\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b32 s3, s2, s5\n\ts_mov_b32 s5, 0\n\ts_xor_b32 s13, s3, -1\n\ts_and_saveexec_b32 s14, s3\n; %bb.19:\n\tv_add_nc_u32_e32 v4, 1, v1\n\ts_xor_b32 s4, s4, -1\n\ts_mov_b32 s5, exec_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_le_i32_e64 s3, s10, v4\n\ts_or_b32 s3, s3, s4\n\ts_and_not1_b32 s4, s13, exec_lo\n\ts_and_b32 s3, s3, exec_lo\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 s13, s4, s3\n; %bb.20:\n\ts_or_b32 exec_lo, exec_lo, s14\n\ts_and_saveexec_b32 s3, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_xor_b32 s3, exec_lo, s3\n\ts_cbranch_execz .LBB0_25\n; %bb.21:\n\ts_and_b32 s2, s2, s6\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s4, s2\n\ts_cbranch_execz .LBB0_24\n; %bb.22:\n\tv_add_nc_u32_e32 v5, 1, v1\n\tv_add_nc_u32_e32 v6, 1, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_max_i32_e32 v6, v5, v6\n\tv_cmp_gt_i32_e64 s2, s10, v6\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execz .LBB0_24\n; %bb.23:\n\tv_mad_u64_u32 v[6:7], null, v5, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v7, 31, v6\n\tv_lshlrev_b64 v[5:6], 2, v[6:7]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v5, s2, s8, v5\n\tv_add_co_ci_u32_e64 v6, s2, s9, v6, s2\n\tglobal_load_b32 v5, v[5:6], off offset:4\n\tv_mov_b32_e32 v6, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v6, v5 offset:1292\n.LBB0_24:\n\ts_or_b32 exec_lo, exec_lo, s4\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 s5, s5, exec_lo\n.LBB0_25:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_and_saveexec_b32 s3, s5\n\ts_cbranch_execz .LBB0_27\n; %bb.26:\n\tv_mad_u64_u32 v[5:6], null, v4, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v6, 31, v5\n\tv_lshlrev_b64 v[4:5], 2, v[5:6]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v4, s2, s8, v4\n\tv_add_co_ci_u32_e64 v5, s2, s9, v5, s2\n\tglobal_load_b32 v4, v[4:5], off offset:-4\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:1224\n.LBB0_27:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 s11, s11, exec_lo\n.LBB0_28:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_and_saveexec_b32 s3, s11\n\ts_cbranch_execz .LBB0_30\n; %bb.29:\n\tv_add_nc_u32_e32 v6, -1, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[4:5], null, v6, s10, v[0:1]\n\tv_ashrrev_i32_e32 v5, 31, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[4:5], 2, v[4:5]\n\tv_add_co_u32 v4, s2, s8, v4\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v5, s2, s9, v5, s2\n\tglobal_load_b32 v4, v[4:5], off offset:4\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4 offset:68\n.LBB0_30:\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_31:\n\ts_and_not1_saveexec_b32 s3, s7\n\ts_cbranch_execz .LBB0_33\n; %bb.32:\n\tv_add_nc_u32_e32 v6, -1, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[4:5], null, v6, s10, v[0:1]\n\tv_ashrrev_i32_e32 v5, 31, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[4:5], 2, v[4:5]\n\tv_add_co_u32 v4, s2, s8, v4\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v5, s2, s9, v5, s2\n\tglobal_load_b32 v4, v[4:5], off offset:-4\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v5, v4\n.LBB0_33:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_and_saveexec_b32 s2, vcc_lo\n\ts_cbranch_execz .LBB0_39\n; %bb.34:\n\ts_load_b64 s[2:3], s[0:1], 0x10\n\tv_lshlrev_b32_e32 v3, 2, v3\n\ts_mov_b32 s6, -1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u32_u24 v3, v2, 0x48, v3\n\tv_mov_b32_e32 v2, 0\n\t.p2align\t6\n.LBB0_35: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_36 Depth 2\n\ts_mov_b32 s7, -12\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b64 s[4:5], s[2:3]\n.LBB0_36: ; Parent Loop BB0_35 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_add_nc_u32_e32 v4, s7, v3\n\ts_load_b32 s8, s[4:5], 0x0\n\ts_add_i32 s7, s7, 4\n\ts_add_u32 s4, s4, 4\n\ts_addc_u32 s5, s5, 0\n\tds_load_b32 v4, v4 offset:12\n\ts_cmp_eq_u32 s7, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_fmac_f32_e32 v2, s8, v4\n\ts_cbranch_scc0 .LBB0_36\n; %bb.37: ; in Loop: Header=BB0_35 Depth=1\n\ts_add_i32 s6, s6, 1\n\tv_add_nc_u32_e32 v3, 0x48, v3\n\ts_add_u32 s2, s2, 12\n\ts_addc_u32 s3, s3, 0\n\ts_cmp_eq_u32 s6, 2\n\ts_cbranch_scc0 .LBB0_35\n; %bb.38:\n\ts_load_b64 s[0:1], s[0:1], 0x8\n\tv_mad_u64_u32 v[3:4], null, v1, s10, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v4, 31, v3\n\tv_lshlrev_b64 v[0:1], 2, v[3:4]\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, s0, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo\n\tglobal_store_b32 v[0:1], v2, off\n.LBB0_39:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z17convolutionKernelPfS_S_i\n\t\t.amdhsa_group_segment_fixed_size 1296\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 28\n\t\t.amdhsa_user_sgpr_count 14\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 1\n\t\t.amdhsa_next_free_vgpr 8\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z17convolutionKernelPfS_S_i, .Lfunc_end0-_Z17convolutionKernelPfS_S_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1464\n; NumSgprs: 18\n; NumVgprs: 8\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 1296 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 0\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 8\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 14\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n .group_segment_fixed_size: 1296\n .kernarg_segment_align: 8\n .kernarg_segment_size: 28\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z17convolutionKernelPfS_S_i\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z17convolutionKernelPfS_S_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 8\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":77,"cells":{"id":{"kind":"string","value":"660e34b65b33e3ceedf05f4c3dd5fef2ec972219_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z5colorPhiiff --------------------------\n .section .text._Z5colorPhiiff,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=26\"\n .align 128\n\n\n\n\n .global _Z5colorPhiiff\n .type _Z5colorPhiiff,@function\n .size _Z5colorPhiiff,(.L_x_53 - _Z5colorPhiiff)\n .other _Z5colorPhiiff,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z5colorPhiiff:\n.text._Z5colorPhiiff:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R11, SR_CTAID.X ;\n /*0020*/ IADD3 R1, R1, -0x298, RZ ;\n /*0030*/ S2R R0, SR_TID.X ;\n /*0040*/ S2R R10, SR_CTAID.Y ;\n /*0050*/ S2R R3, SR_TID.Y ;\n /*0060*/ IMAD R11, R11, c[0x0][0x0], R0 ;\n /*0070*/ ISETP.GE.AND P0, PT, R11, c[0x0][0x168], PT ;\n /*0080*/ IMAD R10, R10, c[0x0][0x4], R3 ;\n /*0090*/ ISETP.GE.OR P0, PT, R10, c[0x0][0x168], P0 ;\n /*00a0*/ @P0 EXIT ;\n /*00b0*/ ISETP.NE.AND P0, PT, R10, c[0x0][0x16c], PT ;\n /*00c0*/ ISETP.EQ.OR P0, PT, R11, c[0x0][0x16c], !P0 ;\n /*00d0*/ @P0 EXIT ;\n /*00e0*/ IMAD.MOV.U32 R2, RZ, RZ, 0xff ;\n /*00f0*/ MOV R3, RZ ;\n /*0100*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ;\n /*0110*/ MOV R9, 0xff ;\n /*0120*/ IMAD.MOV.U32 R4, RZ, RZ, 0x11 ;\n /*0130*/ MOV R5, RZ ;\n /*0140*/ STL.64 [R1], R2 ;\n /*0150*/ IMAD.MOV.U32 R13, RZ, RZ, 0x22 ;\n /*0160*/ MOV R12, 0xff ;\n /*0170*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*0180*/ STL.64 [R1+0x8], R8 ;\n /*0190*/ MOV R15, 0xff ;\n /*01a0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x33 ;\n /*01b0*/ MOV R7, RZ ;\n /*01c0*/ STL.64 [R1+0x10], R4 ;\n /*01d0*/ IMAD.MOV.U32 R17, RZ, RZ, 0x44 ;\n /*01e0*/ MOV R16, 0xff ;\n /*01f0*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ;\n /*0200*/ STL.64 [R1+0x18], R12 ;\n /*0210*/ IMAD.MOV.U32 R2, RZ, RZ, 0x55 ;\n /*0220*/ MOV R19, 0xff ;\n /*0230*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ;\n /*0240*/ MOV R9, 0x66 ;\n /*0250*/ IMAD.MOV.U32 R8, RZ, RZ, 0xff ;\n /*0260*/ STL.64 [R1+0x40], R2 ;\n /*0270*/ MOV R21, 0xff ;\n /*0280*/ IMAD.MOV.U32 R22, RZ, RZ, 0xff ;\n /*0290*/ MOV R4, 0x77 ;\n /*02a0*/ STL.64 [R1+0x20], R14 ;\n /*02b0*/ MOV R23, RZ ;\n /*02c0*/ IMAD.MOV.U32 R13, RZ, RZ, 0xff ;\n /*02d0*/ MOV R12, RZ ;\n /*02e0*/ STL.64 [R1+0x48], R8 ;\n /*02f0*/ BSSY B2, `(.L_x_0) ;\n /*0300*/ IMAD.MOV.U32 R2, RZ, RZ, 0xbb ;\n /*0310*/ STL.64 [R1+0x58], R4 ;\n /*0320*/ IMAD.MOV.U32 R15, RZ, RZ, 0x88 ;\n /*0330*/ STL.64 [R1+0x88], R2 ;\n /*0340*/ MOV R14, 0xff ;\n /*0350*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ;\n /*0360*/ MOV R9, 0xff ;\n /*0370*/ STL.64 [R1+0x28], R6 ;\n /*0380*/ MOV R4, 0xdd ;\n /*0390*/ STL.64 [R1+0x50], R12 ;\n /*03a0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x3f ;\n /*03b0*/ STL.64 [R1+0x60], R14 ;\n /*03c0*/ STL.64 [R1+0x80], R8 ;\n /*03d0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x99 ;\n /*03e0*/ STL.64 [R1+0x110], R2 ;\n /*03f0*/ MOV R13, 0xcc ;\n /*0400*/ IMAD.MOV.U32 R12, RZ, RZ, 0xff ;\n /*0410*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*0420*/ MOV R15, 0xff ;\n /*0430*/ STL.64 [R1+0xa0], R4 ;\n /*0440*/ MOV R9, 0xaa ;\n /*0450*/ STL.64 [R1+0x30], R16 ;\n /*0460*/ MOV R2, 0xd1 ;\n /*0470*/ IMAD.MOV.U32 R3, RZ, RZ, 0xff ;\n /*0480*/ STL.64 [R1+0x70], R6 ;\n /*0490*/ MOV R4, 0xbf ;\n /*04a0*/ STL.64 [R1+0x90], R12 ;\n /*04b0*/ MOV R17, 0xaa ;\n /*04c0*/ STL.64 [R1+0xb0], R14 ;\n /*04d0*/ IMAD.MOV.U32 R7, RZ, RZ, 0xee ;\n /*04e0*/ STL.64 [R1+0xc8], R8 ;\n /*04f0*/ MOV R6, 0xff ;\n /*0500*/ STL.64 [R1+0x148], R2 ;\n /*0510*/ IMAD.MOV.U32 R13, RZ, RZ, RZ ;\n /*0520*/ IMAD.MOV.U32 R14, RZ, RZ, 0xff ;\n /*0530*/ STL.64 [R1+0x128], R4 ;\n /*0540*/ MOV R9, 0x7f ;\n /*0550*/ IMAD.MOV.U32 R8, RZ, RZ, 0xff ;\n /*0560*/ STL.64 [R1+0x38], R18 ;\n /*0570*/ IMAD.MOV.U32 R2, RZ, RZ, 0x46 ;\n /*0580*/ STL.64 [R1+0x68], R20 ;\n /*0590*/ IMAD.MOV.U32 R4, RZ, RZ, 0xa3 ;\n /*05a0*/ MOV R5, 0xff ;\n /*05b0*/ STL.64 [R1+0x78], R16 ;\n /*05c0*/ STL.64 [R1+0x98], R18 ;\n /*05d0*/ IMAD.MOV.U32 R20, RZ, RZ, 0xff ;\n /*05e0*/ STL.64 [R1+0xa8], R6 ;\n /*05f0*/ MOV R21, RZ ;\n /*0600*/ STL.64 [R1+0xd0], R12 ;\n /*0610*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ;\n /*0620*/ STL.64 [R1+0x118], R8 ;\n /*0630*/ MOV R19, 0x55 ;\n /*0640*/ STL.64 [R1+0x130], R14 ;\n /*0650*/ IMAD.MOV.U32 R6, RZ, RZ, RZ ;\n /*0660*/ MOV R7, 0xff ;\n /*0670*/ STL.64 [R1+0x190], R2 ;\n /*0680*/ MOV R12, RZ ;\n /*0690*/ IMAD.MOV.U32 R13, RZ, RZ, 0xff ;\n /*06a0*/ MOV R9, RZ ;\n /*06b0*/ STL.64 [R1+0x160], R4 ;\n /*06c0*/ MOV R15, RZ ;\n /*06d0*/ STL.64 [R1+0xb8], R16 ;\n /*06e0*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4e ;\n /*06f0*/ MOV R3, RZ ;\n /*0700*/ STL.64 [R1+0xe0], R18 ;\n /*0710*/ MOV R4, 0x18 ;\n /*0720*/ STL.64 [R1+0xe8], R20 ;\n /*0730*/ MOV R17, 0xe8 ;\n /*0740*/ STL.64 [R1+0x108], R6 ;\n /*0750*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ;\n /*0760*/ STL.64 [R1+0x120], R12 ;\n /*0770*/ MOV R18, 0xff ;\n /*0780*/ IMAD.MOV.U32 R19, RZ, RZ, RZ ;\n /*0790*/ STL.64 [R1+0x158], R8 ;\n /*07a0*/ MOV R21, 0xba ;\n /*07b0*/ IMAD.MOV.U32 R20, RZ, RZ, RZ ;\n /*07c0*/ STL.64 [R1+0x170], R14 ;\n /*07d0*/ IMAD.MOV.U32 R6, RZ, RZ, 0x74 ;\n /*07e0*/ STL.64 [R1+0x1e0], R2 ;\n /*07f0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x8c ;\n /*0800*/ MOV R9, 0x2f ;\n /*0810*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ;\n /*0820*/ STL.64 [R1+0x1a8], R4 ;\n /*0830*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*0840*/ MOV R15, 0xff ;\n /*0850*/ STL.64 [R1+0x138], R16 ;\n /*0860*/ IMAD.MOV.U32 R2, RZ, RZ, 0x9c ;\n /*0870*/ STL.64 [R1+0x140], R18 ;\n /*0880*/ IMAD.MOV.U32 R4, RZ, RZ, 0x75 ;\n /*0890*/ MOV R5, RZ ;\n /*08a0*/ STL.64 [R1+0x150], R20 ;\n /*08b0*/ MOV R17, 0x5d ;\n /*08c0*/ STL.64 [R1+0x168], R12 ;\n /*08d0*/ STL.64 [R1+0x178], R6 ;\n /*08e0*/ STL.64 [R1+0x188], R18 ;\n /*08f0*/ MOV R20, 0xff ;\n /*0900*/ IMAD.MOV.U32 R21, RZ, RZ, RZ ;\n /*0910*/ STL.64 [R1+0x198], R8 ;\n /*0920*/ IMAD.MOV.U32 R13, RZ, RZ, 0x13 ;\n /*0930*/ MOV R12, 0xff ;\n /*0940*/ STL.64 [R1+0x1c0], R14 ;\n /*0950*/ IMAD.MOV.U32 R6, RZ, RZ, 0x27 ;\n /*0960*/ MOV R7, RZ ;\n /*0970*/ STL.64 [R1+0x210], R2 ;\n /*0980*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ;\n /*0990*/ MOV R19, 0xff ;\n /*09a0*/ IMAD.MOV.U32 R9, RZ, RZ, 0x62 ;\n /*09b0*/ MOV R8, 0xff ;\n /*09c0*/ STL.64 [R1+0x1f8], R4 ;\n /*09d0*/ IMAD.MOV.U32 R15, RZ, RZ, 0x89 ;\n /*09e0*/ MOV R14, 0xff ;\n /*09f0*/ STL.64 [R1+0x180], R16 ;\n /*0a00*/ I2FP.F32.S32 R2, c[0x0][0x16c] ;\n /*0a10*/ STL.64 [R1+0x1a0], R20 ;\n /*0a20*/ MUFU.RCP R3, R2 ;\n /*0a30*/ IMAD.MOV.U32 R5, RZ, RZ, 0xd7 ;\n /*0a40*/ MOV R4, 0xff ;\n /*0a50*/ STL.64 [R1+0x1b8], R12 ;\n /*0a60*/ IMAD.MOV.U32 R17, RZ, RZ, 0x3a ;\n /*0a70*/ MOV R16, 0xff ;\n /*0a80*/ STL.64 [R1+0x1c8], R6 ;\n /*0a90*/ MOV R20, RZ ;\n /*0aa0*/ IMAD.MOV.U32 R21, RZ, RZ, 0xff ;\n /*0ab0*/ STL.64 [R1+0x1d8], R18 ;\n /*0ac0*/ STL.64 [R1+0x1e8], R8 ;\n /*0ad0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ;\n /*0ae0*/ MOV R13, 0xff ;\n /*0af0*/ FFMA R0, -R2, R3, 1 ;\n /*0b00*/ STL.64 [R1+0x200], R14 ;\n /*0b10*/ MOV R6, 0xc4 ;\n /*0b20*/ FFMA R0, R3, R0, R3 ;\n /*0b30*/ MOV R19, 0xb0 ;\n /*0b40*/ IMAD.MOV.U32 R18, RZ, RZ, 0xff ;\n /*0b50*/ STL.64 [R1+0x230], R4 ;\n /*0b60*/ IMAD.MOV.U32 R8, RZ, RZ, 0xeb ;\n /*0b70*/ MOV R9, RZ ;\n /*0b80*/ STL.64 [R1+0x1d0], R16 ;\n /*0b90*/ IMAD.MOV.U32 R15, RZ, RZ, 0xff ;\n /*0ba0*/ STL.64 [R1+0x1f0], R12 ;\n /*0bb0*/ IMAD.MOV.U32 R4, RZ, RZ, 0xd5 ;\n /*0bc0*/ MOV R5, 0xff ;\n /*0bd0*/ STL.64 [R1+0x218], R18 ;\n /*0be0*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ;\n /*0bf0*/ MOV R17, 0xff ;\n /*0c00*/ STL.64 [R1+0x220], R20 ;\n /*0c10*/ STL.64 [R1+0x228], R6 ;\n /*0c20*/ STL.64 [R1+0x238], R12 ;\n /*0c30*/ MOV R19, RZ ;\n /*0c40*/ STL.64 [R1+0x240], R8 ;\n /*0c50*/ IMAD.MOV.U32 R21, RZ, RZ, 0xaa ;\n /*0c60*/ STL.64 [R1+0x248], R14 ;\n /*0c70*/ MOV R6, 0x80 ;\n /*0c80*/ IMAD.MOV.U32 R7, RZ, RZ, 0xff ;\n /*0c90*/ MOV R13, 0x55 ;\n /*0ca0*/ STL.64 [R1+0xc0], R4 ;\n /*0cb0*/ MOV R8, 0x2b ;\n /*0cc0*/ IMAD.MOV.U32 R9, RZ, RZ, 0xff ;\n /*0cd0*/ STL.64 [R1+0x260], R4 ;\n /*0ce0*/ IMAD.MOV.U32 R15, RZ, RZ, RZ ;\n /*0cf0*/ STL.64 [R1+0x100], R22 ;\n /*0d00*/ STL.64 [R1+0x208], R16 ;\n /*0d10*/ I2FP.F32.S32 R5, R11 ;\n /*0d20*/ STL.64 [R1+0x250], R16 ;\n /*0d30*/ FCHK P0, R5, R2 ;\n /*0d40*/ STL.64 [R1+0x258], R18 ;\n /*0d50*/ FFMA R3, R5, R0, RZ ;\n /*0d60*/ STL.64 [R1+0x268], R20 ;\n /*0d70*/ FFMA R4, -R2, R3, R5 ;\n /*0d80*/ STL.64 [R1+0x270], R22 ;\n /*0d90*/ FFMA R4, R0, R4, R3 ;\n /*0da0*/ IMAD R0, R10, c[0x0][0x168], R11 ;\n /*0db0*/ MOV R3, R1 ;\n /*0dc0*/ STL.64 [R1+0xd8], R6 ;\n /*0dd0*/ STL.64 [R1+0x278], R6 ;\n /*0de0*/ STL.64 [R1+0x280], R12 ;\n /*0df0*/ STL.64 [R1+0x288], R14 ;\n /*0e00*/ STL.64 [R1+0xf0], R8 ;\n /*0e10*/ STL [R1+0x290], R8 ;\n /*0e20*/ STL.64 [R1+0xf8], RZ ;\n /*0e30*/ STL.64 [R1+0x1b0], RZ ;\n /*0e40*/ @!P0 BRA `(.L_x_1) ;\n /*0e50*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ;\n /*0e60*/ MOV R11, 0xe80 ;\n /*0e70*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*0e80*/ MOV R4, R13 ;\n.L_x_1:\n /*0e90*/ BSYNC B2 ;\n.L_x_0:\n /*0ea0*/ MUFU.RCP R6, c[0x0][0x174] ;\n /*0eb0*/ MOV R5, c[0x0][0x170] ;\n /*0ec0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ;\n /*0ed0*/ BSSY B2, `(.L_x_2) ;\n /*0ee0*/ FFMA R5, R4, R5, -c[0x0][0x170] ;\n /*0ef0*/ FCHK P0, R5, c[0x0][0x174] ;\n /*0f00*/ FFMA R7, R6, -R7, 1 ;\n /*0f10*/ FFMA R6, R6, R7, R6 ;\n /*0f20*/ FFMA R4, R5, R6, RZ ;\n /*0f30*/ FFMA R7, R4, -c[0x0][0x174], R5 ;\n /*0f40*/ FFMA R6, R6, R7, R4 ;\n /*0f50*/ @!P0 BRA `(.L_x_3) ;\n /*0f60*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x174] ;\n /*0f70*/ MOV R11, 0xf90 ;\n /*0f80*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*0f90*/ MOV R6, R13 ;\n.L_x_3:\n /*0fa0*/ BSYNC B2 ;\n.L_x_2:\n /*0fb0*/ MUFU.RCP R7, R2 ;\n /*0fc0*/ I2FP.F32.S32 R5, R10 ;\n /*0fd0*/ BSSY B2, `(.L_x_4) ;\n /*0fe0*/ FCHK P0, R5, R2 ;\n /*0ff0*/ FFMA R4, -R2, R7, 1 ;\n /*1000*/ FFMA R4, R7, R4, R7 ;\n /*1010*/ FFMA R7, R4, R5, RZ ;\n /*1020*/ FFMA R8, -R2, R7, R5 ;\n /*1030*/ FFMA R4, R4, R8, R7 ;\n /*1040*/ @!P0 BRA `(.L_x_5) ;\n /*1050*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ;\n /*1060*/ MOV R11, 0x1080 ;\n /*1070*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1080*/ MOV R4, R13 ;\n.L_x_5:\n /*1090*/ BSYNC B2 ;\n.L_x_4:\n /*10a0*/ MUFU.RCP R2, c[0x0][0x174] ;\n /*10b0*/ MOV R5, c[0x0][0x170] ;\n /*10c0*/ IMAD.MOV.U32 R7, RZ, RZ, c[0x0][0x174] ;\n /*10d0*/ BSSY B2, `(.L_x_6) ;\n /*10e0*/ FFMA R5, R4, R5, -c[0x0][0x170] ;\n /*10f0*/ FCHK P0, R5, c[0x0][0x174] ;\n /*1100*/ FFMA R7, R2, -R7, 1 ;\n /*1110*/ FFMA R2, R2, R7, R2 ;\n /*1120*/ FFMA R9, R2, R5, RZ ;\n /*1130*/ FFMA R4, R9, -c[0x0][0x174], R5 ;\n /*1140*/ FFMA R9, R2, R4, R9 ;\n /*1150*/ @!P0 BRA `(.L_x_7) ;\n /*1160*/ IMAD.MOV.U32 R4, RZ, RZ, c[0x0][0x174] ;\n /*1170*/ MOV R11, 0x1190 ;\n /*1180*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1190*/ MOV R9, R13 ;\n.L_x_7:\n /*11a0*/ BSYNC B2 ;\n.L_x_6:\n /*11b0*/ FSETP.NEU.AND P0, PT, |R9|.reuse, RZ, PT ;\n /*11c0*/ FMUL R5, R9.reuse, R9 ;\n /*11d0*/ FSETP.EQ.AND P1, PT, |R6|.reuse, RZ, PT ;\n /*11e0*/ BSSY B2, `(.L_x_8) ;\n /*11f0*/ FADD R7, -R9, -RZ ;\n /*1200*/ FADD R10, -R6.reuse, -RZ ;\n /*1210*/ FFMA R8, R6, R6, R5 ;\n /*1220*/ @!P0 BRA P1, `(.L_x_9) ;\n /*1230*/ FSETP.NEU.AND P0, PT, |R9|, +INF , PT ;\n /*1240*/ FSETP.EQ.AND P1, PT, |R6|, +INF , PT ;\n /*1250*/ @!P0 BRA P1, `(.L_x_10) ;\n /*1260*/ FMNMX R12, |R9|.reuse, |R6|.reuse, !PT ;\n /*1270*/ BSSY B3, `(.L_x_11) ;\n /*1280*/ FMNMX R5, |R9|, |R6|, PT ;\n /*1290*/ MUFU.RCP R2, R12 ;\n /*12a0*/ FCHK P0, R5, R12 ;\n /*12b0*/ FFMA R11, -R12, R2, 1 ;\n /*12c0*/ FFMA R2, R2, R11, R2 ;\n /*12d0*/ FFMA R11, R5, R2, RZ ;\n /*12e0*/ FFMA R4, -R12, R11, R5 ;\n /*12f0*/ FFMA R11, R2, R4, R11 ;\n /*1300*/ @!P0 BRA `(.L_x_12) ;\n /*1310*/ IMAD.MOV.U32 R4, RZ, RZ, R12 ;\n /*1320*/ MOV R11, 0x1340 ;\n /*1330*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1340*/ MOV R11, R13 ;\n.L_x_12:\n /*1350*/ BSYNC B3 ;\n.L_x_11:\n /*1360*/ FMUL R2, R11, R11 ;\n /*1370*/ BSSY B0, `(.L_x_13) ;\n /*1380*/ FADD R5, R2, 11.33538818359375 ;\n /*1390*/ FFMA R5, R2, R5, 28.84246826171875 ;\n /*13a0*/ FFMA R13, R2, R5, 19.6966705322265625 ;\n /*13b0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3f52c7ea ;\n /*13c0*/ IADD3 R4, R13, 0x1800000, RZ ;\n /*13d0*/ FFMA R5, R2, -R5, -5.6748671531677246094 ;\n /*13e0*/ LOP3.LUT R4, R4, 0x7f800000, RZ, 0xc0, !PT ;\n /*13f0*/ FFMA R5, R2, R5, -6.5655550956726074219 ;\n /*1400*/ ISETP.GT.U32.AND P0, PT, R4, 0x1ffffff, PT ;\n /*1410*/ FMUL R12, R2, R5 ;\n /*1420*/ FMUL R12, R12, R11 ;\n /*1430*/ @P0 BRA `(.L_x_14) ;\n /*1440*/ MOV R14, 0x1460 ;\n /*1450*/ CALL.REL.NOINC `($__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath) ;\n /*1460*/ MOV R2, R5 ;\n /*1470*/ BRA `(.L_x_15) ;\n.L_x_14:\n /*1480*/ MUFU.RCP R2, R13 ;\n /*1490*/ FFMA R4, R13, R2, -1 ;\n /*14a0*/ FADD.FTZ R5, -R4, -RZ ;\n /*14b0*/ FFMA R2, R2, R5, R2 ;\n.L_x_15:\n /*14c0*/ BSYNC B0 ;\n.L_x_13:\n /*14d0*/ FSETP.GT.AND P0, PT, |R9|.reuse, |R6|, PT ;\n /*14e0*/ FADD R9, |R9|, |R6| ;\n /*14f0*/ ISETP.GE.AND P1, PT, R10, RZ, PT ;\n /*1500*/ FFMA R2, R12, R2, R11 ;\n /*1510*/ LOP3.LUT R7, R7, 0x80000000, RZ, 0xc0, !PT ;\n /*1520*/ FSETP.GTU.AND P2, PT, R9, +INF , PT ;\n /*1530*/ @P0 FADD R2, -R2, 1.5707963705062866211 ;\n /*1540*/ @!P1 FADD R2, -R2, 3.1415927410125732422 ;\n /*1550*/ @!P2 LOP3.LUT R9, R7, R2, RZ, 0xfc, !PT ;\n /*1560*/ BRA `(.L_x_16) ;\n.L_x_10:\n /*1570*/ IMAD.MOV.U32 R2, RZ, RZ, 0x4016cbe4 ;\n /*1580*/ ISETP.GE.AND P0, PT, R10, RZ, PT ;\n /*1590*/ SEL R2, R2, 0x3f490fdb, !P0 ;\n /*15a0*/ LOP3.LUT R9, R2, 0x80000000, R7, 0xf8, !PT ;\n /*15b0*/ BRA `(.L_x_16) ;\n.L_x_9:\n /*15c0*/ SHF.R.S32.HI R10, RZ, 0x1f, R10 ;\n /*15d0*/ LOP3.LUT R10, R10, 0x40490fdb, RZ, 0xc0, !PT ;\n /*15e0*/ LOP3.LUT R9, R10, 0x80000000, R7, 0xf8, !PT ;\n.L_x_16:\n /*15f0*/ BSYNC B2 ;\n.L_x_8:\n /*1600*/ IADD3 R2, R8, -0xd000000, RZ ;\n /*1610*/ MUFU.RSQ R7, R8 ;\n /*1620*/ BSSY B0, `(.L_x_17) ;\n /*1630*/ ISETP.GT.U32.AND P0, PT, R2, 0x727fffff, PT ;\n /*1640*/ @!P0 BRA `(.L_x_18) ;\n /*1650*/ MOV R10, 0x1670 ;\n /*1660*/ CALL.REL.NOINC `($__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath) ;\n /*1670*/ MOV R6, R8 ;\n /*1680*/ BRA `(.L_x_19) ;\n.L_x_18:\n /*1690*/ FMUL.FTZ R5, R8, R7 ;\n /*16a0*/ FMUL.FTZ R2, R7, 0.5 ;\n /*16b0*/ FFMA R6, -R5, R5, R8 ;\n /*16c0*/ FFMA R6, R6, R2, R5 ;\n.L_x_19:\n /*16d0*/ BSYNC B0 ;\n.L_x_17:\n /*16e0*/ MOV R2, 0x40490fdb ;\n /*16f0*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3ea2f983 ;\n /*1700*/ FCHK P0, R9, 3.1415927410125732422 ;\n /*1710*/ BSSY B2, `(.L_x_20) ;\n /*1720*/ FFMA R2, R5, -R2, 1 ;\n /*1730*/ FFMA R2, R2, R5, 0.31830987334251403809 ;\n /*1740*/ FFMA R4, R2, R9, RZ ;\n /*1750*/ FFMA R5, R4, -3.1415927410125732422, R9 ;\n /*1760*/ FFMA R2, R2, R5, R4 ;\n /*1770*/ @!P0 BRA `(.L_x_21) ;\n /*1780*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ;\n /*1790*/ MOV R4, 0x40490fdb ;\n /*17a0*/ MOV R11, 0x17c0 ;\n /*17b0*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*17c0*/ IMAD.MOV.U32 R2, RZ, RZ, R13 ;\n.L_x_21:\n /*17d0*/ BSYNC B2 ;\n.L_x_20:\n /*17e0*/ FADD R2, R2, 1 ;\n /*17f0*/ FMUL R2, R2, 0.5 ;\n /*1800*/ FMUL R2, R2, 54 ;\n /*1810*/ F2I.TRUNC.NTZ R4, R2 ;\n /*1820*/ IMAD R7, R4, 0xc, R3 ;\n /*1830*/ LDL R5, [R7] ;\n /*1840*/ MOV R12, 0x3b808081 ;\n /*1850*/ IMAD.MOV.U32 R9, RZ, RZ, 0x437f0000 ;\n /*1860*/ IADD3 R10, R4, 0x1, RZ ;\n /*1870*/ BSSY B2, `(.L_x_22) ;\n /*1880*/ I2FP.F32.S32 R11, R4 ;\n /*1890*/ FFMA R9, R12, -R9, 1 ;\n /*18a0*/ IMAD.HI R8, R10, 0x94f2095, RZ ;\n /*18b0*/ FFMA R12, R9, R12, 0.0039215688593685626984 ;\n /*18c0*/ SHF.R.S32.HI R9, RZ, 0x1, R8 ;\n /*18d0*/ LEA.HI R9, R8, R9, RZ, 0x1 ;\n /*18e0*/ FADD R8, R2, -R11 ;\n /*18f0*/ IMAD R10, R9, -0x37, R10 ;\n /*1900*/ FADD R9, -R8, 1 ;\n /*1910*/ I2FP.F32.S32 R5, R5 ;\n /*1920*/ FCHK P0, R5, 255 ;\n /*1930*/ FFMA R4, R5, R12, RZ ;\n /*1940*/ FFMA R13, R4, -255, R5 ;\n /*1950*/ FFMA R12, R12, R13, R4 ;\n /*1960*/ @!P0 BRA `(.L_x_23) ;\n /*1970*/ MOV R4, 0x437f0000 ;\n /*1980*/ MOV R11, 0x19a0 ;\n /*1990*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*19a0*/ IMAD.MOV.U32 R12, RZ, RZ, R13 ;\n.L_x_23:\n /*19b0*/ BSYNC B2 ;\n.L_x_22:\n /*19c0*/ IMAD R10, R10, 0xc, R3 ;\n /*19d0*/ LDL R2, [R10] ;\n /*19e0*/ MOV R3, 0x3b808081 ;\n /*19f0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x437f0000 ;\n /*1a00*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*1a10*/ BSSY B2, `(.L_x_24) ;\n /*1a20*/ FFMA R4, R3, -R4, 1 ;\n /*1a30*/ I2FP.F32.S32 R5, R2 ;\n /*1a40*/ FFMA R2, R4, R3, 0.0039215688593685626984 ;\n /*1a50*/ FCHK P0, R5, 255 ;\n /*1a60*/ FFMA R3, R2, R5, RZ ;\n /*1a70*/ FFMA R4, R3, -255, R5 ;\n /*1a80*/ FFMA R3, R2, R4, R3 ;\n /*1a90*/ @!P0 BRA `(.L_x_25) ;\n /*1aa0*/ MOV R4, 0x437f0000 ;\n /*1ab0*/ MOV R11, 0x1ad0 ;\n /*1ac0*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1ad0*/ IMAD.MOV.U32 R3, RZ, RZ, R13 ;\n.L_x_25:\n /*1ae0*/ BSYNC B2 ;\n.L_x_24:\n /*1af0*/ LDL R11, [R7+0x4] ;\n /*1b00*/ FMUL R2, R8, R3 ;\n /*1b10*/ FSETP.GTU.AND P2, PT, R6, 1, PT ;\n /*1b20*/ IMAD R0, R0, 0x3, RZ ;\n /*1b30*/ BSSY B2, `(.L_x_26) ;\n /*1b40*/ FFMA R2, R9, R12, R2 ;\n /*1b50*/ IMAD.MOV.U32 R13, RZ, RZ, 0x437f0000 ;\n /*1b60*/ FADD R3, -R2, 1 ;\n /*1b70*/ FFMA R3, R3, -R6, 1 ;\n /*1b80*/ @P2 FMUL R3, R2, 0.75 ;\n /*1b90*/ IADD3 R2, P0, R0, c[0x0][0x160], RZ ;\n /*1ba0*/ FMUL R4, R3, 255 ;\n /*1bb0*/ LEA.HI.X.SX32 R3, R0, c[0x0][0x164], 0x1, P0 ;\n /*1bc0*/ MOV R0, 0x3b808081 ;\n /*1bd0*/ F2I.TRUNC.NTZ R5, R4 ;\n /*1be0*/ FFMA R13, R0, -R13, 1 ;\n /*1bf0*/ FFMA R0, R13, R0, 0.0039215688593685626984 ;\n /*1c00*/ STG.E.U8 [R2.64+0x2], R5 ;\n /*1c10*/ I2FP.F32.S32 R14, R11 ;\n /*1c20*/ FCHK P0, R14, 255 ;\n /*1c30*/ FFMA R11, R0, R14, RZ ;\n /*1c40*/ FFMA R12, R11, -255, R14 ;\n /*1c50*/ FFMA R12, R0, R12, R11 ;\n /*1c60*/ @!P0 BRA `(.L_x_27) ;\n /*1c70*/ MOV R5, R14 ;\n /*1c80*/ IMAD.MOV.U32 R4, RZ, RZ, 0x437f0000 ;\n /*1c90*/ MOV R11, 0x1cb0 ;\n /*1ca0*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1cb0*/ MOV R12, R13 ;\n.L_x_27:\n /*1cc0*/ BSYNC B2 ;\n.L_x_26:\n /*1cd0*/ LDL R0, [R10+0x4] ;\n /*1ce0*/ MOV R5, 0x437f0000 ;\n /*1cf0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x3b808081 ;\n /*1d00*/ BSSY B2, `(.L_x_28) ;\n /*1d10*/ FFMA R5, R4, -R5, 1 ;\n /*1d20*/ I2FP.F32.S32 R14, R0 ;\n /*1d30*/ FFMA R0, R5, R4, 0.0039215688593685626984 ;\n /*1d40*/ FCHK P0, R14, 255 ;\n /*1d50*/ FFMA R5, R0, R14, RZ ;\n /*1d60*/ FFMA R4, R5, -255, R14 ;\n /*1d70*/ FFMA R5, R0, R4, R5 ;\n /*1d80*/ @!P0 BRA `(.L_x_29) ;\n /*1d90*/ IMAD.MOV.U32 R5, RZ, RZ, R14 ;\n /*1da0*/ MOV R4, 0x437f0000 ;\n /*1db0*/ MOV R11, 0x1dd0 ;\n /*1dc0*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1dd0*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ;\n.L_x_29:\n /*1de0*/ BSYNC B2 ;\n.L_x_28:\n /*1df0*/ LDL R7, [R7+0x8] ;\n /*1e00*/ FMUL R0, R8, R5 ;\n /*1e10*/ IMAD.MOV.U32 R11, RZ, RZ, 0x437f0000 ;\n /*1e20*/ BSSY B2, `(.L_x_30) ;\n /*1e30*/ FFMA R0, R9, R12, R0 ;\n /*1e40*/ FADD R5, -R0, 1 ;\n /*1e50*/ FFMA R5, R5, -R6, 1 ;\n /*1e60*/ @P2 FMUL R5, R0, 0.75 ;\n /*1e70*/ MOV R0, 0x3b808081 ;\n /*1e80*/ FMUL R5, R5, 255 ;\n /*1e90*/ FFMA R11, R0, -R11, 1 ;\n /*1ea0*/ F2I.TRUNC.NTZ R5, R5 ;\n /*1eb0*/ FFMA R0, R11, R0, 0.0039215688593685626984 ;\n /*1ec0*/ STG.E.U8 [R2.64+0x1], R5 ;\n /*1ed0*/ I2FP.F32.S32 R4, R7 ;\n /*1ee0*/ FCHK P0, R4, 255 ;\n /*1ef0*/ FFMA R7, R0, R4, RZ ;\n /*1f00*/ FFMA R12, R7, -255, R4 ;\n /*1f10*/ FFMA R12, R0, R12, R7 ;\n /*1f20*/ @!P0 BRA `(.L_x_31) ;\n /*1f30*/ MOV R5, R4 ;\n /*1f40*/ IMAD.MOV.U32 R4, RZ, RZ, 0x437f0000 ;\n /*1f50*/ MOV R11, 0x1f70 ;\n /*1f60*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*1f70*/ MOV R12, R13 ;\n.L_x_31:\n /*1f80*/ BSYNC B2 ;\n.L_x_30:\n /*1f90*/ LDL R10, [R10+0x8] ;\n /*1fa0*/ MOV R5, 0x437f0000 ;\n /*1fb0*/ IMAD.MOV.U32 R0, RZ, RZ, 0x3b808081 ;\n /*1fc0*/ BSSY B2, `(.L_x_32) ;\n /*1fd0*/ FFMA R5, R0, -R5, 1 ;\n /*1fe0*/ FFMA R0, R5, R0, 0.0039215688593685626984 ;\n /*1ff0*/ I2FP.F32.S32 R14, R10 ;\n /*2000*/ FCHK P0, R14, 255 ;\n /*2010*/ FFMA R5, R0, R14, RZ ;\n /*2020*/ FFMA R4, R5, -255, R14 ;\n /*2030*/ FFMA R5, R0, R4, R5 ;\n /*2040*/ @!P0 BRA `(.L_x_33) ;\n /*2050*/ IMAD.MOV.U32 R5, RZ, RZ, R14 ;\n /*2060*/ MOV R4, 0x437f0000 ;\n /*2070*/ MOV R11, 0x2090 ;\n /*2080*/ CALL.REL.NOINC `($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*2090*/ IMAD.MOV.U32 R5, RZ, RZ, R13 ;\n.L_x_33:\n /*20a0*/ BSYNC B2 ;\n.L_x_32:\n /*20b0*/ FMUL R8, R8, R5 ;\n /*20c0*/ FFMA R8, R9, R12, R8 ;\n /*20d0*/ FADD R5, -R8, 1 ;\n /*20e0*/ FFMA R5, R5, -R6, 1 ;\n /*20f0*/ @P2 FMUL R5, R8, 0.75 ;\n /*2100*/ FMUL R5, R5, 255 ;\n /*2110*/ F2I.TRUNC.NTZ R5, R5 ;\n /*2120*/ STG.E.U8 [R2.64], R5 ;\n /*2130*/ EXIT ;\n\n\n\n\n .weak $__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath\n .type $__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath,@function\n .size $__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath,($__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath - $__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath)\n$__internal_0_$__cuda_sm20_rcp_rn_f32_slowpath:\n /*2140*/ SHF.L.U32 R2, R13, 0x1, RZ ;\n /*2150*/ BSSY B1, `(.L_x_34) ;\n /*2160*/ SHF.R.U32.HI R15, RZ, 0x18, R2 ;\n /*2170*/ IMAD.MOV.U32 R2, RZ, RZ, R13 ;\n /*2180*/ ISETP.NE.U32.AND P0, PT, R15, RZ, PT ;\n /*2190*/ @P0 BRA `(.L_x_35) ;\n /*21a0*/ SHF.L.U32 R4, R2, 0x1, RZ ;\n /*21b0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ;\n /*21c0*/ @P0 FFMA R13, R2, 1.84467440737095516160e+19, RZ ;\n /*21d0*/ @!P0 MUFU.RCP R5, R2 ;\n /*21e0*/ @P0 MUFU.RCP R4, R13 ;\n /*21f0*/ @P0 FFMA R15, R13, R4, -1 ;\n /*2200*/ @P0 FADD.FTZ R15, -R15, -RZ ;\n /*2210*/ @P0 FFMA R4, R4, R15, R4 ;\n /*2220*/ @P0 FFMA R5, R4, 1.84467440737095516160e+19, RZ ;\n /*2230*/ BRA `(.L_x_36) ;\n.L_x_35:\n /*2240*/ IADD3 R17, R15, -0xfd, RZ ;\n /*2250*/ ISETP.GT.U32.AND P0, PT, R17, 0x1, PT ;\n /*2260*/ @P0 BRA `(.L_x_37) ;\n /*2270*/ LOP3.LUT R4, R2, 0x7fffff, RZ, 0xc0, !PT ;\n /*2280*/ MOV R18, 0x3 ;\n /*2290*/ LOP3.LUT R4, R4, 0x3f800000, RZ, 0xfc, !PT ;\n /*22a0*/ SHF.L.U32 R18, R18, R17, RZ ;\n /*22b0*/ MUFU.RCP R5, R4 ;\n /*22c0*/ FFMA R13, R4, R5, -1 ;\n /*22d0*/ FADD.FTZ R16, -R13, -RZ ;\n /*22e0*/ FFMA.RM R13, R5.reuse, R16.reuse, R5.reuse ;\n /*22f0*/ FFMA.RP R16, R5, R16, R5 ;\n /*2300*/ LOP3.LUT R5, R13.reuse, 0x7fffff, RZ, 0xc0, !PT ;\n /*2310*/ FSETP.NEU.FTZ.AND P0, PT, R13, R16, PT ;\n /*2320*/ LOP3.LUT R5, R5, 0x800000, RZ, 0xfc, !PT ;\n /*2330*/ SEL R13, RZ, 0xffffffff, !P0 ;\n /*2340*/ LOP3.LUT R18, R18, R5, RZ, 0xc0, !PT ;\n /*2350*/ IMAD.MOV R4, RZ, RZ, -R13 ;\n /*2360*/ SHF.R.U32.HI R18, RZ, R17, R18 ;\n /*2370*/ LOP3.LUT P1, RZ, R4, R17, R5, 0xf8, !PT ;\n /*2380*/ LOP3.LUT P0, RZ, R18.reuse, 0x1, RZ, 0xc0, !PT ;\n /*2390*/ LOP3.LUT P2, RZ, R18, 0x2, RZ, 0xc0, !PT ;\n /*23a0*/ PLOP3.LUT P0, PT, P0, P1, P2, 0xe0, 0x0 ;\n /*23b0*/ LOP3.LUT P1, RZ, R2, 0x7fffff, RZ, 0xc0, !PT ;\n /*23c0*/ SEL R4, RZ, 0x1, !P0 ;\n /*23d0*/ IADD3 R4, -R4, RZ, RZ ;\n /*23e0*/ ISETP.GE.AND P0, PT, R4, RZ, PT ;\n /*23f0*/ IADD3 R4, R15, -0xfc, RZ ;\n /*2400*/ SHF.R.U32.HI R5, RZ, R4, R5 ;\n /*2410*/ @!P0 IADD3 R5, R5, 0x1, RZ ;\n /*2420*/ @!P1 SHF.L.U32 R5, R5, 0x1, RZ ;\n /*2430*/ LOP3.LUT R5, R5, 0x80000000, R2, 0xf8, !PT ;\n /*2440*/ BRA `(.L_x_36) ;\n.L_x_37:\n /*2450*/ MUFU.RCP R5, R2 ;\n.L_x_36:\n /*2460*/ BSYNC B1 ;\n.L_x_34:\n /*2470*/ IMAD.MOV.U32 R15, RZ, RZ, 0x0 ;\n /*2480*/ RET.REL.NODEC R14 `(_Z5colorPhiiff) ;\n\n\n\n\n .weak $__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath\n .type $__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath,@function\n .size $__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath,($__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath - $__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath)\n$__internal_1_$__cuda_sm20_sqrt_rn_f32_slowpath:\n /*2490*/ LOP3.LUT P0, RZ, R8, 0x7fffffff, RZ, 0xc0, !PT ;\n /*24a0*/ @!P0 BRA `(.L_x_38) ;\n /*24b0*/ FSETP.GEU.FTZ.AND P0, PT, R8, RZ, PT ;\n /*24c0*/ MOV R2, R8 ;\n /*24d0*/ @!P0 MOV R8, 0x7fffffff ;\n /*24e0*/ @!P0 BRA `(.L_x_38) ;\n /*24f0*/ FSETP.GTU.FTZ.AND P0, PT, |R2|, +INF , PT ;\n /*2500*/ @P0 FADD.FTZ R8, R2, 1 ;\n /*2510*/ @P0 BRA `(.L_x_38) ;\n /*2520*/ FSETP.NEU.FTZ.AND P0, PT, |R2|, +INF , PT ;\n /*2530*/ @P0 FFMA R4, R2, 1.84467440737095516160e+19, RZ ;\n /*2540*/ @!P0 IMAD.MOV.U32 R8, RZ, RZ, R2 ;\n /*2550*/ @P0 MUFU.RSQ R5, R4 ;\n /*2560*/ @P0 FMUL.FTZ R7, R4, R5 ;\n /*2570*/ @P0 FMUL.FTZ R5, R5, 0.5 ;\n /*2580*/ @P0 FADD.FTZ R6, -R7, -RZ ;\n /*2590*/ @P0 FFMA R6, R7, R6, R4 ;\n /*25a0*/ @P0 FFMA R5, R6, R5, R7 ;\n /*25b0*/ @P0 FMUL.FTZ R8, R5, 2.3283064365386962891e-10 ;\n.L_x_38:\n /*25c0*/ MOV R4, R10 ;\n /*25d0*/ MOV R5, 0x0 ;\n /*25e0*/ RET.REL.NODEC R4 `(_Z5colorPhiiff) ;\n\n\n\n\n .weak $__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath\n .type $__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath,@function\n .size $__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath,(.L_x_53 - $__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath)\n$__internal_2_$__cuda_sm3x_div_rn_noftz_f32_slowpath:\n /*25f0*/ SHF.R.U32.HI R13, RZ, 0x17, R4 ;\n /*2600*/ BSSY B0, `(.L_x_39) ;\n /*2610*/ SHF.R.U32.HI R14, RZ, 0x17, R5 ;\n /*2620*/ LOP3.LUT R13, R13, 0xff, RZ, 0xc0, !PT ;\n /*2630*/ LOP3.LUT R18, R14, 0xff, RZ, 0xc0, !PT ;\n /*2640*/ IADD3 R16, R13, -0x1, RZ ;\n /*2650*/ IADD3 R15, R18, -0x1, RZ ;\n /*2660*/ ISETP.GT.U32.AND P0, PT, R16, 0xfd, PT ;\n /*2670*/ ISETP.GT.U32.OR P0, PT, R15, 0xfd, P0 ;\n /*2680*/ @!P0 IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*2690*/ @!P0 BRA `(.L_x_40) ;\n /*26a0*/ FSETP.GTU.FTZ.AND P0, PT, |R5|, +INF , PT ;\n /*26b0*/ FSETP.GTU.FTZ.AND P1, PT, |R4|, +INF , PT ;\n /*26c0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*26d0*/ @P0 BRA `(.L_x_41) ;\n /*26e0*/ LOP3.LUT P0, RZ, R4, 0x7fffffff, R5, 0xc8, !PT ;\n /*26f0*/ @!P0 BRA `(.L_x_42) ;\n /*2700*/ FSETP.NEU.FTZ.AND P3, PT, |R5|.reuse, +INF , PT ;\n /*2710*/ FSETP.NEU.FTZ.AND P1, PT, |R4|, +INF , PT ;\n /*2720*/ FSETP.NEU.FTZ.AND P0, PT, |R5|, +INF , PT ;\n /*2730*/ @!P1 BRA !P3, `(.L_x_42) ;\n /*2740*/ LOP3.LUT P3, RZ, R5, 0x7fffffff, RZ, 0xc0, !PT ;\n /*2750*/ PLOP3.LUT P1, PT, P1, P3, PT, 0x2a, 0x0 ;\n /*2760*/ @P1 BRA `(.L_x_43) ;\n /*2770*/ LOP3.LUT P1, RZ, R4, 0x7fffffff, RZ, 0xc0, !PT ;\n /*2780*/ PLOP3.LUT P0, PT, P0, P1, PT, 0x2a, 0x0 ;\n /*2790*/ @P0 BRA `(.L_x_44) ;\n /*27a0*/ ISETP.GE.AND P0, PT, R15, RZ, PT ;\n /*27b0*/ ISETP.GE.AND P1, PT, R16, RZ, PT ;\n /*27c0*/ @P0 MOV R14, RZ ;\n /*27d0*/ @!P0 FFMA R5, R5, 1.84467440737095516160e+19, RZ ;\n /*27e0*/ @!P0 MOV R14, 0xffffffc0 ;\n /*27f0*/ @!P1 FFMA R4, R4, 1.84467440737095516160e+19, RZ ;\n /*2800*/ @!P1 IADD3 R14, R14, 0x40, RZ ;\n.L_x_40:\n /*2810*/ LEA R15, R13, 0xc0800000, 0x17 ;\n /*2820*/ BSSY B1, `(.L_x_45) ;\n /*2830*/ IADD3 R18, R18, -0x7f, RZ ;\n /*2840*/ IMAD.IADD R15, R4, 0x1, -R15 ;\n /*2850*/ IMAD R4, R18.reuse, -0x800000, R5 ;\n /*2860*/ MUFU.RCP R16, R15 ;\n /*2870*/ FADD.FTZ R17, -R15, -RZ ;\n /*2880*/ IADD3 R15, R18, 0x7f, -R13 ;\n /*2890*/ IADD3 R15, R15, R14, RZ ;\n /*28a0*/ FFMA R19, R16, R17, 1 ;\n /*28b0*/ FFMA R5, R16, R19, R16 ;\n /*28c0*/ FFMA R16, R4, R5, RZ ;\n /*28d0*/ FFMA R19, R17, R16, R4 ;\n /*28e0*/ FFMA R16, R5, R19, R16 ;\n /*28f0*/ FFMA R17, R17, R16, R4 ;\n /*2900*/ FFMA R4, R5, R17, R16 ;\n /*2910*/ SHF.R.U32.HI R13, RZ, 0x17, R4 ;\n /*2920*/ LOP3.LUT R13, R13, 0xff, RZ, 0xc0, !PT ;\n /*2930*/ IADD3 R18, R13, R15, RZ ;\n /*2940*/ IADD3 R13, R18, -0x1, RZ ;\n /*2950*/ ISETP.GE.U32.AND P0, PT, R13, 0xfe, PT ;\n /*2960*/ @!P0 BRA `(.L_x_46) ;\n /*2970*/ ISETP.GT.AND P0, PT, R18, 0xfe, PT ;\n /*2980*/ @P0 BRA `(.L_x_47) ;\n /*2990*/ ISETP.GE.AND P0, PT, R18, 0x1, PT ;\n /*29a0*/ @P0 BRA `(.L_x_48) ;\n /*29b0*/ ISETP.GE.AND P0, PT, R18, -0x18, PT ;\n /*29c0*/ LOP3.LUT R4, R4, 0x80000000, RZ, 0xc0, !PT ;\n /*29d0*/ @!P0 BRA `(.L_x_48) ;\n /*29e0*/ FFMA.RZ R13, R5, R17.reuse, R16 ;\n /*29f0*/ IMAD.MOV R15, RZ, RZ, -R18 ;\n /*2a00*/ ISETP.NE.AND P3, PT, R18.reuse, RZ, PT ;\n /*2a10*/ ISETP.NE.AND P1, PT, R18.reuse, RZ, PT ;\n /*2a20*/ LOP3.LUT R14, R13, 0x7fffff, RZ, 0xc0, !PT ;\n /*2a30*/ FFMA.RP R13, R5.reuse, R17.reuse, R16.reuse ;\n /*2a40*/ FFMA.RM R16, R5, R17, R16 ;\n /*2a50*/ IADD3 R5, R18, 0x20, RZ ;\n /*2a60*/ LOP3.LUT R14, R14, 0x800000, RZ, 0xfc, !PT ;\n /*2a70*/ FSETP.NEU.FTZ.AND P0, PT, R13, R16, PT ;\n /*2a80*/ SHF.L.U32 R5, R14, R5, RZ ;\n /*2a90*/ SEL R13, R15, RZ, P3 ;\n /*2aa0*/ ISETP.NE.AND P1, PT, R5, RZ, P1 ;\n /*2ab0*/ SHF.R.U32.HI R13, RZ, R13, R14 ;\n /*2ac0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*2ad0*/ SHF.R.U32.HI R14, RZ, 0x1, R13 ;\n /*2ae0*/ SEL R5, RZ, 0x1, !P0 ;\n /*2af0*/ LOP3.LUT R16, R5, 0x1, R14, 0xf8, !PT ;\n /*2b00*/ LOP3.LUT R13, R16, R13, RZ, 0xc0, !PT ;\n /*2b10*/ IADD3 R13, R14, R13, RZ ;\n /*2b20*/ LOP3.LUT R4, R13, R4, RZ, 0xfc, !PT ;\n /*2b30*/ BRA `(.L_x_48) ;\n.L_x_47:\n /*2b40*/ LOP3.LUT R4, R4, 0x80000000, RZ, 0xc0, !PT ;\n /*2b50*/ LOP3.LUT R4, R4, 0x7f800000, RZ, 0xfc, !PT ;\n /*2b60*/ BRA `(.L_x_48) ;\n.L_x_46:\n /*2b70*/ LEA R4, R15, R4, 0x17 ;\n.L_x_48:\n /*2b80*/ BSYNC B1 ;\n.L_x_45:\n /*2b90*/ BRA `(.L_x_49) ;\n.L_x_44:\n /*2ba0*/ LOP3.LUT R4, R4, 0x80000000, R5, 0x48, !PT ;\n /*2bb0*/ LOP3.LUT R4, R4, 0x7f800000, RZ, 0xfc, !PT ;\n /*2bc0*/ BRA `(.L_x_49) ;\n.L_x_43:\n /*2bd0*/ LOP3.LUT R4, R4, 0x80000000, R5, 0x48, !PT ;\n /*2be0*/ BRA `(.L_x_49) ;\n.L_x_42:\n /*2bf0*/ MUFU.RSQ R4, -QNAN ;\n /*2c00*/ BRA `(.L_x_49) ;\n.L_x_41:\n /*2c10*/ FADD.FTZ R4, R5, R4 ;\n.L_x_49:\n /*2c20*/ BSYNC B0 ;\n.L_x_39:\n /*2c30*/ IMAD.MOV.U32 R13, RZ, RZ, R4 ;\n /*2c40*/ MOV R4, R11 ;\n /*2c50*/ MOV R5, 0x0 ;\n /*2c60*/ RET.REL.NODEC R4 `(_Z5colorPhiiff) ;\n.L_x_50:\n /*2c70*/ BRA `(.L_x_50);\n /*2c80*/ NOP;\n /*2c90*/ NOP;\n /*2ca0*/ NOP;\n /*2cb0*/ NOP;\n /*2cc0*/ NOP;\n /*2cd0*/ NOP;\n /*2ce0*/ NOP;\n /*2cf0*/ NOP;\n.L_x_53:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z5colorPhiiff ; -- Begin function _Z5colorPhiiff\n\t.globl\t_Z5colorPhiiff\n\t.p2align\t8\n\t.type\t_Z5colorPhiiff,@function\n_Z5colorPhiiff: ; @_Z5colorPhiiff\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s2, s[0:1], 0x24\n\ts_load_b32 s3, s[0:1], 0x8\n\tv_bfe_u32 v2, v0, 10, 10\n\tv_and_b32_e32 v3, 0x3ff, v0\n\ts_waitcnt lgkmcnt(0)\n\ts_lshr_b32 s4, s2, 16\n\ts_and_b32 s2, s2, 0xffff\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[0:1], null, s15, s4, v[2:3]\n\tv_mad_u64_u32 v[1:2], null, s14, s2, v[3:4]\n\ts_mov_b32 s2, exec_lo\n\tv_max_i32_e32 v2, v0, v1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_gt_i32_e64 s3, v2\n\ts_cbranch_execz .LBB0_16\n; %bb.1:\n\ts_load_b32 s4, s[0:1], 0xc\n\ts_waitcnt lgkmcnt(0)\n\tv_cmp_ne_u32_e32 vcc_lo, s4, v1\n\tv_cmp_ne_u32_e64 s2, s4, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s2, s2, vcc_lo\n\ts_and_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execz .LBB0_16\n; %bb.2:\n\tv_or_b32_e64 v2, 16, 4\n\tv_dual_mov_b32 v3, 0xff :: v_dual_mov_b32 v4, 0\n\ts_mov_b32 s2, 0\n.LBB0_3: ; =>This Inner Loop Header: Depth=1\n\ts_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)\n\tv_dual_mov_b32 v5, s2 :: v_dual_add_nc_u32 v6, 4, v2\n\ts_add_i32 s2, s2, 17\n\ts_clause 0x1\n\tscratch_store_b32 v2, v3, off offset:-4\n\tscratch_store_b32 v2, v5, off\n\tv_add_nc_u32_e32 v2, 12, v2\n\ts_cmpk_lg_i32 s2, 0xff\n\tscratch_store_b32 v6, v4, off\n\ts_cbranch_scc1 .LBB0_3\n; %bb.4:\n\tv_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v2, 0xff\n\ts_mov_b32 s2, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v4, 0xbc, v3\n.LBB0_5: ; =>This Inner Loop Header: Depth=1\n\ts_mul_hi_u32 s5, s2, 0xaaaaaaab\n\ts_addk_i32 s2, 0xff\n\ts_lshr_b32 s5, s5, 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_sub_i32 s5, 0xff, s5\n\ts_cmpk_lg_i32 s2, 0x5fa\n\tv_mov_b32_e32 v5, s5\n\ts_clause 0x1\n\tscratch_store_b32 v4, v5, off offset:-8\n\tscratch_store_b64 v4, v[2:3], off offset:-4\n\tv_add_nc_u32_e32 v4, 12, v4\n\ts_cbranch_scc1 .LBB0_5\n; %bb.6:\n\tv_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v2, 0\n\ts_mov_b32 s2, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_nc_u32_e32 v4, 0xfc, v3\n\tv_mov_b32_e32 v3, 0xff\n.LBB0_7: ; =>This Inner Loop Header: Depth=1\n\ts_lshr_b32 s5, s2, 2\n\ts_delay_alu instid0(VALU_DEP_2) | instid1(SALU_CYCLE_1)\n\tv_dual_mov_b32 v6, s5 :: v_dual_add_nc_u32 v5, 8, v4\n\tscratch_store_b64 v4, v[2:3], off\n\tv_add_nc_u32_e32 v4, 12, v4\n\ts_addk_i32 s2, 0xff\n\tscratch_store_b32 v5, v6, off\n\ts_cmpk_lg_i32 s2, 0x3fc\n\ts_cbranch_scc1 .LBB0_7\n; %bb.8:\n\tv_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v2, 0\n\tv_mov_b32_e32 v4, 0xff\n\ts_mov_b32 s2, 0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_nc_u32_e32 v3, 0x134, v3\n.LBB0_9: ; =>This Inner Loop Header: Depth=1\n\ts_mul_hi_u32 s5, s2, 0xba2e8ba3\n\ts_addk_i32 s2, 0xff\n\ts_lshr_b32 s5, s5, 3\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_sub_i32 s5, 0xff, s5\n\ts_cmpk_lg_i32 s2, 0xaf5\n\tv_mov_b32_e32 v5, s5\n\ts_clause 0x2\n\tscratch_store_b32 v3, v2, off offset:-8\n\tscratch_store_b32 v3, v5, off offset:-4\n\tscratch_store_b32 v3, v4, off\n\tv_add_nc_u32_e32 v3, 12, v3\n\ts_cbranch_scc1 .LBB0_9\n; %bb.10:\n\tv_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v2, 0\n\ts_mov_b32 s2, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_nc_u32_e32 v4, 0x1b8, v3\n\tv_mov_b32_e32 v3, 0xff\n.LBB0_11: ; =>This Inner Loop Header: Depth=1\n\ts_mul_hi_u32 s5, s2, 0x4ec4ec4f\n\ts_addk_i32 s2, 0xff\n\ts_lshr_b32 s5, s5, 2\n\ts_cmpk_lg_i32 s2, 0xcf3\n\tv_mov_b32_e32 v5, s5\n\ts_clause 0x1\n\tscratch_store_b32 v4, v5, off offset:-8\n\tscratch_store_b64 v4, v[2:3], off offset:-4\n\tv_add_nc_u32_e32 v4, 12, v4\n\ts_cbranch_scc1 .LBB0_11\n; %bb.12:\n\tv_dual_mov_b32 v3, 16 :: v_dual_mov_b32 v2, 0xff\n\ts_mov_b32 s2, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_dual_mov_b32 v3, 0 :: v_dual_add_nc_u32 v4, 0x254, v3\n.LBB0_13: ; =>This Inner Loop Header: Depth=1\n\ts_mul_hi_u32 s5, s2, 0xaaaaaaab\n\ts_addk_i32 s2, 0xff\n\ts_lshr_b32 s5, s5, 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_sub_i32 s5, 0xff, s5\n\ts_cmpk_lg_i32 s2, 0x5fa\n\tv_mov_b32_e32 v5, s5\n\ts_clause 0x1\n\tscratch_store_b64 v4, v[2:3], off offset:-8\n\tscratch_store_b32 v4, v5, off\n\tv_add_nc_u32_e32 v4, 12, v4\n\ts_cbranch_scc1 .LBB0_13\n; %bb.14:\n\tv_cvt_f32_i32_e32 v2, s4\n\tv_cvt_f32_i32_e32 v3, v1\n\ts_load_b64 s[4:5], s[0:1], 0x10\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_div_scale_f32 v4, null, v2, v2, v3\n\tv_div_scale_f32 v7, vcc_lo, v3, v2, v3\n\tv_rcp_f32_e32 v5, v4\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v6, -v4, v5, 1.0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v5, v6, v5\n\tv_mul_f32_e32 v6, v7, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v8, -v4, v6, v7\n\tv_fmac_f32_e32 v6, v8, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v4, -v4, v6, v7\n\tv_div_fmas_f32 v4, v4, v5, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)\n\tv_div_fixup_f32 v3, v4, v2, v3\n\tv_cvt_f32_i32_e32 v4, v0\n\ts_waitcnt lgkmcnt(0)\n\tv_fma_f32 v3, v3, s4, -s4\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_div_scale_f32 v6, null, v2, v2, v4\n\tv_div_scale_f32 v5, null, s5, s5, v3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_rcp_f32_e32 v8, v6\n\tv_div_scale_f32 v11, vcc_lo, v3, s5, v3\n\tv_rcp_f32_e32 v7, v5\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v10, -v6, v8, 1.0\n\tv_fma_f32 v9, -v5, v7, 1.0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_dual_fmac_f32 v8, v10, v8 :: v_dual_fmac_f32 v7, v9, v7\n\tv_div_scale_f32 v9, s2, v4, v2, v4\n\tv_mul_f32_e32 v10, v11, v7\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_f32_e32 v12, v9, v8\n\tv_fma_f32 v13, -v5, v10, v11\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fma_f32 v14, -v6, v12, v9\n\tv_fmac_f32_e32 v10, v13, v7\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fmac_f32_e32 v12, v14, v8\n\tv_fma_f32 v5, -v5, v10, v11\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fma_f32 v6, -v6, v12, v9\n\tv_div_fmas_f32 v5, v5, v7, v10\n\ts_mov_b32 vcc_lo, s2\n\ts_mov_b32 s2, 0x3b2d2a58\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_div_fmas_f32 v6, v6, v8, v12\n\tv_div_fixup_f32 v3, v5, s5, v3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_div_fixup_f32 v2, v6, v2, v4\n\tv_fma_f32 v2, v2, s4, -s4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_div_scale_f32 v4, null, s5, s5, v2\n\tv_div_scale_f32 v8, vcc_lo, v2, s5, v2\n\tv_rcp_f32_e32 v6, v4\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v7, -v4, v6, 1.0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v6, v7, v6\n\tv_mul_f32_e32 v7, v8, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v9, -v4, v7, v8\n\tv_fmac_f32_e32 v7, v9, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v4, -v4, v7, v8\n\tv_div_fmas_f32 v4, v4, v6, v7\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_div_fixup_f32 v2, v4, s5, v2\n\tv_max_f32_e64 v4, |v3|, |v2|\n\tv_min_f32_e64 v6, |v3|, |v2|\n\tv_cmp_gt_f32_e64 vcc_lo, |v2|, |v3|\n\tv_cmp_class_f32_e64 s4, v2, 0x204\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_3) | instid1(VALU_DEP_4)\n\tv_frexp_mant_f32_e32 v5, v4\n\tv_frexp_exp_i32_f32_e32 v4, v4\n\tv_frexp_exp_i32_f32_e32 v7, v6\n\tv_frexp_mant_f32_e32 v6, v6\n\tv_rcp_f32_e32 v5, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_sub_nc_u32_e32 v4, v7, v4\n\tv_mov_b32_e32 v7, 0x4016cbe4\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v5, v6, v5\n\tv_ldexp_f32 v4, v5, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v5, v4, v4\n\tv_fmaak_f32 v6, s2, v5, 0xbc7a590c\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmaak_f32 v6, v5, v6, 0x3d29fb3f\n\tv_fmaak_f32 v6, v5, v6, 0xbd97d4d7\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmaak_f32 v6, v5, v6, 0x3dd931b2\n\tv_fmaak_f32 v6, v5, v6, 0xbe1160e6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmaak_f32 v6, v5, v6, 0x3e4cb8bf\n\tv_fmaak_f32 v6, v5, v6, 0xbeaaaa62\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v5, v5, v6\n\tv_fmac_f32_e32 v4, v4, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_sub_f32_e32 v5, 0x3fc90fdb, v4\n\tv_cndmask_b32_e32 v4, v4, v5, vcc_lo\n\tv_xor_b32_e32 v5, 0x80000000, v3\n\tv_cmp_lt_f32_e32 vcc_lo, 0, v3\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_sub_f32_e32 v6, 0x40490fdb, v4\n\tv_cmp_gt_i32_e64 s2, 0, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cndmask_b32_e32 v4, v4, v6, vcc_lo\n\tv_cndmask_b32_e64 v5, 0, 0x40490fdb, s2\n\tv_cndmask_b32_e32 v6, 0x3f490fdb, v7, vcc_lo\n\tv_cmp_eq_f32_e32 vcc_lo, 0, v2\n\tv_cmp_class_f32_e64 s2, v3, 0x204\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cndmask_b32_e32 v4, v4, v5, vcc_lo\n\ts_and_b32 vcc_lo, s4, s2\n\tv_xor_b32_e32 v5, 0x80000000, v2\n\ts_load_b64 s[4:5], s[0:1], 0x0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_cndmask_b32_e32 v4, v4, v6, vcc_lo\n\tv_cmp_o_f32_e32 vcc_lo, v3, v2\n\tv_dual_mul_f32 v3, v3, v3 :: v_dual_cndmask_b32 v4, 0x7fc00000, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fmac_f32_e32 v3, v2, v2\n\tv_bfi_b32 v4, 0x7fffffff, v4, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_div_scale_f32 v5, null, 0x40490fdb, 0x40490fdb, v4\n\tv_div_scale_f32 v8, vcc_lo, v4, 0x40490fdb, v4\n\tv_rcp_f32_e32 v6, v5\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v7, -v5, v6, 1.0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v6, v7, v6\n\tv_mul_f32_e32 v7, v8, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v9, -v5, v7, v8\n\tv_fmac_f32_e32 v7, v9, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v5, -v5, v7, v8\n\tv_div_fmas_f32 v2, v5, v6, v7\n\tv_mul_f32_e32 v5, 0x4f800000, v3\n\tv_cmp_gt_f32_e32 vcc_lo, 0xf800000, v3\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_div_fixup_f32 v2, v2, 0x40490fdb, v4\n\tv_cndmask_b32_e32 v4, v3, v5, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v2, 1.0, v2\n\tv_sqrt_f32_e32 v3, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v5, 0.5, v2\n\tv_mul_f32_e32 v2, 0x42580000, v5\n\ts_waitcnt_depctr 0xfff\n\tv_add_nc_u32_e32 v6, -1, v3\n\tv_add_nc_u32_e32 v7, 1, v3\n\tv_cvt_i32_f32_e32 v8, v2\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_fma_f32 v2, -v6, v3, v4\n\tv_fma_f32 v9, -v7, v3, v4\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_add_nc_u32_e32 v10, 1, v8\n\tv_cmp_ge_f32_e64 s2, 0, v2\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cmp_lt_f32_e64 s0, 0, v9\n\tv_cndmask_b32_e64 v2, v3, v6, s2\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_i32 v6, v10, 0x94f2095\n\ts_mov_b32 s2, 16\n\tv_cndmask_b32_e64 v7, v2, v7, s0\n\tv_mad_u64_u32 v[2:3], null, v0, s3, v[1:2]\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_lshrrev_b32_e32 v1, 31, v6\n\tv_mul_f32_e32 v0, 0x37800000, v7\n\tv_ashrrev_i32_e32 v3, 1, v6\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_lshl_add_u32 v2, v2, 1, v2\n\tv_cndmask_b32_e32 v0, v7, v0, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_4)\n\tv_add_nc_u32_e32 v1, v3, v1\n\tv_cmp_class_f32_e64 vcc_lo, v4, 0x260\n\tv_ashrrev_i32_e32 v3, 31, v2\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)\n\tv_cndmask_b32_e32 v4, v0, v4, vcc_lo\n\tv_mul_lo_u32 v0, v1, 55\n\tv_cvt_f32_i32_e32 v1, v8\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v7, vcc_lo, v2, s4\n\tv_add_co_ci_u32_e32 v3, vcc_lo, s5, v3, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_3) | instid1(VALU_DEP_4)\n\tv_fma_f32 v5, v5, 0x42580000, -v1\n\tv_cmp_nge_f32_e64 s0, 1.0, v4\n\tv_sub_nc_u32_e32 v9, v10, v0\n\tv_mad_u64_u32 v[0:1], null, v8, 12, s[2:3]\n\tv_sub_f32_e32 v6, 1.0, v5\n\ts_delay_alu instid0(VALU_DEP_3)\n\tv_mad_u64_u32 v[1:2], null, v9, 12, s[2:3]\n\tv_add_co_u32 v2, vcc_lo, v7, 2\n\tv_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo\n\ts_mov_b32 s2, 0\n.LBB0_15: ; =>This Inner Loop Header: Depth=1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_4)\n\tv_add_nc_u32_e32 v7, s2, v0\n\tv_add_nc_u32_e32 v8, s2, v1\n\ts_add_i32 s2, s2, 4\n\ts_clause 0x1\n\tscratch_load_b32 v7, v7, off\n\tscratch_load_b32 v8, v8, off\n\ts_cmp_lg_u32 s2, 12\n\ts_waitcnt vmcnt(1)\n\tv_cvt_f32_i32_e32 v7, v7\n\ts_waitcnt vmcnt(0)\n\tv_cvt_f32_i32_e32 v8, v8\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_div_scale_f32 v9, null, 0x437f0000, 0x437f0000, v7\n\tv_div_scale_f32 v10, null, 0x437f0000, 0x437f0000, v8\n\tv_div_scale_f32 v11, vcc_lo, v7, 0x437f0000, v7\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_rcp_f32_e32 v12, v9\n\tv_rcp_f32_e32 v13, v10\n\tv_div_scale_f32 v14, s1, v8, 0x437f0000, v8\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v15, -v9, v12, 1.0\n\tv_fma_f32 v16, -v10, v13, 1.0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_fmac_f32 v12, v15, v12 :: v_dual_fmac_f32 v13, v16, v13\n\tv_dual_mul_f32 v15, v11, v12 :: v_dual_mul_f32 v16, v14, v13\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fma_f32 v17, -v9, v15, v11\n\tv_fma_f32 v18, -v10, v16, v14\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_fmac_f32 v15, v17, v12 :: v_dual_fmac_f32 v16, v18, v13\n\tv_fma_f32 v9, -v9, v15, v11\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fma_f32 v10, -v10, v16, v14\n\tv_div_fmas_f32 v9, v9, v12, v15\n\ts_mov_b32 vcc_lo, s1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_div_fmas_f32 v10, v10, v13, v16\n\tv_div_fixup_f32 v7, v9, 0x437f0000, v7\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_div_fixup_f32 v8, v10, 0x437f0000, v8\n\tv_mul_f32_e32 v8, v5, v8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v8, v6, v7\n\tv_sub_f32_e32 v7, 1.0, v8\n\tv_mul_f32_e32 v8, 0x3f400000, v8\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v7, -v4, v7, 1.0\n\tv_cndmask_b32_e64 v7, v7, v8, s0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v7, 0x437f0000, v7\n\tv_cvt_i32_f32_e32 v7, v7\n\tglobal_store_b8 v[2:3], v7, off\n\tv_add_co_u32 v2, vcc_lo, v2, -1\n\tv_add_co_ci_u32_e32 v3, vcc_lo, -1, v3, vcc_lo\n\ts_cbranch_scc1 .LBB0_15\n.LBB0_16:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z5colorPhiiff\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 688\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 14\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 1\n\t\t.amdhsa_next_free_vgpr 19\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z5colorPhiiff, .Lfunc_end0-_Z5colorPhiiff\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 2228\n; NumSgprs: 18\n; NumVgprs: 19\n; ScratchSize: 688\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 2\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 19\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 14\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .offset: 8\n .size: 4\n .value_kind: by_value\n - .offset: 12\n .size: 4\n .value_kind: by_value\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 20\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z5colorPhiiff\n .private_segment_fixed_size: 688\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z5colorPhiiff.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 19\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":78,"cells":{"id":{"kind":"string","value":"721d1b01453d118d12f058cf8c32eb6a71a58fda_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z6kerneliPfPViiii --------------------------\n .section .text._Z6kerneliPfPViiii,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=17\"\n .align 128\n\n\n\n\n .global _Z6kerneliPfPViiii\n .type _Z6kerneliPfPViiii,@function\n .size _Z6kerneliPfPViiii,(.L_x_18 - _Z6kerneliPfPViiii)\n .other _Z6kerneliPfPViiii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z6kerneliPfPViiii:\n.text._Z6kerneliPfPViiii:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R12, c[0x0][0x118] ;\n /*0020*/ MOV R13, c[0x0][0x11c] ;\n /*0030*/ MOV R2, 0x8 ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R4, R2 ;\n /*0060*/ MOV R8, R3 ;\n /*0070*/ MOV R4, R4 ;\n /*0080*/ MOV R8, R8 ;\n /*0090*/ MOV R2, 0x10 ;\n /*00a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00b0*/ MOV R9, R2 ;\n /*00c0*/ MOV R10, R3 ;\n /*00d0*/ MOV R9, R9 ;\n /*00e0*/ MOV R10, R10 ;\n /*00f0*/ MOV R0, 0x18 ;\n /*0100*/ LDC R0, c[0x0][R0+0x160] ;\n /*0110*/ MOV R0, R0 ;\n /*0120*/ MOV R2, 0x1c ;\n /*0130*/ LDC R2, c[0x0][R2+0x160] ;\n /*0140*/ MOV R2, R2 ;\n /*0150*/ MOV R3, 0x20 ;\n /*0160*/ LDC R3, c[0x0][R3+0x160] ;\n /*0170*/ MOV R3, R3 ;\n /*0180*/ MOV R9, R9 ;\n /*0190*/ MOV R10, R10 ;\n /*01a0*/ MOV R4, R4 ;\n /*01b0*/ MOV R8, R8 ;\n /*01c0*/ ISETP.LT.AND P0, PT, R0, 0x1, PT ;\n /*01d0*/ MOV R7, R0 ;\n /*01e0*/ MOV R5, R2 ;\n /*01f0*/ MOV R6, R3 ;\n /*0200*/ MOV R0, R9 ;\n /*0210*/ MOV R2, R10 ;\n /*0220*/ MOV R3, R4 ;\n /*0230*/ MOV R4, R8 ;\n /*0240*/ @P0 BRA `(.L_x_0) ;\n /*0250*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*0260*/ IADD3 R5, R7, -0x1, RZ ;\n /*0270*/ LOP3.LUT R8, R7, 0x3, RZ, 0xc0, !PT ;\n /*0280*/ MOV R9, R5 ;\n /*0290*/ MOV R5, R8 ;\n /*02a0*/ @P0 BRA `(.L_x_1) ;\n /*02b0*/ ISETP.LT.U32.AND P0, PT, R9, 0x3, PT ;\n /*02c0*/ MOV R8, RZ ;\n /*02d0*/ MOV R10, R8 ;\n /*02e0*/ @P0 BRA `(.L_x_2) ;\n /*02f0*/ IADD3 R7, R7, -R5, RZ ;\n /*0300*/ MOV R8, RZ ;\n /*0310*/ MOV R7, R7 ;\n /*0320*/ MOV R8, R8 ;\n.L_x_7:\n /*0330*/ I2FP.F32.S32 R9, R8 ;\n /*0340*/ MOV R10, R3 ;\n /*0350*/ MOV R11, R4 ;\n /*0360*/ MOV R10, R10 ;\n /*0370*/ MOV R11, R11 ;\n /*0380*/ R2UR UR4, R12 ;\n /*0390*/ R2UR UR5, R13 ;\n /*03a0*/ STG.E [R10.64], R9 ;\n /*03b0*/ F2I.TRUNC.NTZ R9, R9 ;\n /*03c0*/ MOV R10, R0 ;\n /*03d0*/ MOV R11, R2 ;\n /*03e0*/ MOV R10, R10 ;\n /*03f0*/ MOV R11, R11 ;\n /*0400*/ R2UR UR4, R12 ;\n /*0410*/ R2UR UR5, R13 ;\n /*0420*/ STG.E.STRONG.SYS [R10.64], R9 ;\n /*0430*/ MEMBAR.SC.SYS ;\n /*0440*/ ERRBAR ;\n /*0450*/ CCTL.IVALL ;\n /*0460*/ ISETP.EQ.AND P1, PT, R6, RZ, PT ;\n /*0470*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*0480*/ PLOP3.LUT P1, PT, P1, PT, PT, 0x80, 0x0 ;\n /*0490*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*04a0*/ @P1 BRA `(.L_x_3) ;\n /*04b0*/ MEMBAR.SC.CTA ;\n /*04c0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*04d0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n.L_x_3:\n /*04e0*/ IADD3 R9, R8, 0x1, RZ ;\n /*04f0*/ I2FP.F32.S32 R14, R9 ;\n /*0500*/ MOV R10, R3 ;\n /*0510*/ MOV R11, R4 ;\n /*0520*/ MOV R10, R10 ;\n /*0530*/ MOV R11, R11 ;\n /*0540*/ R2UR UR4, R12 ;\n /*0550*/ R2UR UR5, R13 ;\n /*0560*/ STG.E [R10.64], R14 ;\n /*0570*/ F2I.TRUNC.NTZ R14, R14 ;\n /*0580*/ MOV R10, R0 ;\n /*0590*/ MOV R11, R2 ;\n /*05a0*/ MOV R10, R10 ;\n /*05b0*/ MOV R11, R11 ;\n /*05c0*/ R2UR UR4, R12 ;\n /*05d0*/ R2UR UR5, R13 ;\n /*05e0*/ STG.E.STRONG.SYS [R10.64], R14 ;\n /*05f0*/ MEMBAR.SC.SYS ;\n /*0600*/ ERRBAR ;\n /*0610*/ CCTL.IVALL ;\n /*0620*/ MOV R9, R9 ;\n /*0630*/ @P0 BRA `(.L_x_4) ;\n /*0640*/ MEMBAR.SC.CTA ;\n.L_x_4:\n /*0650*/ IADD3 R9, R9, 0x1, RZ ;\n /*0660*/ I2FP.F32.S32 R14, R9 ;\n /*0670*/ MOV R10, R3 ;\n /*0680*/ MOV R11, R4 ;\n /*0690*/ MOV R10, R10 ;\n /*06a0*/ MOV R11, R11 ;\n /*06b0*/ R2UR UR4, R12 ;\n /*06c0*/ R2UR UR5, R13 ;\n /*06d0*/ STG.E [R10.64], R14 ;\n /*06e0*/ F2I.TRUNC.NTZ R14, R14 ;\n /*06f0*/ MOV R10, R0 ;\n /*0700*/ MOV R11, R2 ;\n /*0710*/ MOV R10, R10 ;\n /*0720*/ MOV R11, R11 ;\n /*0730*/ R2UR UR4, R12 ;\n /*0740*/ R2UR UR5, R13 ;\n /*0750*/ STG.E.STRONG.SYS [R10.64], R14 ;\n /*0760*/ MEMBAR.SC.SYS ;\n /*0770*/ ERRBAR ;\n /*0780*/ CCTL.IVALL ;\n /*0790*/ MOV R9, R9 ;\n /*07a0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*07b0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*07c0*/ @P1 BRA `(.L_x_5) ;\n /*07d0*/ MEMBAR.SC.CTA ;\n /*07e0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*07f0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n.L_x_5:\n /*0800*/ IADD3 R9, R9, 0x1, RZ ;\n /*0810*/ I2FP.F32.S32 R14, R9 ;\n /*0820*/ MOV R10, R3 ;\n /*0830*/ MOV R11, R4 ;\n /*0840*/ MOV R10, R10 ;\n /*0850*/ MOV R11, R11 ;\n /*0860*/ R2UR UR4, R12 ;\n /*0870*/ R2UR UR5, R13 ;\n /*0880*/ STG.E [R10.64], R14 ;\n /*0890*/ F2I.TRUNC.NTZ R14, R14 ;\n /*08a0*/ MOV R10, R0 ;\n /*08b0*/ MOV R11, R2 ;\n /*08c0*/ MOV R10, R10 ;\n /*08d0*/ MOV R11, R11 ;\n /*08e0*/ R2UR UR4, R12 ;\n /*08f0*/ R2UR UR5, R13 ;\n /*0900*/ STG.E.STRONG.SYS [R10.64], R14 ;\n /*0910*/ MEMBAR.SC.SYS ;\n /*0920*/ ERRBAR ;\n /*0930*/ CCTL.IVALL ;\n /*0940*/ MOV R9, R9 ;\n /*0950*/ @P0 BRA `(.L_x_6) ;\n /*0960*/ MEMBAR.SC.CTA ;\n.L_x_6:\n /*0970*/ IADD3 R8, R8, 0x4, RZ ;\n /*0980*/ IADD3 R7, R7, -0x4, RZ ;\n /*0990*/ ISETP.NE.AND P0, PT, R7, RZ, PT ;\n /*09a0*/ IADD3 R9, R9, 0x1, RZ ;\n /*09b0*/ MOV R10, R8 ;\n /*09c0*/ MOV R7, R7 ;\n /*09d0*/ MOV R8, R9 ;\n /*09e0*/ @P0 BRA `(.L_x_7) ;\n.L_x_2:\n /*09f0*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*0a00*/ @P0 BRA `(.L_x_0) ;\n.L_x_9:\n /*0a10*/ I2FP.F32.S32 R7, R10 ;\n /*0a20*/ MOV R8, R3 ;\n /*0a30*/ MOV R9, R4 ;\n /*0a40*/ MOV R8, R8 ;\n /*0a50*/ MOV R9, R9 ;\n /*0a60*/ R2UR UR4, R12 ;\n /*0a70*/ R2UR UR5, R13 ;\n /*0a80*/ STG.E [R8.64], R7 ;\n /*0a90*/ F2I.TRUNC.NTZ R7, R7 ;\n /*0aa0*/ MOV R8, R0 ;\n /*0ab0*/ MOV R9, R2 ;\n /*0ac0*/ MOV R8, R8 ;\n /*0ad0*/ MOV R9, R9 ;\n /*0ae0*/ R2UR UR4, R12 ;\n /*0af0*/ R2UR UR5, R13 ;\n /*0b00*/ STG.E.STRONG.SYS [R8.64], R7 ;\n /*0b10*/ MEMBAR.SC.SYS ;\n /*0b20*/ ERRBAR ;\n /*0b30*/ CCTL.IVALL ;\n /*0b40*/ ISETP.EQ.AND P0, PT, R6, RZ, PT ;\n /*0b50*/ @P0 BRA `(.L_x_8) ;\n /*0b60*/ MEMBAR.SC.CTA ;\n.L_x_8:\n /*0b70*/ IADD3 R10, R10, 0x1, RZ ;\n /*0b80*/ IADD3 R5, R5, -0x1, RZ ;\n /*0b90*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*0ba0*/ MOV R10, R10 ;\n /*0bb0*/ MOV R5, R5 ;\n /*0bc0*/ @P0 BRA `(.L_x_0) ;\n /*0bd0*/ BRA `(.L_x_9) ;\n.L_x_1:\n /*0be0*/ ISETP.EQ.AND P0, PT, R6, RZ, PT ;\n /*0bf0*/ @P0 BRA `(.L_x_10) ;\n /*0c00*/ ISETP.LT.U32.AND P0, PT, R9, 0x3, PT ;\n /*0c10*/ MOV R6, RZ ;\n /*0c20*/ MOV R6, R6 ;\n /*0c30*/ @P0 BRA `(.L_x_11) ;\n /*0c40*/ IADD3 R7, R7, -R5, RZ ;\n /*0c50*/ MOV R6, RZ ;\n /*0c60*/ MOV R7, R7 ;\n /*0c70*/ MOV R6, R6 ;\n.L_x_12:\n /*0c80*/ I2FP.F32.S32 R10, R6 ;\n /*0c90*/ MOV R8, R3 ;\n /*0ca0*/ MOV R9, R4 ;\n /*0cb0*/ MOV R8, R8 ;\n /*0cc0*/ MOV R9, R9 ;\n /*0cd0*/ R2UR UR4, R12 ;\n /*0ce0*/ R2UR UR5, R13 ;\n /*0cf0*/ STG.E [R8.64], R10 ;\n /*0d00*/ F2I.TRUNC.NTZ R10, R10 ;\n /*0d10*/ MOV R8, R0 ;\n /*0d20*/ MOV R9, R2 ;\n /*0d30*/ MOV R8, R8 ;\n /*0d40*/ MOV R9, R9 ;\n /*0d50*/ R2UR UR4, R12 ;\n /*0d60*/ R2UR UR5, R13 ;\n /*0d70*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*0d80*/ MEMBAR.SC.CTA ;\n /*0d90*/ IADD3 R8, R6, 0x1, RZ ;\n /*0da0*/ I2FP.F32.S32 R10, R8 ;\n /*0db0*/ MOV R8, R3 ;\n /*0dc0*/ MOV R9, R4 ;\n /*0dd0*/ MOV R8, R8 ;\n /*0de0*/ MOV R9, R9 ;\n /*0df0*/ R2UR UR4, R12 ;\n /*0e00*/ R2UR UR5, R13 ;\n /*0e10*/ STG.E [R8.64], R10 ;\n /*0e20*/ F2I.TRUNC.NTZ R10, R10 ;\n /*0e30*/ MOV R8, R0 ;\n /*0e40*/ MOV R9, R2 ;\n /*0e50*/ MOV R8, R8 ;\n /*0e60*/ MOV R9, R9 ;\n /*0e70*/ R2UR UR4, R12 ;\n /*0e80*/ R2UR UR5, R13 ;\n /*0e90*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*0ea0*/ MEMBAR.SC.CTA ;\n /*0eb0*/ IADD3 R8, R6, 0x2, RZ ;\n /*0ec0*/ I2FP.F32.S32 R10, R8 ;\n /*0ed0*/ MOV R8, R3 ;\n /*0ee0*/ MOV R9, R4 ;\n /*0ef0*/ MOV R8, R8 ;\n /*0f00*/ MOV R9, R9 ;\n /*0f10*/ R2UR UR4, R12 ;\n /*0f20*/ R2UR UR5, R13 ;\n /*0f30*/ STG.E [R8.64], R10 ;\n /*0f40*/ F2I.TRUNC.NTZ R10, R10 ;\n /*0f50*/ MOV R8, R0 ;\n /*0f60*/ MOV R9, R2 ;\n /*0f70*/ MOV R8, R8 ;\n /*0f80*/ MOV R9, R9 ;\n /*0f90*/ R2UR UR4, R12 ;\n /*0fa0*/ R2UR UR5, R13 ;\n /*0fb0*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*0fc0*/ MEMBAR.SC.CTA ;\n /*0fd0*/ IADD3 R8, R6, 0x3, RZ ;\n /*0fe0*/ I2FP.F32.S32 R10, R8 ;\n /*0ff0*/ MOV R8, R3 ;\n /*1000*/ MOV R9, R4 ;\n /*1010*/ MOV R8, R8 ;\n /*1020*/ MOV R9, R9 ;\n /*1030*/ R2UR UR4, R12 ;\n /*1040*/ R2UR UR5, R13 ;\n /*1050*/ STG.E [R8.64], R10 ;\n /*1060*/ F2I.TRUNC.NTZ R10, R10 ;\n /*1070*/ MOV R8, R0 ;\n /*1080*/ MOV R9, R2 ;\n /*1090*/ MOV R8, R8 ;\n /*10a0*/ MOV R9, R9 ;\n /*10b0*/ R2UR UR4, R12 ;\n /*10c0*/ R2UR UR5, R13 ;\n /*10d0*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*10e0*/ MEMBAR.SC.CTA ;\n /*10f0*/ IADD3 R6, R6, 0x4, RZ ;\n /*1100*/ IADD3 R7, R7, -0x4, RZ ;\n /*1110*/ ISETP.NE.AND P0, PT, R7, RZ, PT ;\n /*1120*/ MOV R6, R6 ;\n /*1130*/ MOV R7, R7 ;\n /*1140*/ @P0 BRA `(.L_x_12) ;\n.L_x_11:\n /*1150*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*1160*/ @P0 BRA `(.L_x_0) ;\n.L_x_13:\n /*1170*/ I2FP.F32.S32 R7, R6 ;\n /*1180*/ MOV R8, R3 ;\n /*1190*/ MOV R9, R4 ;\n /*11a0*/ MOV R8, R8 ;\n /*11b0*/ MOV R9, R9 ;\n /*11c0*/ R2UR UR4, R12 ;\n /*11d0*/ R2UR UR5, R13 ;\n /*11e0*/ STG.E [R8.64], R7 ;\n /*11f0*/ F2I.TRUNC.NTZ R7, R7 ;\n /*1200*/ MOV R8, R0 ;\n /*1210*/ MOV R9, R2 ;\n /*1220*/ MOV R8, R8 ;\n /*1230*/ MOV R9, R9 ;\n /*1240*/ R2UR UR4, R12 ;\n /*1250*/ R2UR UR5, R13 ;\n /*1260*/ STG.E.STRONG.SYS [R8.64], R7 ;\n /*1270*/ MEMBAR.SC.CTA ;\n /*1280*/ IADD3 R6, R6, 0x1, RZ ;\n /*1290*/ IADD3 R5, R5, -0x1, RZ ;\n /*12a0*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*12b0*/ MOV R6, R6 ;\n /*12c0*/ MOV R5, R5 ;\n /*12d0*/ @P0 BRA `(.L_x_0) ;\n /*12e0*/ BRA `(.L_x_13) ;\n.L_x_10:\n /*12f0*/ ISETP.LT.U32.AND P0, PT, R9, 0x3, PT ;\n /*1300*/ MOV R6, RZ ;\n /*1310*/ MOV R6, R6 ;\n /*1320*/ @P0 BRA `(.L_x_14) ;\n /*1330*/ IADD3 R7, R7, -R5, RZ ;\n /*1340*/ MOV R6, RZ ;\n /*1350*/ MOV R7, R7 ;\n /*1360*/ MOV R6, R6 ;\n.L_x_15:\n /*1370*/ I2FP.F32.S32 R8, R6 ;\n /*1380*/ F2I.TRUNC.NTZ R10, R8 ;\n /*1390*/ MOV R8, R0 ;\n /*13a0*/ MOV R9, R2 ;\n /*13b0*/ MOV R8, R8 ;\n /*13c0*/ MOV R9, R9 ;\n /*13d0*/ R2UR UR4, R12 ;\n /*13e0*/ R2UR UR5, R13 ;\n /*13f0*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*1400*/ IADD3 R8, R6, 0x1, RZ ;\n /*1410*/ I2FP.F32.S32 R8, R8 ;\n /*1420*/ F2I.TRUNC.NTZ R10, R8 ;\n /*1430*/ MOV R8, R0 ;\n /*1440*/ MOV R9, R2 ;\n /*1450*/ MOV R8, R8 ;\n /*1460*/ MOV R9, R9 ;\n /*1470*/ R2UR UR4, R12 ;\n /*1480*/ R2UR UR5, R13 ;\n /*1490*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*14a0*/ IADD3 R8, R6, 0x2, RZ ;\n /*14b0*/ I2FP.F32.S32 R8, R8 ;\n /*14c0*/ F2I.TRUNC.NTZ R10, R8 ;\n /*14d0*/ MOV R8, R0 ;\n /*14e0*/ MOV R9, R2 ;\n /*14f0*/ MOV R8, R8 ;\n /*1500*/ MOV R9, R9 ;\n /*1510*/ R2UR UR4, R12 ;\n /*1520*/ R2UR UR5, R13 ;\n /*1530*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*1540*/ IADD3 R8, R6, 0x3, RZ ;\n /*1550*/ I2FP.F32.S32 R10, R8 ;\n /*1560*/ MOV R8, R3 ;\n /*1570*/ MOV R9, R4 ;\n /*1580*/ MOV R8, R8 ;\n /*1590*/ MOV R9, R9 ;\n /*15a0*/ R2UR UR4, R12 ;\n /*15b0*/ R2UR UR5, R13 ;\n /*15c0*/ STG.E [R8.64], R10 ;\n /*15d0*/ F2I.TRUNC.NTZ R10, R10 ;\n /*15e0*/ MOV R8, R0 ;\n /*15f0*/ MOV R9, R2 ;\n /*1600*/ MOV R8, R8 ;\n /*1610*/ MOV R9, R9 ;\n /*1620*/ R2UR UR4, R12 ;\n /*1630*/ R2UR UR5, R13 ;\n /*1640*/ STG.E.STRONG.SYS [R8.64], R10 ;\n /*1650*/ IADD3 R6, R6, 0x4, RZ ;\n /*1660*/ IADD3 R7, R7, -0x4, RZ ;\n /*1670*/ ISETP.NE.AND P0, PT, R7, RZ, PT ;\n /*1680*/ MOV R6, R6 ;\n /*1690*/ MOV R7, R7 ;\n /*16a0*/ @P0 BRA `(.L_x_15) ;\n.L_x_14:\n /*16b0*/ ISETP.EQ.AND P0, PT, R5, RZ, PT ;\n /*16c0*/ @P0 BRA `(.L_x_0) ;\n.L_x_16:\n /*16d0*/ I2FP.F32.S32 R7, R6 ;\n /*16e0*/ MOV R8, R3 ;\n /*16f0*/ MOV R9, R4 ;\n /*1700*/ MOV R8, R8 ;\n /*1710*/ MOV R9, R9 ;\n /*1720*/ R2UR UR4, R12 ;\n /*1730*/ R2UR UR5, R13 ;\n /*1740*/ STG.E [R8.64], R7 ;\n /*1750*/ F2I.TRUNC.NTZ R7, R7 ;\n /*1760*/ MOV R8, R0 ;\n /*1770*/ MOV R9, R2 ;\n /*1780*/ MOV R8, R8 ;\n /*1790*/ MOV R9, R9 ;\n /*17a0*/ R2UR UR4, R12 ;\n /*17b0*/ R2UR UR5, R13 ;\n /*17c0*/ STG.E.STRONG.SYS [R8.64], R7 ;\n /*17d0*/ IADD3 R6, R6, 0x1, RZ ;\n /*17e0*/ IADD3 R5, R5, -0x1, RZ ;\n /*17f0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ;\n /*1800*/ MOV R6, R6 ;\n /*1810*/ MOV R5, R5 ;\n /*1820*/ @P0 BRA `(.L_x_16) ;\n.L_x_0:\n /*1830*/ EXIT ;\n.L_x_17:\n /*1840*/ BRA `(.L_x_17);\n /*1850*/ NOP;\n /*1860*/ NOP;\n /*1870*/ NOP;\n /*1880*/ NOP;\n /*1890*/ NOP;\n /*18a0*/ NOP;\n /*18b0*/ NOP;\n /*18c0*/ NOP;\n /*18d0*/ NOP;\n /*18e0*/ NOP;\n /*18f0*/ NOP;\n.L_x_18:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z6kerneliPfPViiii ; -- Begin function _Z6kerneliPfPViiii\n\t.globl\t_Z6kerneliPfPViiii\n\t.p2align\t8\n\t.type\t_Z6kerneliPfPViiii,@function\n_Z6kerneliPfPViiii: ; @_Z6kerneliPfPViiii\n; %bb.0:\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s2, 1\n\ts_cbranch_scc1 .LBB0_7\n; %bb.1:\n\ts_clause 0x1\n\ts_load_b64 s[8:9], s[0:1], 0x1c\n\ts_load_b128 s[4:7], s[0:1], 0x8\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s3, 0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lg_u32 s8, 0\n\tv_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7\n\ts_cselect_b32 s0, -1, 0\n\ts_cmp_lg_u32 s9, 0\n\tv_cndmask_b32_e64 v3, 0, 1, s0\n\ts_cselect_b32 s0, -1, 0\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cndmask_b32_e64 v4, 0, 1, s0\n\tv_cmp_ne_u32_e64 s0, 1, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_cmp_ne_u32_e64 s1, 1, v4\n\ts_branch .LBB0_3\n.LBB0_2: ; in Loop: Header=BB0_3 Depth=1\n\ts_add_i32 s3, s3, 1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_cmp_lg_u32 s2, s3\n\ts_cbranch_scc0 .LBB0_7\n.LBB0_3: ; =>This Inner Loop Header: Depth=1\n\tv_cvt_f32_i32_e32 v3, s3\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)\n\ts_and_b32 vcc_lo, exec_lo, s0\n\tv_cvt_i32_f32_e32 v4, v3\n\tglobal_store_b32 v2, v3, s[4:5]\n\tflat_store_b32 v[0:1], v4 dlc\n\ts_waitcnt_vscnt null, 0x0\n\ts_cbranch_vccnz .LBB0_5\n; %bb.4: ; in Loop: Header=BB0_3 Depth=1\n\ts_waitcnt lgkmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n.LBB0_5: ; in Loop: Header=BB0_3 Depth=1\n\ts_and_b32 vcc_lo, exec_lo, s1\n\ts_cbranch_vccnz .LBB0_2\n; %bb.6: ; in Loop: Header=BB0_3 Depth=1\n\ts_waitcnt lgkmcnt(0)\n\tbuffer_gl0_inv\n\ts_branch .LBB0_2\n.LBB0_7:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z6kerneliPfPViiii\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 36\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 5\n\t\t.amdhsa_next_free_sgpr 10\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z6kerneliPfPViiii, .Lfunc_end0-_Z6kerneliPfPViiii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 224\n; NumSgprs: 12\n; NumVgprs: 5\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 1\n; VGPRBlocks: 0\n; NumSGPRsForWavesPerEU: 12\n; NumVGPRsForWavesPerEU: 5\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .offset: 0\n .size: 4\n .value_kind: by_value\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 28\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: by_value\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 36\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z6kerneliPfPViiii\n .private_segment_fixed_size: 0\n .sgpr_count: 12\n .sgpr_spill_count: 0\n .symbol: _Z6kerneliPfPViiii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 5\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":79,"cells":{"id":{"kind":"string","value":"42226547d062925ffadc2895a91f018a0b81bab3_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z32d_do_permutation_generic_inversePiS_i --------------------------\n .section .text._Z32d_do_permutation_generic_inversePiS_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=22\"\n .align 128\n\n\n\n\n .global _Z32d_do_permutation_generic_inversePiS_i\n .type _Z32d_do_permutation_generic_inversePiS_i,@function\n .size _Z32d_do_permutation_generic_inversePiS_i,(.L_x_33 - _Z32d_do_permutation_generic_inversePiS_i)\n .other _Z32d_do_permutation_generic_inversePiS_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z32d_do_permutation_generic_inversePiS_i:\n.text._Z32d_do_permutation_generic_inversePiS_i:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2UR UR4, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ ULDC UR5, c[0x0][0x0] ;\n /*0040*/ UIMAD UR4, UR4, UR5, URZ ;\n /*0050*/ IADD3 R0, R3, UR4, RZ ;\n /*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ;\n /*0070*/ @P0 EXIT ;\n /*0080*/ LOP3.LUT R2, RZ, UR4, RZ, 0x33, !PT ;\n /*0090*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*00a0*/ BSSY B0, `(.L_x_0) ;\n /*00b0*/ IADD3 R4, -R3, c[0x0][0x170], R2 ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R4.reuse, 0x5fffa00, PT ;\n /*00d0*/ IMAD.WIDE.U32 R2, R4, -0x7fff7fff, RZ ;\n /*00e0*/ LEA.HI R2, R3, 0x1, RZ, 0x8 ;\n /*00f0*/ LOP3.LUT P1, R5, R2, 0x3, RZ, 0xc0, !PT ;\n /*0100*/ @!P1 BRA `(.L_x_1) ;\n /*0110*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*0120*/ IMAD.MOV.U32 R6, RZ, RZ, R5 ;\n /*0130*/ IMAD.WIDE R2, R0, R7, c[0x0][0x168] ;\n /*0140*/ IMAD.MOV.U32 R4, RZ, RZ, R2 ;\n /*0150*/ IMAD.MOV.U32 R5, RZ, RZ, R3 ;\n.L_x_2:\n /*0160*/ LDG.E R2, [R4.64] ;\n /*0170*/ IADD3 R6, R6, -0x1, RZ ;\n /*0180*/ ISETP.NE.AND P1, PT, R6, RZ, PT ;\n /*0190*/ IADD3 R4, P2, R4, 0x7fff800, RZ ;\n /*01a0*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*01b0*/ IMAD.WIDE R2, R2, R7, c[0x0][0x160] ;\n /*01c0*/ STG.E [R2.64], R0 ;\n /*01d0*/ IADD3 R0, R0, 0x1fffe00, RZ ;\n /*01e0*/ @P1 BRA `(.L_x_2) ;\n.L_x_1:\n /*01f0*/ BSYNC B0 ;\n.L_x_0:\n /*0200*/ @!P0 EXIT ;\n /*0210*/ IMAD.MOV.U32 R17, RZ, RZ, 0x4 ;\n /*0220*/ IMAD.WIDE R2, R0, R17, c[0x0][0x168] ;\n /*0230*/ IADD3 R8, P0, R2, 0xffff000, RZ ;\n /*0240*/ IMAD.X R9, RZ, RZ, R3, P0 ;\n.L_x_3:\n /*0250*/ IADD3 R6, P0, R8, -0x10000000, RZ ;\n /*0260*/ IADD3.X R7, R9, -0x1, RZ, P0, !PT ;\n /*0270*/ LDG.E R2, [R6.64+0x1000] ;\n /*0280*/ IADD3 R10, P0, R8, -0x8000000, RZ ;\n /*0290*/ IADD3.X R11, R9, -0x1, RZ, P0, !PT ;\n /*02a0*/ IMAD.WIDE R2, R2, R17, c[0x0][0x160] ;\n /*02b0*/ STG.E [R2.64], R0 ;\n /*02c0*/ LDG.E R4, [R10.64+0x800] ;\n /*02d0*/ IADD3 R19, R0, 0x1fffe00, RZ ;\n /*02e0*/ IMAD.WIDE R4, R4, R17, c[0x0][0x160] ;\n /*02f0*/ STG.E [R4.64], R19 ;\n /*0300*/ LDG.E R14, [R8.64] ;\n /*0310*/ IADD3 R12, P0, R8, 0x8000000, RZ ;\n /*0320*/ IADD3 R15, R0, 0x3fffc00, RZ ;\n /*0330*/ IMAD.X R13, RZ, RZ, R9, P0 ;\n /*0340*/ IMAD.WIDE R6, R14, R17, c[0x0][0x160] ;\n /*0350*/ STG.E [R6.64], R15 ;\n /*0360*/ LDG.E R2, [R12.64+-0x800] ;\n /*0370*/ IADD3 R11, R0.reuse, 0x5fffa00, RZ ;\n /*0380*/ IADD3 R0, R0, 0x7fff800, RZ ;\n /*0390*/ IADD3 R8, P1, R8, 0x1fffe000, RZ ;\n /*03a0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ;\n /*03b0*/ IMAD.X R9, RZ, RZ, R9, P1 ;\n /*03c0*/ IMAD.WIDE R2, R2, R17, c[0x0][0x160] ;\n /*03d0*/ STG.E [R2.64], R11 ;\n /*03e0*/ @!P0 BRA `(.L_x_3) ;\n /*03f0*/ EXIT ;\n.L_x_4:\n /*0400*/ BRA `(.L_x_4);\n /*0410*/ NOP;\n /*0420*/ NOP;\n /*0430*/ NOP;\n /*0440*/ NOP;\n /*0450*/ NOP;\n /*0460*/ NOP;\n /*0470*/ NOP;\n /*0480*/ NOP;\n /*0490*/ NOP;\n /*04a0*/ NOP;\n /*04b0*/ NOP;\n /*04c0*/ NOP;\n /*04d0*/ NOP;\n /*04e0*/ NOP;\n /*04f0*/ NOP;\n.L_x_33:\n\n\n//--------------------- .text._Z27d_do_permutation_generic_f2PfS_Pii --------------------------\n .section .text._Z27d_do_permutation_generic_f2PfS_Pii,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=28\"\n .align 128\n\n\n\n\n .global _Z27d_do_permutation_generic_f2PfS_Pii\n .type _Z27d_do_permutation_generic_f2PfS_Pii,@function\n .size _Z27d_do_permutation_generic_f2PfS_Pii,(.L_x_34 - _Z27d_do_permutation_generic_f2PfS_Pii)\n .other _Z27d_do_permutation_generic_f2PfS_Pii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z27d_do_permutation_generic_f2PfS_Pii:\n.text._Z27d_do_permutation_generic_f2PfS_Pii:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2UR UR4, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ ULDC UR5, c[0x0][0x0] ;\n /*0040*/ UIMAD UR4, UR4, UR5, URZ ;\n /*0050*/ IADD3 R7, R3, UR4, RZ ;\n /*0060*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x178], PT ;\n /*0070*/ @P0 EXIT ;\n /*0080*/ LOP3.LUT R0, RZ, UR4, RZ, 0x33, !PT ;\n /*0090*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*00a0*/ BSSY B0, `(.L_x_5) ;\n /*00b0*/ IADD3 R0, -R3, c[0x0][0x178], R0 ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R0.reuse, 0x5fffa00, PT ;\n /*00d0*/ IMAD.WIDE.U32 R2, R0, -0x7fff7fff, RZ ;\n /*00e0*/ LEA.HI R2, R3, 0x1, RZ, 0x8 ;\n /*00f0*/ LOP3.LUT P1, R6, R2, 0x3, RZ, 0xc0, !PT ;\n /*0100*/ @!P1 BRA `(.L_x_6) ;\n /*0110*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ;\n /*0120*/ IMAD.WIDE R2, R7, R8, c[0x0][0x168] ;\n /*0130*/ IMAD.WIDE R4, R7, R8, c[0x0][0x170] ;\n /*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ;\n /*0150*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ;\n.L_x_7:\n /*0160*/ LDG.E R2, [R4.64] ;\n /*0170*/ IMAD.WIDE R2, R2, R8, c[0x0][0x160] ;\n /*0180*/ LDG.E R9, [R2.64] ;\n /*0190*/ IADD3 R6, R6, -0x1, RZ ;\n /*01a0*/ IADD3 R4, P3, R4, 0x7fff800, RZ ;\n /*01b0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ;\n /*01c0*/ IADD3 R7, R7, 0x1fffe00, RZ ;\n /*01d0*/ IMAD.X R5, RZ, RZ, R5, P3 ;\n /*01e0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ;\n /*01f0*/ IADD3 R0, P2, R0, 0x7fff800, RZ ;\n /*0200*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ;\n /*0210*/ IMAD.X R11, RZ, RZ, R11, P2 ;\n /*0220*/ STG.E [R2.64], R9 ;\n /*0230*/ @P1 BRA `(.L_x_7) ;\n.L_x_6:\n /*0240*/ BSYNC B0 ;\n.L_x_5:\n /*0250*/ @!P0 EXIT ;\n /*0260*/ IADD3 R5, -R7, c[0x0][0x178], RZ ;\n /*0270*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ;\n /*0280*/ BSSY B0, `(.L_x_8) ;\n /*0290*/ ISETP.GT.AND P1, PT, R5, 0x17ffe800, PT ;\n /*02a0*/ IMAD.WIDE R2, R7, R0, c[0x2][0x0] ;\n /*02b0*/ IADD3 R4, P0, R2.reuse, c[0x0][0x170], RZ ;\n /*02c0*/ IADD3 R2, P2, R2, c[0x0][0x168], RZ ;\n /*02d0*/ IADD3.X R5, R3.reuse, c[0x0][0x174], RZ, P0, !PT ;\n /*02e0*/ IADD3.X R3, R3, c[0x0][0x16c], RZ, P2, !PT ;\n /*02f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*0300*/ @!P1 BRA `(.L_x_9) ;\n /*0310*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x178] ;\n /*0320*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*0330*/ IADD3 R6, R6, -0x17ffe800, RZ ;\n.L_x_10:\n /*0340*/ IADD3 R12, P1, R4, -0x10000000, RZ ;\n /*0350*/ IADD3.X R13, R5, -0x1, RZ, P1, !PT ;\n /*0360*/ LDG.E R9, [R12.64+0x1000] ;\n /*0370*/ IADD3 R14, P1, R2, -0x10000000, RZ ;\n /*0380*/ IADD3 R16, P2, R4, -0x8000000, RZ ;\n /*0390*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*03a0*/ LDG.E R21, [R8.64] ;\n /*03b0*/ IADD3.X R15, R3, -0x1, RZ, P1, !PT ;\n /*03c0*/ IADD3.X R17, R5, -0x1, RZ, P2, !PT ;\n /*03d0*/ STG.E [R14.64+0x1000], R21 ;\n /*03e0*/ LDG.E R11, [R16.64+0x800] ;\n /*03f0*/ IADD3 R12, P1, R2, -0x8000000, RZ ;\n /*0400*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0410*/ LDG.E R23, [R10.64] ;\n /*0420*/ IADD3.X R13, R3, -0x1, RZ, P1, !PT ;\n /*0430*/ STG.E [R12.64+0x800], R23 ;\n /*0440*/ LDG.E R9, [R4.64] ;\n /*0450*/ IADD3 R18, P1, R4, 0x8000000, RZ ;\n /*0460*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0470*/ LDG.E R25, [R8.64] ;\n /*0480*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0490*/ STG.E [R2.64], R25 ;\n /*04a0*/ LDG.E R19, [R18.64+-0x800] ;\n /*04b0*/ IADD3 R14, P1, R2, 0x8000000, RZ ;\n /*04c0*/ IADD3 R12, P2, R4, 0x10000000, RZ ;\n /*04d0*/ IMAD.WIDE R10, R19, R0, c[0x0][0x160] ;\n /*04e0*/ LDG.E R21, [R10.64] ;\n /*04f0*/ IMAD.X R15, RZ, RZ, R3, P1 ;\n /*0500*/ IMAD.X R13, RZ, RZ, R5, P2 ;\n /*0510*/ STG.E [R14.64+-0x800], R21 ;\n /*0520*/ LDG.E R9, [R12.64+-0x1000] ;\n /*0530*/ IADD3 R16, P1, R2, 0x10000000, RZ ;\n /*0540*/ IADD3 R18, P2, R4, 0x18000000, RZ ;\n /*0550*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0560*/ LDG.E R23, [R8.64] ;\n /*0570*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0580*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0590*/ STG.E [R16.64+-0x1000], R23 ;\n /*05a0*/ LDG.E R11, [R18.64+-0x1800] ;\n /*05b0*/ IADD3 R12, P1, R2, 0x18000000, RZ ;\n /*05c0*/ IADD3 R14, P2, R4, 0x20000000, RZ ;\n /*05d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*05e0*/ LDG.E R21, [R10.64] ;\n /*05f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0600*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0610*/ STG.E [R12.64+-0x1800], R21 ;\n /*0620*/ LDG.E R9, [R14.64+-0x2000] ;\n /*0630*/ IADD3 R16, P1, R2, 0x20000000, RZ ;\n /*0640*/ IADD3 R18, P2, R4, 0x28000000, RZ ;\n /*0650*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0660*/ LDG.E R23, [R8.64] ;\n /*0670*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0680*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0690*/ STG.E [R16.64+-0x2000], R23 ;\n /*06a0*/ LDG.E R11, [R18.64+-0x2800] ;\n /*06b0*/ IADD3 R12, P1, R2, 0x28000000, RZ ;\n /*06c0*/ IADD3 R14, P2, R4, 0x30000000, RZ ;\n /*06d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*06e0*/ LDG.E R21, [R10.64] ;\n /*06f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0700*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0710*/ STG.E [R12.64+-0x2800], R21 ;\n /*0720*/ LDG.E R9, [R14.64+-0x3000] ;\n /*0730*/ IADD3 R16, P1, R2, 0x30000000, RZ ;\n /*0740*/ IADD3 R18, P2, R4, 0x38000000, RZ ;\n /*0750*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0760*/ LDG.E R23, [R8.64] ;\n /*0770*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0780*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0790*/ STG.E [R16.64+-0x3000], R23 ;\n /*07a0*/ LDG.E R11, [R18.64+-0x3800] ;\n /*07b0*/ IADD3 R12, P1, R2, 0x38000000, RZ ;\n /*07c0*/ IADD3 R14, P2, R4, 0x40000000, RZ ;\n /*07d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*07e0*/ LDG.E R21, [R10.64] ;\n /*07f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0800*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0810*/ STG.E [R12.64+-0x3800], R21 ;\n /*0820*/ LDG.E R9, [R14.64+-0x4000] ;\n /*0830*/ IADD3 R16, P1, R2, 0x40000000, RZ ;\n /*0840*/ IADD3 R18, P2, R4, 0x48000000, RZ ;\n /*0850*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0860*/ LDG.E R23, [R8.64] ;\n /*0870*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0880*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0890*/ STG.E [R16.64+-0x4000], R23 ;\n /*08a0*/ LDG.E R11, [R18.64+-0x4800] ;\n /*08b0*/ IADD3 R12, P1, R2, 0x48000000, RZ ;\n /*08c0*/ IADD3 R14, P2, R4, 0x50000000, RZ ;\n /*08d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*08e0*/ LDG.E R21, [R10.64] ;\n /*08f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0900*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0910*/ STG.E [R12.64+-0x4800], R21 ;\n /*0920*/ LDG.E R9, [R14.64+-0x5000] ;\n /*0930*/ IADD3 R16, P1, R2, 0x50000000, RZ ;\n /*0940*/ IADD3 R18, P2, R4, 0x58000000, RZ ;\n /*0950*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0960*/ LDG.E R23, [R8.64] ;\n /*0970*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0980*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0990*/ STG.E [R16.64+-0x5000], R23 ;\n /*09a0*/ LDG.E R11, [R18.64+-0x5800] ;\n /*09b0*/ IADD3 R12, P1, R2, 0x58000000, RZ ;\n /*09c0*/ IADD3 R14, P2, R4, 0x60000000, RZ ;\n /*09d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*09e0*/ LDG.E R21, [R10.64] ;\n /*09f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0a00*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0a10*/ STG.E [R12.64+-0x5800], R21 ;\n /*0a20*/ LDG.E R9, [R14.64+-0x6000] ;\n /*0a30*/ IADD3 R16, P1, R2, 0x60000000, RZ ;\n /*0a40*/ IADD3 R18, P2, R4, 0x68000000, RZ ;\n /*0a50*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0a60*/ LDG.E R9, [R8.64] ;\n /*0a70*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0a80*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0a90*/ STG.E [R16.64+-0x6000], R9 ;\n /*0aa0*/ LDG.E R11, [R18.64+-0x6800] ;\n /*0ab0*/ IADD3 R12, P1, R2, 0x68000000, RZ ;\n /*0ac0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0ad0*/ LDG.E R11, [R10.64] ;\n /*0ae0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0af0*/ IADD3 R7, R7, 0x1fffe000, RZ ;\n /*0b00*/ IADD3 R4, P2, R4, 0x7fff8000, RZ ;\n /*0b10*/ ISETP.GE.AND P1, PT, R7, R6, PT ;\n /*0b20*/ IADD3 R2, P3, R2, 0x7fff8000, RZ ;\n /*0b30*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*0b40*/ IMAD.X R3, RZ, RZ, R3, P3 ;\n /*0b50*/ STG.E [R12.64+-0x6800], R11 ;\n /*0b60*/ @!P1 BRA `(.L_x_10) ;\n.L_x_9:\n /*0b70*/ BSYNC B0 ;\n.L_x_8:\n /*0b80*/ IADD3 R6, -R7, c[0x0][0x178], RZ ;\n /*0b90*/ BSSY B0, `(.L_x_11) ;\n /*0ba0*/ ISETP.GT.AND P1, PT, R6, 0x7fff800, PT ;\n /*0bb0*/ @!P1 BRA `(.L_x_12) ;\n /*0bc0*/ IADD3 R12, P0, R4, -0x10000000, RZ ;\n /*0bd0*/ IADD3.X R13, R5, -0x1, RZ, P0, !PT ;\n /*0be0*/ LDG.E R9, [R12.64+0x1000] ;\n /*0bf0*/ IADD3 R14, P0, R2, -0x10000000, RZ ;\n /*0c00*/ IADD3 R16, P1, R4, -0x8000000, RZ ;\n /*0c10*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0c20*/ LDG.E R21, [R8.64] ;\n /*0c30*/ IADD3.X R15, R3, -0x1, RZ, P0, !PT ;\n /*0c40*/ IADD3.X R17, R5, -0x1, RZ, P1, !PT ;\n /*0c50*/ STG.E [R14.64+0x1000], R21 ;\n /*0c60*/ LDG.E R11, [R16.64+0x800] ;\n /*0c70*/ IADD3 R12, P0, R2, -0x8000000, RZ ;\n /*0c80*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0c90*/ LDG.E R23, [R10.64] ;\n /*0ca0*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*0cb0*/ STG.E [R12.64+0x800], R23 ;\n /*0cc0*/ LDG.E R9, [R4.64] ;\n /*0cd0*/ IADD3 R18, P0, R4, 0x8000000, RZ ;\n /*0ce0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0cf0*/ LDG.E R25, [R8.64] ;\n /*0d00*/ IMAD.X R19, RZ, RZ, R5, P0 ;\n /*0d10*/ STG.E [R2.64], R25 ;\n /*0d20*/ LDG.E R19, [R18.64+-0x800] ;\n /*0d30*/ IADD3 R14, P0, R2, 0x8000000, RZ ;\n /*0d40*/ IADD3 R12, P1, R4, 0x10000000, RZ ;\n /*0d50*/ IMAD.WIDE R10, R19, R0, c[0x0][0x160] ;\n /*0d60*/ LDG.E R21, [R10.64] ;\n /*0d70*/ IMAD.X R15, RZ, RZ, R3, P0 ;\n /*0d80*/ IMAD.X R13, RZ, RZ, R5, P1 ;\n /*0d90*/ STG.E [R14.64+-0x800], R21 ;\n /*0da0*/ LDG.E R9, [R12.64+-0x1000] ;\n /*0db0*/ IADD3 R16, P0, R2, 0x10000000, RZ ;\n /*0dc0*/ IADD3 R18, P1, R4, 0x18000000, RZ ;\n /*0dd0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0de0*/ LDG.E R23, [R8.64] ;\n /*0df0*/ IMAD.X R17, RZ, RZ, R3, P0 ;\n /*0e00*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0e10*/ STG.E [R16.64+-0x1000], R23 ;\n /*0e20*/ LDG.E R11, [R18.64+-0x1800] ;\n /*0e30*/ IADD3 R12, P0, R2, 0x18000000, RZ ;\n /*0e40*/ IADD3 R14, P1, R4, 0x20000000, RZ ;\n /*0e50*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0e60*/ LDG.E R21, [R10.64] ;\n /*0e70*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*0e80*/ IMAD.X R15, RZ, RZ, R5, P1 ;\n /*0e90*/ STG.E [R12.64+-0x1800], R21 ;\n /*0ea0*/ LDG.E R9, [R14.64+-0x2000] ;\n /*0eb0*/ IADD3 R16, P0, R2, 0x20000000, RZ ;\n /*0ec0*/ IADD3 R18, P1, R4, 0x28000000, RZ ;\n /*0ed0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0ee0*/ LDG.E R9, [R8.64] ;\n /*0ef0*/ IMAD.X R17, RZ, RZ, R3, P0 ;\n /*0f00*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0f10*/ STG.E [R16.64+-0x2000], R9 ;\n /*0f20*/ LDG.E R11, [R18.64+-0x2800] ;\n /*0f30*/ IADD3 R12, P0, R2, 0x28000000, RZ ;\n /*0f40*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0f50*/ LDG.E R11, [R10.64] ;\n /*0f60*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*0f70*/ IADD3 R4, P1, R4, 0x3fffc000, RZ ;\n /*0f80*/ IADD3 R2, P2, R2, 0x3fffc000, RZ ;\n /*0f90*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*0fa0*/ IMAD.X R5, RZ, RZ, R5, P1 ;\n /*0fb0*/ IADD3 R7, R7, 0xffff000, RZ ;\n /*0fc0*/ IMAD.X R3, RZ, RZ, R3, P2 ;\n /*0fd0*/ STG.E [R12.64+-0x2800], R11 ;\n.L_x_12:\n /*0fe0*/ BSYNC B0 ;\n.L_x_11:\n /*0ff0*/ ISETP.LT.OR P0, PT, R7, c[0x0][0x178], P0 ;\n /*1000*/ @!P0 EXIT ;\n /*1010*/ IADD3 R10, P0, R4, -0x10000000, RZ ;\n /*1020*/ IADD3.X R11, R5, -0x1, RZ, P0, !PT ;\n /*1030*/ LDG.E R7, [R10.64+0x1000] ;\n /*1040*/ IADD3 R12, P0, R2, -0x10000000, RZ ;\n /*1050*/ IADD3 R14, P1, R4, -0x8000000, RZ ;\n /*1060*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ;\n /*1070*/ LDG.E R19, [R6.64] ;\n /*1080*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*1090*/ IADD3.X R15, R5, -0x1, RZ, P1, !PT ;\n /*10a0*/ STG.E [R12.64+0x1000], R19 ;\n /*10b0*/ LDG.E R9, [R14.64+0x800] ;\n /*10c0*/ IADD3 R10, P0, R2, -0x8000000, RZ ;\n /*10d0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*10e0*/ LDG.E R21, [R8.64] ;\n /*10f0*/ IADD3.X R11, R3, -0x1, RZ, P0, !PT ;\n /*1100*/ STG.E [R10.64+0x800], R21 ;\n /*1110*/ LDG.E R7, [R4.64] ;\n /*1120*/ IADD3 R16, P0, R4, 0x8000000, RZ ;\n /*1130*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ;\n /*1140*/ LDG.E R7, [R6.64] ;\n /*1150*/ IMAD.X R17, RZ, RZ, R5, P0 ;\n /*1160*/ STG.E [R2.64], R7 ;\n /*1170*/ LDG.E R17, [R16.64+-0x800] ;\n /*1180*/ IADD3 R12, P0, R2, 0x8000000, RZ ;\n /*1190*/ IMAD.WIDE R8, R17, R0, c[0x0][0x160] ;\n /*11a0*/ LDG.E R9, [R8.64] ;\n /*11b0*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*11c0*/ STG.E [R12.64+-0x800], R9 ;\n /*11d0*/ EXIT ;\n.L_x_13:\n /*11e0*/ BRA `(.L_x_13);\n /*11f0*/ NOP;\n /*1200*/ NOP;\n /*1210*/ NOP;\n /*1220*/ NOP;\n /*1230*/ NOP;\n /*1240*/ NOP;\n /*1250*/ NOP;\n /*1260*/ NOP;\n /*1270*/ NOP;\n.L_x_34:\n\n\n//--------------------- .text._Z27d_do_permutation_generic_f1PfS_Pii --------------------------\n .section .text._Z27d_do_permutation_generic_f1PfS_Pii,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=28\"\n .align 128\n\n\n\n\n .global _Z27d_do_permutation_generic_f1PfS_Pii\n .type _Z27d_do_permutation_generic_f1PfS_Pii,@function\n .size _Z27d_do_permutation_generic_f1PfS_Pii,(.L_x_35 - _Z27d_do_permutation_generic_f1PfS_Pii)\n .other _Z27d_do_permutation_generic_f1PfS_Pii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z27d_do_permutation_generic_f1PfS_Pii:\n.text._Z27d_do_permutation_generic_f1PfS_Pii:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2UR UR4, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ ULDC UR5, c[0x0][0x0] ;\n /*0040*/ UIMAD UR4, UR4, UR5, URZ ;\n /*0050*/ IADD3 R0, R3, UR4, RZ ;\n /*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ;\n /*0070*/ @P0 EXIT ;\n /*0080*/ LOP3.LUT R2, RZ, UR4, RZ, 0x33, !PT ;\n /*0090*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*00a0*/ BSSY B0, `(.L_x_14) ;\n /*00b0*/ IADD3 R4, -R3, c[0x0][0x178], R2 ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R4.reuse, 0x5fffa00, PT ;\n /*00d0*/ IMAD.WIDE.U32 R2, R4, -0x7fff7fff, RZ ;\n /*00e0*/ LEA.HI R2, R3, 0x1, RZ, 0x8 ;\n /*00f0*/ LOP3.LUT P1, R6, R2, 0x3, RZ, 0xc0, !PT ;\n /*0100*/ @!P1 BRA `(.L_x_15) ;\n /*0110*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*0120*/ IMAD.WIDE R2, R0, R13, c[0x0][0x170] ;\n /*0130*/ IMAD.WIDE R4, R0, R13, c[0x0][0x160] ;\n /*0140*/ IMAD.MOV.U32 R10, RZ, RZ, R2 ;\n /*0150*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ;\n /*0160*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ;\n /*0170*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ;\n.L_x_16:\n /*0180*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ;\n /*0190*/ IMAD.MOV.U32 R5, RZ, RZ, R11 ;\n /*01a0*/ LDG.E R2, [R4.64] ;\n /*01b0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ;\n /*01c0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ;\n /*01d0*/ LDG.E R7, [R4.64] ;\n /*01e0*/ IADD3 R6, R6, -0x1, RZ ;\n /*01f0*/ IADD3 R10, P2, R10, 0x7fff800, RZ ;\n /*0200*/ ISETP.NE.AND P1, PT, R6, RZ, PT ;\n /*0210*/ IADD3 R8, P3, R8, 0x7fff800, RZ ;\n /*0220*/ IMAD.X R11, RZ, RZ, R11, P2 ;\n /*0230*/ IADD3 R0, R0, 0x1fffe00, RZ ;\n /*0240*/ IMAD.X R9, RZ, RZ, R9, P3 ;\n /*0250*/ IMAD.WIDE R2, R2, R13, c[0x0][0x168] ;\n /*0260*/ STG.E [R2.64], R7 ;\n /*0270*/ @P1 BRA `(.L_x_16) ;\n.L_x_15:\n /*0280*/ BSYNC B0 ;\n.L_x_14:\n /*0290*/ @!P0 EXIT ;\n /*02a0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*02b0*/ IMAD.WIDE R2, R0, R7, c[0x2][0x0] ;\n /*02c0*/ IADD3 R6, P0, R2.reuse, c[0x0][0x160], RZ ;\n /*02d0*/ IADD3 R4, P1, R2, c[0x0][0x170], RZ ;\n /*02e0*/ IADD3.X R11, R3.reuse, c[0x0][0x164], RZ, P0, !PT ;\n /*02f0*/ IADD3.X R5, R3, c[0x0][0x174], RZ, P1, !PT ;\n.L_x_17:\n /*0300*/ IADD3 R14, P1, R4, -0x10000000, RZ ;\n /*0310*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ;\n /*0320*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ;\n /*0330*/ IADD3.X R15, R5, -0x1, RZ, P1, !PT ;\n /*0340*/ IADD3 R12, P0, R2, -0x10000000, RZ ;\n /*0350*/ LDG.E R8, [R14.64+0x1000] ;\n /*0360*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*0370*/ LDG.E R23, [R12.64+0x1000] ;\n /*0380*/ IADD3 R18, P1, R4, -0x8000000, RZ ;\n /*0390*/ IADD3 R16, P0, R2, -0x8000000, RZ ;\n /*03a0*/ IADD3.X R19, R5, -0x1, RZ, P1, !PT ;\n /*03b0*/ IADD3.X R17, R3, -0x1, RZ, P0, !PT ;\n /*03c0*/ IMAD.WIDE R8, R8, R7, c[0x0][0x168] ;\n /*03d0*/ STG.E [R8.64], R23 ;\n /*03e0*/ LDG.E R10, [R18.64+0x800] ;\n /*03f0*/ LDG.E R17, [R16.64+0x800] ;\n /*0400*/ IMAD.WIDE R10, R10, R7, c[0x0][0x168] ;\n /*0410*/ STG.E [R10.64], R17 ;\n /*0420*/ LDG.E R12, [R4.64] ;\n /*0430*/ LDG.E R25, [R2.64] ;\n /*0440*/ IADD3 R20, P1, R4, 0x8000000, RZ ;\n /*0450*/ IADD3 R14, P0, R2, 0x8000000, RZ ;\n /*0460*/ IMAD.X R21, RZ, RZ, R5, P1 ;\n /*0470*/ IMAD.X R15, RZ, RZ, R3, P0 ;\n /*0480*/ IMAD.WIDE R12, R12, R7, c[0x0][0x168] ;\n /*0490*/ STG.E [R12.64], R25 ;\n /*04a0*/ LDG.E R8, [R20.64+-0x800] ;\n /*04b0*/ LDG.E R15, [R14.64+-0x800] ;\n /*04c0*/ IADD3 R0, R0, 0x7fff800, RZ ;\n /*04d0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ;\n /*04e0*/ IADD3 R6, P1, R2, 0x1fffe000, RZ ;\n /*04f0*/ IADD3 R4, P2, R4, 0x1fffe000, RZ ;\n /*0500*/ IMAD.X R11, RZ, RZ, R3, P1 ;\n /*0510*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*0520*/ IMAD.WIDE R8, R8, R7, c[0x0][0x168] ;\n /*0530*/ STG.E [R8.64], R15 ;\n /*0540*/ @!P0 BRA `(.L_x_17) ;\n /*0550*/ EXIT ;\n.L_x_18:\n /*0560*/ BRA `(.L_x_18);\n /*0570*/ NOP;\n /*0580*/ NOP;\n /*0590*/ NOP;\n /*05a0*/ NOP;\n /*05b0*/ NOP;\n /*05c0*/ NOP;\n /*05d0*/ NOP;\n /*05e0*/ NOP;\n /*05f0*/ NOP;\n.L_x_35:\n\n\n//--------------------- .text._Z27d_do_permutation_generic_f2PiS_S_i --------------------------\n .section .text._Z27d_do_permutation_generic_f2PiS_S_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=28\"\n .align 128\n\n\n\n\n .global _Z27d_do_permutation_generic_f2PiS_S_i\n .type _Z27d_do_permutation_generic_f2PiS_S_i,@function\n .size _Z27d_do_permutation_generic_f2PiS_S_i,(.L_x_36 - _Z27d_do_permutation_generic_f2PiS_S_i)\n .other _Z27d_do_permutation_generic_f2PiS_S_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z27d_do_permutation_generic_f2PiS_S_i:\n.text._Z27d_do_permutation_generic_f2PiS_S_i:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2UR UR4, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ ULDC UR5, c[0x0][0x0] ;\n /*0040*/ UIMAD UR4, UR4, UR5, URZ ;\n /*0050*/ IADD3 R7, R3, UR4, RZ ;\n /*0060*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x178], PT ;\n /*0070*/ @P0 EXIT ;\n /*0080*/ LOP3.LUT R0, RZ, UR4, RZ, 0x33, !PT ;\n /*0090*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*00a0*/ BSSY B0, `(.L_x_19) ;\n /*00b0*/ IADD3 R0, -R3, c[0x0][0x178], R0 ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R0.reuse, 0x5fffa00, PT ;\n /*00d0*/ IMAD.WIDE.U32 R2, R0, -0x7fff7fff, RZ ;\n /*00e0*/ LEA.HI R2, R3, 0x1, RZ, 0x8 ;\n /*00f0*/ LOP3.LUT P1, R6, R2, 0x3, RZ, 0xc0, !PT ;\n /*0100*/ @!P1 BRA `(.L_x_20) ;\n /*0110*/ IMAD.MOV.U32 R8, RZ, RZ, 0x4 ;\n /*0120*/ IMAD.WIDE R2, R7, R8, c[0x0][0x168] ;\n /*0130*/ IMAD.WIDE R4, R7, R8, c[0x0][0x170] ;\n /*0140*/ IMAD.MOV.U32 R0, RZ, RZ, R2 ;\n /*0150*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ;\n.L_x_21:\n /*0160*/ LDG.E R2, [R4.64] ;\n /*0170*/ IMAD.WIDE R2, R2, R8, c[0x0][0x160] ;\n /*0180*/ LDG.E R9, [R2.64] ;\n /*0190*/ IADD3 R6, R6, -0x1, RZ ;\n /*01a0*/ IADD3 R4, P3, R4, 0x7fff800, RZ ;\n /*01b0*/ ISETP.NE.AND P1, PT, R6, RZ, PT ;\n /*01c0*/ IADD3 R7, R7, 0x1fffe00, RZ ;\n /*01d0*/ IMAD.X R5, RZ, RZ, R5, P3 ;\n /*01e0*/ IMAD.MOV.U32 R2, RZ, RZ, R0 ;\n /*01f0*/ IADD3 R0, P2, R0, 0x7fff800, RZ ;\n /*0200*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ;\n /*0210*/ IMAD.X R11, RZ, RZ, R11, P2 ;\n /*0220*/ STG.E [R2.64], R9 ;\n /*0230*/ @P1 BRA `(.L_x_21) ;\n.L_x_20:\n /*0240*/ BSYNC B0 ;\n.L_x_19:\n /*0250*/ @!P0 EXIT ;\n /*0260*/ IADD3 R5, -R7, c[0x0][0x178], RZ ;\n /*0270*/ IMAD.MOV.U32 R0, RZ, RZ, 0x4 ;\n /*0280*/ BSSY B0, `(.L_x_22) ;\n /*0290*/ ISETP.GT.AND P1, PT, R5, 0x17ffe800, PT ;\n /*02a0*/ IMAD.WIDE R2, R7, R0, c[0x2][0x0] ;\n /*02b0*/ IADD3 R4, P0, R2.reuse, c[0x0][0x170], RZ ;\n /*02c0*/ IADD3 R2, P2, R2, c[0x0][0x168], RZ ;\n /*02d0*/ IADD3.X R5, R3.reuse, c[0x0][0x174], RZ, P0, !PT ;\n /*02e0*/ IADD3.X R3, R3, c[0x0][0x16c], RZ, P2, !PT ;\n /*02f0*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*0300*/ @!P1 BRA `(.L_x_23) ;\n /*0310*/ IMAD.MOV.U32 R6, RZ, RZ, c[0x0][0x178] ;\n /*0320*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*0330*/ IADD3 R6, R6, -0x17ffe800, RZ ;\n.L_x_24:\n /*0340*/ IADD3 R12, P1, R4, -0x10000000, RZ ;\n /*0350*/ IADD3.X R13, R5, -0x1, RZ, P1, !PT ;\n /*0360*/ LDG.E R9, [R12.64+0x1000] ;\n /*0370*/ IADD3 R14, P1, R2, -0x10000000, RZ ;\n /*0380*/ IADD3 R16, P2, R4, -0x8000000, RZ ;\n /*0390*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*03a0*/ LDG.E R21, [R8.64] ;\n /*03b0*/ IADD3.X R15, R3, -0x1, RZ, P1, !PT ;\n /*03c0*/ IADD3.X R17, R5, -0x1, RZ, P2, !PT ;\n /*03d0*/ STG.E [R14.64+0x1000], R21 ;\n /*03e0*/ LDG.E R11, [R16.64+0x800] ;\n /*03f0*/ IADD3 R12, P1, R2, -0x8000000, RZ ;\n /*0400*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0410*/ LDG.E R23, [R10.64] ;\n /*0420*/ IADD3.X R13, R3, -0x1, RZ, P1, !PT ;\n /*0430*/ STG.E [R12.64+0x800], R23 ;\n /*0440*/ LDG.E R9, [R4.64] ;\n /*0450*/ IADD3 R18, P1, R4, 0x8000000, RZ ;\n /*0460*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0470*/ LDG.E R25, [R8.64] ;\n /*0480*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0490*/ STG.E [R2.64], R25 ;\n /*04a0*/ LDG.E R19, [R18.64+-0x800] ;\n /*04b0*/ IADD3 R14, P1, R2, 0x8000000, RZ ;\n /*04c0*/ IADD3 R12, P2, R4, 0x10000000, RZ ;\n /*04d0*/ IMAD.WIDE R10, R19, R0, c[0x0][0x160] ;\n /*04e0*/ LDG.E R21, [R10.64] ;\n /*04f0*/ IMAD.X R15, RZ, RZ, R3, P1 ;\n /*0500*/ IMAD.X R13, RZ, RZ, R5, P2 ;\n /*0510*/ STG.E [R14.64+-0x800], R21 ;\n /*0520*/ LDG.E R9, [R12.64+-0x1000] ;\n /*0530*/ IADD3 R16, P1, R2, 0x10000000, RZ ;\n /*0540*/ IADD3 R18, P2, R4, 0x18000000, RZ ;\n /*0550*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0560*/ LDG.E R23, [R8.64] ;\n /*0570*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0580*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0590*/ STG.E [R16.64+-0x1000], R23 ;\n /*05a0*/ LDG.E R11, [R18.64+-0x1800] ;\n /*05b0*/ IADD3 R12, P1, R2, 0x18000000, RZ ;\n /*05c0*/ IADD3 R14, P2, R4, 0x20000000, RZ ;\n /*05d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*05e0*/ LDG.E R21, [R10.64] ;\n /*05f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0600*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0610*/ STG.E [R12.64+-0x1800], R21 ;\n /*0620*/ LDG.E R9, [R14.64+-0x2000] ;\n /*0630*/ IADD3 R16, P1, R2, 0x20000000, RZ ;\n /*0640*/ IADD3 R18, P2, R4, 0x28000000, RZ ;\n /*0650*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0660*/ LDG.E R23, [R8.64] ;\n /*0670*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0680*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0690*/ STG.E [R16.64+-0x2000], R23 ;\n /*06a0*/ LDG.E R11, [R18.64+-0x2800] ;\n /*06b0*/ IADD3 R12, P1, R2, 0x28000000, RZ ;\n /*06c0*/ IADD3 R14, P2, R4, 0x30000000, RZ ;\n /*06d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*06e0*/ LDG.E R21, [R10.64] ;\n /*06f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0700*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0710*/ STG.E [R12.64+-0x2800], R21 ;\n /*0720*/ LDG.E R9, [R14.64+-0x3000] ;\n /*0730*/ IADD3 R16, P1, R2, 0x30000000, RZ ;\n /*0740*/ IADD3 R18, P2, R4, 0x38000000, RZ ;\n /*0750*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0760*/ LDG.E R23, [R8.64] ;\n /*0770*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0780*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0790*/ STG.E [R16.64+-0x3000], R23 ;\n /*07a0*/ LDG.E R11, [R18.64+-0x3800] ;\n /*07b0*/ IADD3 R12, P1, R2, 0x38000000, RZ ;\n /*07c0*/ IADD3 R14, P2, R4, 0x40000000, RZ ;\n /*07d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*07e0*/ LDG.E R21, [R10.64] ;\n /*07f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0800*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0810*/ STG.E [R12.64+-0x3800], R21 ;\n /*0820*/ LDG.E R9, [R14.64+-0x4000] ;\n /*0830*/ IADD3 R16, P1, R2, 0x40000000, RZ ;\n /*0840*/ IADD3 R18, P2, R4, 0x48000000, RZ ;\n /*0850*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0860*/ LDG.E R23, [R8.64] ;\n /*0870*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0880*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0890*/ STG.E [R16.64+-0x4000], R23 ;\n /*08a0*/ LDG.E R11, [R18.64+-0x4800] ;\n /*08b0*/ IADD3 R12, P1, R2, 0x48000000, RZ ;\n /*08c0*/ IADD3 R14, P2, R4, 0x50000000, RZ ;\n /*08d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*08e0*/ LDG.E R21, [R10.64] ;\n /*08f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0900*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0910*/ STG.E [R12.64+-0x4800], R21 ;\n /*0920*/ LDG.E R9, [R14.64+-0x5000] ;\n /*0930*/ IADD3 R16, P1, R2, 0x50000000, RZ ;\n /*0940*/ IADD3 R18, P2, R4, 0x58000000, RZ ;\n /*0950*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0960*/ LDG.E R23, [R8.64] ;\n /*0970*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0980*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0990*/ STG.E [R16.64+-0x5000], R23 ;\n /*09a0*/ LDG.E R11, [R18.64+-0x5800] ;\n /*09b0*/ IADD3 R12, P1, R2, 0x58000000, RZ ;\n /*09c0*/ IADD3 R14, P2, R4, 0x60000000, RZ ;\n /*09d0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*09e0*/ LDG.E R21, [R10.64] ;\n /*09f0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0a00*/ IMAD.X R15, RZ, RZ, R5, P2 ;\n /*0a10*/ STG.E [R12.64+-0x5800], R21 ;\n /*0a20*/ LDG.E R9, [R14.64+-0x6000] ;\n /*0a30*/ IADD3 R16, P1, R2, 0x60000000, RZ ;\n /*0a40*/ IADD3 R18, P2, R4, 0x68000000, RZ ;\n /*0a50*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0a60*/ LDG.E R9, [R8.64] ;\n /*0a70*/ IMAD.X R17, RZ, RZ, R3, P1 ;\n /*0a80*/ IMAD.X R19, RZ, RZ, R5, P2 ;\n /*0a90*/ STG.E [R16.64+-0x6000], R9 ;\n /*0aa0*/ LDG.E R11, [R18.64+-0x6800] ;\n /*0ab0*/ IADD3 R12, P1, R2, 0x68000000, RZ ;\n /*0ac0*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0ad0*/ LDG.E R11, [R10.64] ;\n /*0ae0*/ IMAD.X R13, RZ, RZ, R3, P1 ;\n /*0af0*/ IADD3 R7, R7, 0x1fffe000, RZ ;\n /*0b00*/ IADD3 R4, P2, R4, 0x7fff8000, RZ ;\n /*0b10*/ ISETP.GE.AND P1, PT, R7, R6, PT ;\n /*0b20*/ IADD3 R2, P3, R2, 0x7fff8000, RZ ;\n /*0b30*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*0b40*/ IMAD.X R3, RZ, RZ, R3, P3 ;\n /*0b50*/ STG.E [R12.64+-0x6800], R11 ;\n /*0b60*/ @!P1 BRA `(.L_x_24) ;\n.L_x_23:\n /*0b70*/ BSYNC B0 ;\n.L_x_22:\n /*0b80*/ IADD3 R6, -R7, c[0x0][0x178], RZ ;\n /*0b90*/ BSSY B0, `(.L_x_25) ;\n /*0ba0*/ ISETP.GT.AND P1, PT, R6, 0x7fff800, PT ;\n /*0bb0*/ @!P1 BRA `(.L_x_26) ;\n /*0bc0*/ IADD3 R12, P0, R4, -0x10000000, RZ ;\n /*0bd0*/ IADD3.X R13, R5, -0x1, RZ, P0, !PT ;\n /*0be0*/ LDG.E R9, [R12.64+0x1000] ;\n /*0bf0*/ IADD3 R14, P0, R2, -0x10000000, RZ ;\n /*0c00*/ IADD3 R16, P1, R4, -0x8000000, RZ ;\n /*0c10*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0c20*/ LDG.E R21, [R8.64] ;\n /*0c30*/ IADD3.X R15, R3, -0x1, RZ, P0, !PT ;\n /*0c40*/ IADD3.X R17, R5, -0x1, RZ, P1, !PT ;\n /*0c50*/ STG.E [R14.64+0x1000], R21 ;\n /*0c60*/ LDG.E R11, [R16.64+0x800] ;\n /*0c70*/ IADD3 R12, P0, R2, -0x8000000, RZ ;\n /*0c80*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0c90*/ LDG.E R23, [R10.64] ;\n /*0ca0*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*0cb0*/ STG.E [R12.64+0x800], R23 ;\n /*0cc0*/ LDG.E R9, [R4.64] ;\n /*0cd0*/ IADD3 R18, P0, R4, 0x8000000, RZ ;\n /*0ce0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0cf0*/ LDG.E R25, [R8.64] ;\n /*0d00*/ IMAD.X R19, RZ, RZ, R5, P0 ;\n /*0d10*/ STG.E [R2.64], R25 ;\n /*0d20*/ LDG.E R19, [R18.64+-0x800] ;\n /*0d30*/ IADD3 R14, P0, R2, 0x8000000, RZ ;\n /*0d40*/ IADD3 R12, P1, R4, 0x10000000, RZ ;\n /*0d50*/ IMAD.WIDE R10, R19, R0, c[0x0][0x160] ;\n /*0d60*/ LDG.E R21, [R10.64] ;\n /*0d70*/ IMAD.X R15, RZ, RZ, R3, P0 ;\n /*0d80*/ IMAD.X R13, RZ, RZ, R5, P1 ;\n /*0d90*/ STG.E [R14.64+-0x800], R21 ;\n /*0da0*/ LDG.E R9, [R12.64+-0x1000] ;\n /*0db0*/ IADD3 R16, P0, R2, 0x10000000, RZ ;\n /*0dc0*/ IADD3 R18, P1, R4, 0x18000000, RZ ;\n /*0dd0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0de0*/ LDG.E R23, [R8.64] ;\n /*0df0*/ IMAD.X R17, RZ, RZ, R3, P0 ;\n /*0e00*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0e10*/ STG.E [R16.64+-0x1000], R23 ;\n /*0e20*/ LDG.E R11, [R18.64+-0x1800] ;\n /*0e30*/ IADD3 R12, P0, R2, 0x18000000, RZ ;\n /*0e40*/ IADD3 R14, P1, R4, 0x20000000, RZ ;\n /*0e50*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0e60*/ LDG.E R21, [R10.64] ;\n /*0e70*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*0e80*/ IMAD.X R15, RZ, RZ, R5, P1 ;\n /*0e90*/ STG.E [R12.64+-0x1800], R21 ;\n /*0ea0*/ LDG.E R9, [R14.64+-0x2000] ;\n /*0eb0*/ IADD3 R16, P0, R2, 0x20000000, RZ ;\n /*0ec0*/ IADD3 R18, P1, R4, 0x28000000, RZ ;\n /*0ed0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*0ee0*/ LDG.E R9, [R8.64] ;\n /*0ef0*/ IMAD.X R17, RZ, RZ, R3, P0 ;\n /*0f00*/ IMAD.X R19, RZ, RZ, R5, P1 ;\n /*0f10*/ STG.E [R16.64+-0x2000], R9 ;\n /*0f20*/ LDG.E R11, [R18.64+-0x2800] ;\n /*0f30*/ IADD3 R12, P0, R2, 0x28000000, RZ ;\n /*0f40*/ IMAD.WIDE R10, R11, R0, c[0x0][0x160] ;\n /*0f50*/ LDG.E R11, [R10.64] ;\n /*0f60*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*0f70*/ IADD3 R4, P1, R4, 0x3fffc000, RZ ;\n /*0f80*/ IADD3 R2, P2, R2, 0x3fffc000, RZ ;\n /*0f90*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*0fa0*/ IMAD.X R5, RZ, RZ, R5, P1 ;\n /*0fb0*/ IADD3 R7, R7, 0xffff000, RZ ;\n /*0fc0*/ IMAD.X R3, RZ, RZ, R3, P2 ;\n /*0fd0*/ STG.E [R12.64+-0x2800], R11 ;\n.L_x_26:\n /*0fe0*/ BSYNC B0 ;\n.L_x_25:\n /*0ff0*/ ISETP.LT.OR P0, PT, R7, c[0x0][0x178], P0 ;\n /*1000*/ @!P0 EXIT ;\n /*1010*/ IADD3 R10, P0, R4, -0x10000000, RZ ;\n /*1020*/ IADD3.X R11, R5, -0x1, RZ, P0, !PT ;\n /*1030*/ LDG.E R7, [R10.64+0x1000] ;\n /*1040*/ IADD3 R12, P0, R2, -0x10000000, RZ ;\n /*1050*/ IADD3 R14, P1, R4, -0x8000000, RZ ;\n /*1060*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ;\n /*1070*/ LDG.E R19, [R6.64] ;\n /*1080*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*1090*/ IADD3.X R15, R5, -0x1, RZ, P1, !PT ;\n /*10a0*/ STG.E [R12.64+0x1000], R19 ;\n /*10b0*/ LDG.E R9, [R14.64+0x800] ;\n /*10c0*/ IADD3 R10, P0, R2, -0x8000000, RZ ;\n /*10d0*/ IMAD.WIDE R8, R9, R0, c[0x0][0x160] ;\n /*10e0*/ LDG.E R21, [R8.64] ;\n /*10f0*/ IADD3.X R11, R3, -0x1, RZ, P0, !PT ;\n /*1100*/ STG.E [R10.64+0x800], R21 ;\n /*1110*/ LDG.E R7, [R4.64] ;\n /*1120*/ IADD3 R16, P0, R4, 0x8000000, RZ ;\n /*1130*/ IMAD.WIDE R6, R7, R0, c[0x0][0x160] ;\n /*1140*/ LDG.E R7, [R6.64] ;\n /*1150*/ IMAD.X R17, RZ, RZ, R5, P0 ;\n /*1160*/ STG.E [R2.64], R7 ;\n /*1170*/ LDG.E R17, [R16.64+-0x800] ;\n /*1180*/ IADD3 R12, P0, R2, 0x8000000, RZ ;\n /*1190*/ IMAD.WIDE R8, R17, R0, c[0x0][0x160] ;\n /*11a0*/ LDG.E R9, [R8.64] ;\n /*11b0*/ IMAD.X R13, RZ, RZ, R3, P0 ;\n /*11c0*/ STG.E [R12.64+-0x800], R9 ;\n /*11d0*/ EXIT ;\n.L_x_27:\n /*11e0*/ BRA `(.L_x_27);\n /*11f0*/ NOP;\n /*1200*/ NOP;\n /*1210*/ NOP;\n /*1220*/ NOP;\n /*1230*/ NOP;\n /*1240*/ NOP;\n /*1250*/ NOP;\n /*1260*/ NOP;\n /*1270*/ NOP;\n.L_x_36:\n\n\n//--------------------- .text._Z27d_do_permutation_generic_f1PiS_S_i --------------------------\n .section .text._Z27d_do_permutation_generic_f1PiS_S_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=28\"\n .align 128\n\n\n\n\n .global _Z27d_do_permutation_generic_f1PiS_S_i\n .type _Z27d_do_permutation_generic_f1PiS_S_i,@function\n .size _Z27d_do_permutation_generic_f1PiS_S_i,(.L_x_37 - _Z27d_do_permutation_generic_f1PiS_S_i)\n .other _Z27d_do_permutation_generic_f1PiS_S_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z27d_do_permutation_generic_f1PiS_S_i:\n.text._Z27d_do_permutation_generic_f1PiS_S_i:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2UR UR4, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ ULDC UR5, c[0x0][0x0] ;\n /*0040*/ UIMAD UR4, UR4, UR5, URZ ;\n /*0050*/ IADD3 R0, R3, UR4, RZ ;\n /*0060*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ;\n /*0070*/ @P0 EXIT ;\n /*0080*/ LOP3.LUT R2, RZ, UR4, RZ, 0x33, !PT ;\n /*0090*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*00a0*/ BSSY B0, `(.L_x_28) ;\n /*00b0*/ IADD3 R4, -R3, c[0x0][0x178], R2 ;\n /*00c0*/ ISETP.GE.U32.AND P0, PT, R4.reuse, 0x5fffa00, PT ;\n /*00d0*/ IMAD.WIDE.U32 R2, R4, -0x7fff7fff, RZ ;\n /*00e0*/ LEA.HI R2, R3, 0x1, RZ, 0x8 ;\n /*00f0*/ LOP3.LUT P1, R6, R2, 0x3, RZ, 0xc0, !PT ;\n /*0100*/ @!P1 BRA `(.L_x_29) ;\n /*0110*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*0120*/ IMAD.WIDE R2, R0, R13, c[0x0][0x170] ;\n /*0130*/ IMAD.WIDE R4, R0, R13, c[0x0][0x160] ;\n /*0140*/ IMAD.MOV.U32 R10, RZ, RZ, R2 ;\n /*0150*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ;\n /*0160*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ;\n /*0170*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ;\n.L_x_30:\n /*0180*/ IMAD.MOV.U32 R4, RZ, RZ, R10 ;\n /*0190*/ IMAD.MOV.U32 R5, RZ, RZ, R11 ;\n /*01a0*/ LDG.E R2, [R4.64] ;\n /*01b0*/ IMAD.MOV.U32 R4, RZ, RZ, R8 ;\n /*01c0*/ IMAD.MOV.U32 R5, RZ, RZ, R9 ;\n /*01d0*/ LDG.E R7, [R4.64] ;\n /*01e0*/ IADD3 R6, R6, -0x1, RZ ;\n /*01f0*/ IADD3 R10, P2, R10, 0x7fff800, RZ ;\n /*0200*/ ISETP.NE.AND P1, PT, R6, RZ, PT ;\n /*0210*/ IADD3 R8, P3, R8, 0x7fff800, RZ ;\n /*0220*/ IMAD.X R11, RZ, RZ, R11, P2 ;\n /*0230*/ IADD3 R0, R0, 0x1fffe00, RZ ;\n /*0240*/ IMAD.X R9, RZ, RZ, R9, P3 ;\n /*0250*/ IMAD.WIDE R2, R2, R13, c[0x0][0x168] ;\n /*0260*/ STG.E [R2.64], R7 ;\n /*0270*/ @P1 BRA `(.L_x_30) ;\n.L_x_29:\n /*0280*/ BSYNC B0 ;\n.L_x_28:\n /*0290*/ @!P0 EXIT ;\n /*02a0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*02b0*/ IMAD.WIDE R2, R0, R7, c[0x2][0x0] ;\n /*02c0*/ IADD3 R6, P0, R2.reuse, c[0x0][0x160], RZ ;\n /*02d0*/ IADD3 R4, P1, R2, c[0x0][0x170], RZ ;\n /*02e0*/ IADD3.X R11, R3.reuse, c[0x0][0x164], RZ, P0, !PT ;\n /*02f0*/ IADD3.X R5, R3, c[0x0][0x174], RZ, P1, !PT ;\n.L_x_31:\n /*0300*/ IADD3 R14, P1, R4, -0x10000000, RZ ;\n /*0310*/ IMAD.MOV.U32 R2, RZ, RZ, R6 ;\n /*0320*/ IMAD.MOV.U32 R3, RZ, RZ, R11 ;\n /*0330*/ IADD3.X R15, R5, -0x1, RZ, P1, !PT ;\n /*0340*/ IADD3 R12, P0, R2, -0x10000000, RZ ;\n /*0350*/ LDG.E R8, [R14.64+0x1000] ;\n /*0360*/ IADD3.X R13, R3, -0x1, RZ, P0, !PT ;\n /*0370*/ LDG.E R23, [R12.64+0x1000] ;\n /*0380*/ IADD3 R18, P1, R4, -0x8000000, RZ ;\n /*0390*/ IADD3 R16, P0, R2, -0x8000000, RZ ;\n /*03a0*/ IADD3.X R19, R5, -0x1, RZ, P1, !PT ;\n /*03b0*/ IADD3.X R17, R3, -0x1, RZ, P0, !PT ;\n /*03c0*/ IMAD.WIDE R8, R8, R7, c[0x0][0x168] ;\n /*03d0*/ STG.E [R8.64], R23 ;\n /*03e0*/ LDG.E R10, [R18.64+0x800] ;\n /*03f0*/ LDG.E R17, [R16.64+0x800] ;\n /*0400*/ IMAD.WIDE R10, R10, R7, c[0x0][0x168] ;\n /*0410*/ STG.E [R10.64], R17 ;\n /*0420*/ LDG.E R12, [R4.64] ;\n /*0430*/ LDG.E R25, [R2.64] ;\n /*0440*/ IADD3 R20, P1, R4, 0x8000000, RZ ;\n /*0450*/ IADD3 R14, P0, R2, 0x8000000, RZ ;\n /*0460*/ IMAD.X R21, RZ, RZ, R5, P1 ;\n /*0470*/ IMAD.X R15, RZ, RZ, R3, P0 ;\n /*0480*/ IMAD.WIDE R12, R12, R7, c[0x0][0x168] ;\n /*0490*/ STG.E [R12.64], R25 ;\n /*04a0*/ LDG.E R8, [R20.64+-0x800] ;\n /*04b0*/ LDG.E R15, [R14.64+-0x800] ;\n /*04c0*/ IADD3 R0, R0, 0x7fff800, RZ ;\n /*04d0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x178], PT ;\n /*04e0*/ IADD3 R6, P1, R2, 0x1fffe000, RZ ;\n /*04f0*/ IADD3 R4, P2, R4, 0x1fffe000, RZ ;\n /*0500*/ IMAD.X R11, RZ, RZ, R3, P1 ;\n /*0510*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*0520*/ IMAD.WIDE R8, R8, R7, c[0x0][0x168] ;\n /*0530*/ STG.E [R8.64], R15 ;\n /*0540*/ @!P0 BRA `(.L_x_31) ;\n /*0550*/ EXIT ;\n.L_x_32:\n /*0560*/ BRA `(.L_x_32);\n /*0570*/ NOP;\n /*0580*/ NOP;\n /*0590*/ NOP;\n /*05a0*/ NOP;\n /*05b0*/ NOP;\n /*05c0*/ NOP;\n /*05d0*/ NOP;\n /*05e0*/ NOP;\n /*05f0*/ NOP;\n.L_x_37:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.weak\t__cxa_pure_virtual ; -- Begin function __cxa_pure_virtual\n\t.p2align\t2\n\t.type\t__cxa_pure_virtual,@function\n__cxa_pure_virtual: ; @__cxa_pure_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB0_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB0_1\n.Lfunc_end0:\n\t.size\t__cxa_pure_virtual, .Lfunc_end0-__cxa_pure_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.weak\t__cxa_deleted_virtual ; -- Begin function __cxa_deleted_virtual\n\t.p2align\t2\n\t.type\t__cxa_deleted_virtual,@function\n__cxa_deleted_virtual: ; @__cxa_deleted_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB1_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB1_1\n.Lfunc_end1:\n\t.size\t__cxa_deleted_virtual, .Lfunc_end1-__cxa_deleted_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hsa_signal_add\n\t.type\t__ockl_hsa_signal_add,@function\n__ockl_hsa_signal_add: ; @__ockl_hsa_signal_add\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v4, s32 offset:36 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s32 offset:32 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v2\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v1, s32 offset:28 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[3:4], s32 offset:20 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tscratch_store_b64 off, v[3:4], s32 offset:12 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s32 offset:4 ; 8-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 3\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s1, 0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 1\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_3\n; %bb.2:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 4\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s1, 2\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_17\n\ts_branch .LBB2_4\n.LBB2_3:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 1\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 0\n\tv_writelane_b32 v6, s2, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 5\n\tv_writelane_b32 v6, s1, 6\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 7\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_13\n\ts_branch .LBB2_6\n.LBB2_4:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 9\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_15\n\ts_branch .LBB2_18\n.LBB2_5:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 10\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 11\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 0\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_3\n.LBB2_6:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 12\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_7\n\ts_branch .LBB2_14\n.LBB2_7:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 13\n\tv_writelane_b32 v6, s1, 14\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 15\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_9\n; %bb.8:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 4\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_lt_i32_e64 s2, v0, s0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 13\n\tv_writelane_b32 v6, s0, 14\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_9:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s3, v6, 15\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_readlane_b32 s1, v6, 4\n\tv_readlane_b32 s2, v6, 13\n\tv_readlane_b32 s0, v6, 14\n\ts_and_b32 s0, s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 5\n\tv_writelane_b32 v6, s0, 6\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_13\n.LBB2_10:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 16\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 17\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_11:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v6, 17\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 19\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_19\n; %bb.12:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_19\n.LBB2_13:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v6, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s0, v6, 5\n\tv_readlane_b32 s1, v6, 6\n\tv_writelane_b32 v6, s1, 16\n\tv_writelane_b32 v6, s1, 17\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 18\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_11\n\ts_branch .LBB2_10\n.LBB2_14:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_branch .LBB2_7\n.LBB2_15:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 9\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 8\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_17\n.LBB2_16:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_5\n.LBB2_17:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v6, 2\n\tv_writelane_b32 v6, s1, 11\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 10\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_5\n\ts_branch .LBB2_16\n.LBB2_18:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 0\n\ts_xor_b32 s0, exec_lo, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_15\n.LBB2_19:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[0:1], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s1, v[0:1], s[0:1]\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 20\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_21\n; %bb.20:\n\tscratch_load_b64 v[1:2], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[3:4], off offset:24\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[1:2], v[3:4], off\n\tv_readfirstlane_b32 s0, v0\n\ts_mov_b32 s1, 0xff\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB2_21:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 20\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:48 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end2:\n\t.size\t__ockl_hsa_signal_add, .Lfunc_end2-__ockl_hsa_signal_add\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 1952\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 56\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_internal\n\t.type\t__ockl_hostcall_internal,@function\n__ockl_hostcall_internal: ; @__ockl_hostcall_internal\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s18, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v24, s33 offset:308 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v25, s33 offset:312 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v26, s33 offset:316 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x150\n\tv_writelane_b32 v24, s30, 0\n\tv_writelane_b32 v24, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:132 ; 4-byte Folded Spill\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s6, 0\n\tv_writelane_b32 v26, s7, 1\n\tscratch_store_b32 off, v18, s33 offset:128 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v16\n\tscratch_load_b32 v16, off, s33 offset:128 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:124 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v14\n\tscratch_load_b32 v14, off, s33 offset:124 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v12\n\tscratch_load_b32 v12, off, s33 offset:120 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:116 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v10\n\tscratch_load_b32 v10, off, s33 offset:116 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:112 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v8\n\tscratch_load_b32 v8, off, s33 offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v6\n\tscratch_load_b32 v6, off, s33 offset:108 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:104 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v4\n\tscratch_load_b32 v4, off, s33 offset:104 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v2\n\tscratch_load_b32 v2, off, s33 offset:100 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:96 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v1, s33 offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s33 offset:92 ; 4-byte Folded Reload\n\tv_writelane_b32 v26, s15, 2\n\tv_writelane_b32 v26, s14, 3\n\tv_writelane_b32 v26, s13, 4\n\tv_writelane_b32 v26, s12, 5\n\tv_writelane_b32 v26, s10, 6\n\tv_writelane_b32 v26, s11, 7\n\tv_writelane_b32 v26, s8, 8\n\tv_writelane_b32 v26, s9, 9\n\tv_writelane_b32 v26, s4, 10\n\tv_writelane_b32 v26, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\ts_waitcnt vmcnt(8)\n\tv_mov_b32_e32 v18, v16\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec\n\ts_waitcnt vmcnt(7)\n\tv_mov_b32_e32 v16, v14\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\ts_waitcnt vmcnt(6)\n\tv_mov_b32_e32 v14, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\ts_waitcnt vmcnt(5)\n\tv_mov_b32_e32 v12, v10\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\ts_waitcnt vmcnt(4)\n\tv_mov_b32_e32 v10, v8\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\ts_waitcnt vmcnt(3)\n\tv_mov_b32_e32 v8, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[17:18], s33 offset:84 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[15:16], s33 offset:76 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[13:14], s33 offset:68 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[11:12], s33 offset:60 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[9:10], s33 offset:52 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[7:8], s33 offset:44 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[5:6], s33 offset:36 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:28 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s0, -1\n\tv_mbcnt_lo_u32_b32 v0, s0, s1\n\tv_mbcnt_hi_u32_b32 v0, s0, v0\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b32 off, v3, s33 offset:24 ; 4-byte Folded Spill\n\tv_readfirstlane_b32 s0, v0\n\tscratch_store_b64 off, v[1:2], s33 offset:16 ; 8-byte Folded Spill\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, s1\n\tv_writelane_b32 v26, s0, 12\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v0, 0\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 13\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_6\n; %bb.1:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_mov_b64 s[2:3], 24\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:160 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b64 s[2:3], 40\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:152 ; 8-byte Folded Spill\n\tglobal_load_b64 v[5:6], v[0:1], off\n\tglobal_load_b64 v[10:11], v[0:1], off offset:40\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s1, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s1, v4, s1, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s0, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 15\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_5\n.LBB3_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 14\n\tscratch_load_b64 v[2:3], off, s33 offset:144 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:160 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:152 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[4:5], off\n\tglobal_load_b64 v[10:11], v[7:8], off\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s2, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s2, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s2, v4, s2, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e64 s0, v[0:1], v[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:168 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 16\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_2\n; %bb.3:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 16\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.4:\n\tscratch_load_b64 v[0:1], off, s33 offset:168 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n.LBB3_5:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:136 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n.LBB3_6:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[4:5], s0, v[4:5]\n\tv_mov_b32_e32 v2, v4\n\tv_readfirstlane_b32 s4, v3\n\tv_readfirstlane_b32 s2, v2\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr3\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s5\n\ts_lshl_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s0, 0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s0\n\ts_or_b64 s[2:3], s[2:3], s[4:5]\n\tv_writelane_b32 v26, s2, 17\n\tv_writelane_b32 v26, s3, 18\n\tglobal_load_b64 v[2:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:200 ; 8-byte Folded Spill\n\ts_mov_b64 s[6:7], 40\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s7\n\tv_add_co_u32 v2, s4, v2, s4\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tglobal_load_b64 v[3:4], v[0:1], off offset:40\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v4\n\tv_and_b32_e64 v2, s0, v2\n\ts_mov_b32 s0, s2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_and_b32_e64 v3, s0, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tscratch_store_b64 off, v[5:6], s33 offset:184 ; 8-byte Folded Spill\n\tglobal_load_b64 v[1:2], v[0:1], off offset:8\n\ts_mov_b32 s0, 12\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], exec\n\tv_writelane_b32 v26, s2, 19\n\tv_writelane_b32 v26, s3, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 21\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_8\n; %bb.7:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 19\n\tv_readlane_b32 s1, v26, 20\n\tscratch_load_b32 v2, off, s33 offset:96 ; 4-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v0\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[3:4], s2, v5, s3, 0\n\tv_mov_b32_e32 v9, v4\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s2\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v5\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[0:1], s2, v[0:1]\n\tv_mov_b32_e32 v5, v0\n\tv_mad_u64_u32 v[0:1], s3, v5, s3, v[9:10]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_lshlrev_b64 v[9:10], s2, v[0:1]\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v4, v3\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n\tv_mov_b32_e32 v3, v9\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v5, v1, v3\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s2, v0, v4\n\tv_add_co_ci_u32_e64 v3, s2, v1, v3, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tglobal_store_b32 v[0:1], v2, off offset:16\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tglobal_store_b64 v[0:1], v[2:3], off offset:8\n\tv_mov_b32_e32 v2, 1\n\tglobal_store_b32 v[0:1], v2, off offset:20\n.LBB3_8:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[2:3], off, s33 offset:84 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:76 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:68 ; 8-byte Folded Reload\n\tscratch_load_b64 v[8:9], off, s33 offset:60 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:52 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[14:15], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[16:17], off, s33 offset:28 ; 8-byte Folded Reload\n\tscratch_load_b64 v[22:23], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:24 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v18, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\ts_mov_b32 s0, 6\n\ts_waitcnt vmcnt(0)\n\tv_lshlrev_b64 v[20:21], s0, v[0:1]\n\tv_mov_b32_e32 v0, v22\n\tv_mov_b32_e32 v19, v20\n\tv_mov_b32_e32 v1, v23\n\tv_mov_b32_e32 v18, v21\n\tv_add_co_u32 v0, s0, v0, v19\n\tv_add_co_ci_u32_e64 v18, s0, v1, v18, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\tscratch_store_b64 off, v[0:1], s33 offset:216 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_mov_b64 s[4:5], 8\n\tv_mov_b32_e32 v16, v0\n\ts_mov_b32 s2, s4\n\tv_mov_b32_e32 v17, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v16, s2, v16, s2\n\tv_add_co_ci_u32_e64 v18, s0, v17, s0, s2\n ; kill: def $vgpr16 killed $vgpr16 def $vgpr16_vgpr17 killed $exec\n\tv_mov_b32_e32 v17, v18\n\tscratch_store_b64 off, v[16:17], s33 offset:208 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[14:15], off offset:8\n\tglobal_store_b64 v[0:1], v[12:13], off offset:16\n\tglobal_store_b64 v[0:1], v[10:11], off offset:24\n\tglobal_store_b64 v[0:1], v[8:9], off offset:32\n\tglobal_store_b64 v[0:1], v[6:7], off offset:40\n\tglobal_store_b64 v[0:1], v[4:5], off offset:48\n\tglobal_store_b64 v[0:1], v[2:3], off offset:56\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 22\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_13\n; %bb.9:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[5:6], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_mov_b64 s[4:5], 32\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:240 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:32 glc\n\ts_waitcnt vmcnt(1)\n\tglobal_load_b64 v[7:8], v[7:8], off\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v8\n\tv_and_b32_e64 v4, v4, s0\n\ts_mov_b32 s1, s2\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n\tv_and_b32_e64 v7, v7, s1\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v4, v7\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[9:10], s2, v4, s3, 0\n\tv_mov_b32_e32 v11, v10\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[7:8], s3, v4, s3, v[11:12]\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s3\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_lshlrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v11, v8\n ; kill: def $vgpr9 killed $vgpr9 killed $vgpr9_vgpr10 killed $exec\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v4, v10\n\tv_or_b32_e64 v4, v4, v11\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v7, v9\n\tv_or_b32_e64 v8, v7, v8\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v8\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v9\n\tv_add_co_u32 v4, s2, v4, v7\n\tv_add_co_ci_u32_e64 v6, s2, v5, v6, s2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:232 ; 8-byte Folded Spill\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v10, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 23\n\tv_writelane_b32 v26, s0, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 25\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_14\n.LBB3_10: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 24\n\tv_readlane_b32 s1, v26, 23\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[2:3], off, s33 offset:224 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:240 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:232 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s1, s3\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v10, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v26, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 26\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_10\n; %bb.11:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_branch .LBB3_14\n.LBB3_13:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB3_15\n.LBB3_14:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s15, v26, 2\n\tv_readlane_b32 s14, v26, 3\n\tv_readlane_b32 s13, v26, 4\n\tv_readlane_b32 s12, v26, 5\n\tv_readlane_b32 s10, v26, 6\n\tv_readlane_b32 s11, v26, 7\n\tv_readlane_b32 s8, v26, 8\n\tv_readlane_b32 s9, v26, 9\n\tv_readlane_b32 s6, v26, 0\n\tv_readlane_b32 s7, v26, 1\n\tv_readlane_b32 s4, v26, 10\n\tv_readlane_b32 s5, v26, 11\n\tscratch_load_b32 v31, off, s33 offset:132 ; 4-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hsa_signal_add@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hsa_signal_add@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v3, 0\n\tv_mov_b32_e32 v4, 3\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_branch .LBB3_13\n.LBB3_15:\n\tscratch_load_b64 v[6:7], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[3:4], s0, v2, s1, 0\n\tv_mov_b32_e32 v8, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[0:1]\n\tv_mov_b32_e32 v2, v0\n\tv_mad_u64_u32 v[0:1], s1, v2, s1, v[8:9]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\tv_mov_b32_e32 v5, v2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_mov_b32_e32 v0, v4\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v1, v3\n\tv_or_b32_e64 v4, v1, v2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v1, s0, v1, v3\n\tv_add_co_ci_u32_e64 v0, s0, v0, v2, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[2:3], 20\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:248 ; 8-byte Folded Spill\n.LBB3_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 27\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_18\n; %bb.17: ; in Loop: Header=BB3_16 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:248 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 1\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n.LBB3_18: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s33 offset:256 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s1, v0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0\n\ts_cmp_eq_u32 s1, s2\n\tv_writelane_b32 v26, s0, 28\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_cbranch_scc1 .LBB3_20\n; %bb.19: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_sleep 1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v26, s0, 28\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n.LBB3_20: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 28\n\tv_cndmask_b32_e64 v0, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v0, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccnz .LBB3_16\n; %bb.21:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:208 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:216 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:268 ; 8-byte Folded Spill\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:260 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 29\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_27\n; %bb.22:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[11:12], v[2:3], off\n\ts_mov_b64 s[4:5], 1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v11\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v12\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v4, v2\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v3\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_eq_u64_e64 s0, v[4:5], s[0:1]\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v5\n\tv_cndmask_b32_e64 v10, v6, v7, s0\n\tv_mov_b32_e32 v3, v2\n\tv_mov_b32_e32 v2, v4\n\tv_cndmask_b32_e64 v4, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v2, v8\n\tv_mov_b32_e32 v3, v9\n\tscratch_store_b64 off, v[2:3], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 24\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v5, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v5\n\tscratch_store_b64 off, v[2:3], s33 offset:292 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\tglobal_load_b64 v[6:7], v[0:1], off\n\tv_mov_b32_e32 v5, v9\n\tv_mov_b32_e32 v13, v12\n\tv_and_b32_e64 v5, v5, v13\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v11\n\tv_and_b32_e64 v8, v8, v9\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[11:12], s0, v5, s1, 0\n\tv_mov_b32_e32 v13, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\tv_mov_b32_e32 v14, v5\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v5, v8\n\tv_mad_u64_u32 v[8:9], s1, v5, s1, v[13:14]\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s1\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_lshlrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v13, v9\n ; kill: def $vgpr11 killed $vgpr11 killed $vgpr11_vgpr12 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\tv_mov_b32_e32 v5, v12\n\tv_or_b32_e64 v5, v5, v13\n\tv_mov_b32_e32 v9, v8\n\tv_mov_b32_e32 v8, v11\n\tv_or_b32_e64 v11, v8, v9\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v8, v11\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v7, v12\n\tv_add_co_u32 v5, s0, v5, v8\n\tv_add_co_ci_u32_e64 v7, s0, v6, v7, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[5:6], s33 offset:284 ; 8-byte Folded Spill\n\tglobal_store_b64 v[5:6], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 30\n\tv_writelane_b32 v26, s0, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s0, 0\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_26\n.LBB3_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v25, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v25, 31\n\tv_readlane_b32 s1, v25, 30\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[2:3], off, s33 offset:276 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:300 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:284 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[6:7], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v10, v5\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v25, s1, 30\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v25, s1, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v25, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_23\n; %bb.24:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.25:\n.LBB3_26:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 0\n\ts_or_b32 exec_lo, exec_lo, s0\n.LBB3_27:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[3:4], off, s33 offset:260 ; 8-byte Folded Reload\n\tscratch_load_b64 v[1:2], off, s33 offset:268 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v4\n\tv_readlane_b32 s30, v24, 0\n\tv_readlane_b32 s31, v24, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v24, off, s33 offset:308 ; 4-byte Folded Reload\n\tscratch_load_b32 v25, off, s33 offset:312 ; 4-byte Folded Reload\n\tscratch_load_b32 v26, off, s33 offset:316 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffeb0\n\ts_mov_b32 s33, s18\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end3:\n\t.size\t__ockl_hostcall_internal, .Lfunc_end3-__ockl_hostcall_internal\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 5344\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 392\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_preview\n\t.type\t__ockl_hostcall_preview,@function\n__ockl_hostcall_preview: ; @__ockl_hostcall_preview\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v27, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_writelane_b32 v27, s33, 0\n\tv_writelane_b32 v27, s30, 1\n\tv_writelane_b32 v27, s31, 2\n\tv_mov_b32_e32 v18, v16\n\tv_mov_b32_e32 v17, v15\n\tv_mov_b32_e32 v16, v14\n\tv_mov_b32_e32 v15, v13\n\tv_mov_b32_e32 v14, v12\n\tv_mov_b32_e32 v13, v11\n\tv_mov_b32_e32 v12, v10\n\tv_mov_b32_e32 v11, v9\n\tv_mov_b32_e32 v10, v8\n\tv_mov_b32_e32 v9, v7\n\tv_mov_b32_e32 v8, v6\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s0, s[0:1], 0x0\n\ts_mov_b32 s1, 0x1f4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s0, s1\n\ts_mov_b32 s1, 0x50\n\ts_mov_b32 s0, 24\n\ts_cselect_b32 s0, s0, s1\n\ts_load_b64 s[0:1], s[8:9], s0 offset:0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_internal@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_internal@rel32@hi+12\n\tv_mov_b32_e32 v0, s3\n\tv_mov_b32_e32 v1, s2\n\tv_readlane_b32 s30, v27, 1\n\tv_readlane_b32 s31, v27, 2\n\tv_readlane_b32 s33, v27, 0\n\ts_xor_saveexec_b32 s2, -1\n\tscratch_load_b32 v27, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s2\n\ts_setpc_b64 s[0:1]\n.Lfunc_end4:\n\t.size\t__ockl_hostcall_preview, .Lfunc_end4-__ockl_hostcall_preview\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 272\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 400\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_stderr_begin\n\t.type\t__ockl_fprintf_stderr_begin,@function\n__ockl_fprintf_stderr_begin: ; @__ockl_fprintf_stderr_begin\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v1, 33\n\tv_mov_b32_e32 v3, 1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v2, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end5:\n\t.size\t__ockl_fprintf_stderr_begin, .Lfunc_end5-__ockl_fprintf_stderr_begin\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 228\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 416\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_string_n\n\t.type\t__ockl_fprintf_append_string_n,@function\n__ockl_fprintf_append_string_n: ; @__ockl_fprintf_append_string_n\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s20, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v32, s33 offset:704 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v33, s33 offset:708 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v34, s33 offset:712 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x2d0\n\tv_writelane_b32 v32, s30, 0\n\tv_writelane_b32 v32, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:68 ; 4-byte Folded Spill\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s6, 0\n\tv_writelane_b32 v34, s7, 1\n\tscratch_store_b32 off, v6, s33 offset:60 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v5, s33 offset:56 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v4, s33 offset:64 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v6, v3\n\tscratch_load_b32 v3, off, s33 offset:64 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v2\n\tscratch_load_b32 v2, off, s33 offset:60 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v4, s33 offset:52 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v7, v1\n\tscratch_load_b32 v1, off, s33 offset:56 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v5, v0\n\tscratch_load_b32 v0, off, s33 offset:52 ; 4-byte Folded Reload\n\tv_writelane_b32 v34, s15, 2\n\tv_writelane_b32 v34, s14, 3\n\tv_writelane_b32 v34, s13, 4\n\tv_writelane_b32 v34, s12, 5\n\tv_writelane_b32 v34, s10, 6\n\tv_writelane_b32 v34, s11, 7\n\tv_writelane_b32 v34, s8, 8\n\tv_writelane_b32 v34, s9, 9\n\tv_writelane_b32 v34, s4, 10\n\tv_writelane_b32 v34, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[3:4], s33 offset:44 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b64 off, v[3:4], s33 offset:36 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\tv_cmp_eq_u32_e64 s0, v2, s0\n\tv_mov_b32_e32 v4, v6\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v2, v4, s1\n\tv_mov_b32_e32 v3, v5\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v5, v3, s1\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v2, v6\n\tv_cndmask_b32_e64 v4, v2, v4, s0\n\tv_mov_b32_e32 v2, v5\n\tv_cndmask_b32_e64 v2, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:28 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s0, v[0:1], s[0:1]\n ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr7\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tv_mov_b32_e32 v2, s6\n\tv_mov_b32_e32 v3, s7\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_3\n\ts_branch .LBB6_2\n.LBB6_1:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v34, 2\n\tv_readlane_b32 s14, v34, 3\n\tv_readlane_b32 s13, v34, 4\n\tv_readlane_b32 s12, v34, 5\n\tv_readlane_b32 s10, v34, 6\n\tv_readlane_b32 s11, v34, 7\n\tv_readlane_b32 s8, v34, 8\n\tv_readlane_b32 s9, v34, 9\n\tv_readlane_b32 s6, v34, 0\n\tv_readlane_b32 s7, v34, 1\n\tv_readlane_b32 s4, v34, 10\n\tv_readlane_b32 s5, v34, 11\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v3\n\tv_and_b32_e64 v4, v0, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v1\n\ts_mov_b64 s[0:1], 32\n\ts_mov_b32 s2, s1\n\tv_or_b32_e64 v4, v4, s2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_or_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v16, 0\n\tscratch_store_b32 off, v16, s33 offset:88 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_mov_b32_e32 v6, v1\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v4, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v2, v5\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_branch .LBB6_63\n.LBB6_2:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b64 v[4:5], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b64 s[0:1], 2\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v8, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v2, v0, s0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v8\n\tscratch_store_b64 off, v[2:3], s33 offset:124 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], -3\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v2, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v10, v1\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\ts_mov_b64 s[2:3], 0\n\ts_mov_b32 s0, s3\n\ts_mov_b32 s1, s2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v9, s1\n\tv_mov_b32_e32 v8, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v2, v9\n\tv_mov_b32_e32 v3, v8\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v34, s0, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:92 ; 16-byte Folded Spill\n\ts_branch .LBB6_4\n.LBB6_3:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b128 v[0:3], off, s33 offset:12 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 14\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_63\n\ts_branch .LBB6_1\n.LBB6_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_group_id\n\t.type\t__ockl_get_group_id,@function\n__ockl_get_group_id: ; @__ockl_get_group_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s14, 0\n\tv_writelane_b32 v2, s13, 1\n\tv_writelane_b32 v2, s12, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n; %bb.1:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n\ts_branch .LBB10_9\n.LBB10_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 6\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 7\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_12\n; %bb.6:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB10_12\n.LBB10_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 8\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_11\n; %bb.8:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB10_11\n.LBB10_9:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n.LBB10_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB10_7\n.LBB10_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB10_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_group_id, .Lfunc_end10-__ockl_get_group_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 988\n; NumSgprs: 33\n; NumVgprs: 3\n; ScratchSize: 40\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_size\n\t.type\t__ockl_get_local_size,@function\n__ockl_get_local_size: ; @__ockl_get_local_size\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s32 offset:104 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr4 : SGPR spill to VGPR lane\n\tv_writelane_b32 v4, s14, 0\n\tv_writelane_b32 v4, s13, 1\n\tv_writelane_b32 v4, s12, 2\n\tv_writelane_b32 v4, s8, 3\n\tv_writelane_b32 v4, s9, 4\n\tv_writelane_b32 v4, s4, 5\n\tv_writelane_b32 v4, s5, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_10\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_20\n\ts_branch .LBB11_15\n.LBB11_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 7\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 10\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 11\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_24\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 12\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_9\n.LBB11_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 12\n\tscratch_load_b64 v[0:1], off, s32 offset:48 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_23\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 2\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_load_b32 s0, s[2:3], 0xc\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_branch .LBB11_23\n.LBB11_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 2\n\ts_load_b32 s3, s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 18\n\ts_mov_b32 s2, 12\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_7\n.LBB11_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 8\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_22\n; %bb.11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_14\n.LBB11_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 14\n\tscratch_load_b64 v[0:1], off, s32 offset:72 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_21\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 1\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_load_b32 s0, s[2:3], 0x10\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_branch .LBB11_21\n.LBB11_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 1\n\ts_load_b32 s3, s[0:1], 0x4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 20\n\ts_mov_b32 s2, 14\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_12\n.LBB11_15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 15\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_18\n.LBB11_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 15\n\tscratch_load_b64 v[0:1], off, s32 offset:88 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_19\n; %bb.17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 0\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_load_b32 s0, s[2:3], 0x14\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_branch .LBB11_19\n.LBB11_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 0\n\ts_load_b32 s3, s[0:1], 0x8\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 22\n\ts_mov_b32 s2, 16\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 15\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_16\n.LBB11_19:\n\tscratch_load_b64 v[0:1], off, s32 offset:96 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n.LBB11_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 9\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:24 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_branch .LBB11_10\n.LBB11_21:\n\tscratch_load_b64 v[0:1], off, s32 offset:80 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n.LBB11_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:64 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_branch .LBB11_4\n.LBB11_23:\n\tscratch_load_b64 v[0:1], off, s32 offset:56 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n.LBB11_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:40 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n.LBB11_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[2:3], off, s32 offset:32 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s32 offset:104 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end11:\n\t.size\t__ockl_get_local_size, .Lfunc_end11-__ockl_get_local_size\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2384\n; NumSgprs: 35\n; NumVgprs: 5\n; ScratchSize: 112\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_10\n\ts_branch .LBB12_9\n.LBB12_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB12_12\n.LBB12_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB12_11\n.LBB12_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB12_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB12_7\n.LBB12_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB12_4\n.LBB12_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB12_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end12:\n\t.size\t__ockl_get_local_id, .Lfunc_end12-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z27d_do_permutation_generic_f1PiS_S_i ; -- Begin function _Z27d_do_permutation_generic_f1PiS_S_i\n\t.globl\t_Z27d_do_permutation_generic_f1PiS_S_i\n\t.p2align\t8\n\t.type\t_Z27d_do_permutation_generic_f1PiS_S_i,@function\n_Z27d_do_permutation_generic_f1PiS_S_i: ; @_Z27d_do_permutation_generic_f1PiS_S_i\n; %bb.0:\n\ts_mov_b32 s32, 0x70\n ; implicit-def: $vgpr11 : SGPR spill to VGPR lane\n\tv_writelane_b32 v11, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v11, 0\n\tv_writelane_b32 v11, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v11, 1\n\tv_writelane_b32 v11, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v11, s10, 3\n\tv_writelane_b32 v11, s11, 4\n\tv_writelane_b32 v11, s2, 5\n\tv_writelane_b32 v11, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v11, 5\n\tv_readlane_b32 s1, v11, 6\n\tv_writelane_b32 v11, s4, 7\n\tv_writelane_b32 v11, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:96 ; 4-byte Folded Spill\n\ts_load_b64 s[30:31], s[0:1], 0x0\n\ts_load_b64 s[26:27], s[0:1], 0x8\n\ts_load_b64 s[22:23], s[0:1], 0x10\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v11, s3, 9\n\ts_mov_b32 s28, 32\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s3\n\ts_mov_b32 s24, 40\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s20, 48\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\ts_mov_b32 s18, 56\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b64 s[6:7], s[18:19]\n\tv_writelane_b32 v11, s6, 10\n\tv_writelane_b32 v11, s7, 11\n\ts_mov_b32 s16, 64\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v11, s6, 12\n\tv_writelane_b32 v11, s7, 13\n\ts_mov_b32 s8, 0x48\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v11, s6, 14\n\tv_writelane_b32 v11, s7, 15\n\ts_mov_b32 s6, 0x50\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[34:35], s[6:7]\n\tv_writelane_b32 v11, s34, 16\n\tv_writelane_b32 v11, s35, 17\n\ts_mov_b32 s34, 0x54\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v11, s34, 18\n\tv_writelane_b32 v11, s35, 19\n\tv_writelane_b32 v11, s34, 20\n\tv_writelane_b32 v11, s35, 21\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s30\n\tv_mov_b32_e32 v3, s31\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v11, s8, 22\n\tv_writelane_b32 v11, s9, 23\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v11, s2, 24\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s8, v11, 22\n\tv_readlane_b32 s9, v11, 23\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_readlane_b32 s8, v11, 22\n\tv_readlane_b32 s9, v11, 23\n\tv_readlane_b32 s2, v11, 24\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v3, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:92 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v11, 18\n\tv_readlane_b32 s3, v11, 19\n\tv_readlane_b32 s0, v11, 24\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v11, s0, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB13_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v11, 16\n\tv_readlane_b32 s3, v11, 17\n\tv_readlane_b32 s4, v11, 20\n\tv_readlane_b32 s5, v11, 21\n\tv_readlane_b32 s0, v11, 26\n\tv_readlane_b32 s1, v11, 25\n\tv_writelane_b32 v11, s1, 27\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 28\n\tv_writelane_b32 v11, s0, 29\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v11, s0, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_3\n; %bb.2: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 28\n\tv_readlane_b32 s2, v11, 20\n\tv_readlane_b32 s3, v11, 21\n\tv_readlane_b32 s4, v11, 14\n\tv_readlane_b32 s5, v11, 15\n\tv_readlane_b32 s6, v11, 12\n\tv_readlane_b32 s7, v11, 13\n\tv_readlane_b32 s8, v11, 10\n\tv_readlane_b32 s9, v11, 11\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, 2\n\tv_lshlrev_b64 v[5:6], s1, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v5\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v6\n\tv_add_co_u32 v0, s8, v0, v3\n\tv_add_co_ci_u32_e64 v2, s8, v1, v2, s8\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[7:8], v[0:1]\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[9:10], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s4, v0, v4\n\tv_add_co_ci_u32_e64 v3, s4, v1, v3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tv_lshlrev_b64 v[5:6], s1, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s1, v0, v4\n\tv_add_co_ci_u32_e64 v3, s1, v1, v3, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0x1fffe00\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 29\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB13_3: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v11, 27\n\tv_readlane_b32 s1, v11, 29\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v11, s1, 26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB13_1\n; %bb.4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.5:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z27d_do_permutation_generic_f1PiS_S_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 224\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 36\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end13:\n\t.size\t_Z27d_do_permutation_generic_f1PiS_S_i, .Lfunc_end13-_Z27d_do_permutation_generic_f1PiS_S_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1800\n; NumSgprs: 38\n; NumVgprs: 32\n; ScratchSize: 224\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 38\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.protected\t_Z27d_do_permutation_generic_f2PiS_S_i ; -- Begin function _Z27d_do_permutation_generic_f2PiS_S_i\n\t.globl\t_Z27d_do_permutation_generic_f2PiS_S_i\n\t.p2align\t8\n\t.type\t_Z27d_do_permutation_generic_f2PiS_S_i,@function\n_Z27d_do_permutation_generic_f2PiS_S_i: ; @_Z27d_do_permutation_generic_f2PiS_S_i\n; %bb.0:\n\ts_mov_b32 s32, 0x70\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_writelane_b32 v10, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v10, 0\n\tv_writelane_b32 v10, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v10, 1\n\tv_writelane_b32 v10, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v10, s10, 3\n\tv_writelane_b32 v10, s11, 4\n\tv_writelane_b32 v10, s2, 5\n\tv_writelane_b32 v10, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v10, 5\n\tv_readlane_b32 s1, v10, 6\n\tv_writelane_b32 v10, s4, 7\n\tv_writelane_b32 v10, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:96 ; 4-byte Folded Spill\n\ts_load_b64 s[30:31], s[0:1], 0x0\n\ts_load_b64 s[26:27], s[0:1], 0x8\n\ts_load_b64 s[22:23], s[0:1], 0x10\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v10, s3, 9\n\ts_mov_b32 s28, 32\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s3\n\ts_mov_b32 s24, 40\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s20, 48\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\ts_mov_b32 s18, 56\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b64 s[6:7], s[18:19]\n\tv_writelane_b32 v10, s6, 10\n\tv_writelane_b32 v10, s7, 11\n\ts_mov_b32 s16, 64\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v10, s6, 12\n\tv_writelane_b32 v10, s7, 13\n\ts_mov_b32 s8, 0x48\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v10, s6, 14\n\tv_writelane_b32 v10, s7, 15\n\ts_mov_b32 s6, 0x50\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[34:35], s[6:7]\n\tv_writelane_b32 v10, s34, 16\n\tv_writelane_b32 v10, s35, 17\n\ts_mov_b32 s34, 0x54\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v10, s34, 18\n\tv_writelane_b32 v10, s35, 19\n\tv_writelane_b32 v10, s34, 20\n\tv_writelane_b32 v10, s35, 21\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s30\n\tv_mov_b32_e32 v3, s31\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v10, s8, 22\n\tv_writelane_b32 v10, s9, 23\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v10, s2, 24\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s8, v10, 22\n\tv_readlane_b32 s9, v10, 23\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_readlane_b32 s8, v10, 22\n\tv_readlane_b32 s9, v10, 23\n\tv_readlane_b32 s2, v10, 24\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v3, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:92 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v10, 18\n\tv_readlane_b32 s3, v10, 19\n\tv_readlane_b32 s0, v10, 24\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v10, s0, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB14_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v10, 16\n\tv_readlane_b32 s3, v10, 17\n\tv_readlane_b32 s4, v10, 20\n\tv_readlane_b32 s5, v10, 21\n\tv_readlane_b32 s0, v10, 26\n\tv_readlane_b32 s1, v10, 25\n\tv_writelane_b32 v10, s1, 27\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 28\n\tv_writelane_b32 v10, s0, 29\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB14_3\n; %bb.2: ; in Loop: Header=BB14_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 28\n\tv_readlane_b32 s2, v10, 20\n\tv_readlane_b32 s3, v10, 21\n\tv_readlane_b32 s4, v10, 12\n\tv_readlane_b32 s5, v10, 13\n\tv_readlane_b32 s6, v10, 14\n\tv_readlane_b32 s7, v10, 15\n\tv_readlane_b32 s8, v10, 10\n\tv_readlane_b32 s9, v10, 11\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v3, s6\n\tv_mov_b32_e32 v4, s7\n\tflat_load_b64 v[8:9], v[3:4]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, 2\n\tv_lshlrev_b64 v[5:6], s1, v[3:4]\n\tv_mov_b32_e32 v3, v8\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v4, v6\n\tv_add_co_u32 v3, s6, v3, v7\n\tv_add_co_ci_u32_e64 v0, s6, v0, v4, s6\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_lshlrev_b64 v[7:8], s1, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v7\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v8\n\tv_add_co_u32 v0, s1, v0, v3\n\tv_add_co_ci_u32_e64 v2, s1, v1, v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[7:8], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s1, v0, v4\n\tv_add_co_ci_u32_e64 v3, s1, v1, v3, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0x1fffe00\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 29\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB14_3: ; in Loop: Header=BB14_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v10, 27\n\tv_readlane_b32 s1, v10, 29\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v10, s1, 26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB14_1\n; %bb.4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.5:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z27d_do_permutation_generic_f2PiS_S_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 224\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 36\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end14:\n\t.size\t_Z27d_do_permutation_generic_f2PiS_S_i, .Lfunc_end14-_Z27d_do_permutation_generic_f2PiS_S_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1800\n; NumSgprs: 38\n; NumVgprs: 32\n; ScratchSize: 224\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 38\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.protected\t_Z27d_do_permutation_generic_f1PfS_Pii ; -- Begin function _Z27d_do_permutation_generic_f1PfS_Pii\n\t.globl\t_Z27d_do_permutation_generic_f1PfS_Pii\n\t.p2align\t8\n\t.type\t_Z27d_do_permutation_generic_f1PfS_Pii,@function\n_Z27d_do_permutation_generic_f1PfS_Pii: ; @_Z27d_do_permutation_generic_f1PfS_Pii\n; %bb.0:\n\ts_mov_b32 s32, 0x70\n ; implicit-def: $vgpr11 : SGPR spill to VGPR lane\n\tv_writelane_b32 v11, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v11, 0\n\tv_writelane_b32 v11, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v11, 1\n\tv_writelane_b32 v11, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v11, s10, 3\n\tv_writelane_b32 v11, s11, 4\n\tv_writelane_b32 v11, s2, 5\n\tv_writelane_b32 v11, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v11, 5\n\tv_readlane_b32 s1, v11, 6\n\tv_writelane_b32 v11, s4, 7\n\tv_writelane_b32 v11, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:96 ; 4-byte Folded Spill\n\ts_load_b64 s[30:31], s[0:1], 0x0\n\ts_load_b64 s[26:27], s[0:1], 0x8\n\ts_load_b64 s[22:23], s[0:1], 0x10\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v11, s3, 9\n\ts_mov_b32 s28, 32\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s3\n\ts_mov_b32 s24, 40\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s20, 48\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\ts_mov_b32 s18, 56\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b64 s[6:7], s[18:19]\n\tv_writelane_b32 v11, s6, 10\n\tv_writelane_b32 v11, s7, 11\n\ts_mov_b32 s16, 64\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v11, s6, 12\n\tv_writelane_b32 v11, s7, 13\n\ts_mov_b32 s8, 0x48\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v11, s6, 14\n\tv_writelane_b32 v11, s7, 15\n\ts_mov_b32 s6, 0x50\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[34:35], s[6:7]\n\tv_writelane_b32 v11, s34, 16\n\tv_writelane_b32 v11, s35, 17\n\ts_mov_b32 s34, 0x54\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v11, s34, 18\n\tv_writelane_b32 v11, s35, 19\n\tv_writelane_b32 v11, s34, 20\n\tv_writelane_b32 v11, s35, 21\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s30\n\tv_mov_b32_e32 v3, s31\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v11, s8, 22\n\tv_writelane_b32 v11, s9, 23\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v11, s2, 24\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s8, v11, 22\n\tv_readlane_b32 s9, v11, 23\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_readlane_b32 s8, v11, 22\n\tv_readlane_b32 s9, v11, 23\n\tv_readlane_b32 s2, v11, 24\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v3, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:92 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v11, 18\n\tv_readlane_b32 s3, v11, 19\n\tv_readlane_b32 s0, v11, 24\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v11, s0, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB15_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v11, 16\n\tv_readlane_b32 s3, v11, 17\n\tv_readlane_b32 s4, v11, 20\n\tv_readlane_b32 s5, v11, 21\n\tv_readlane_b32 s0, v11, 26\n\tv_readlane_b32 s1, v11, 25\n\tv_writelane_b32 v11, s1, 27\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 28\n\tv_writelane_b32 v11, s0, 29\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v11, s0, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB15_3\n; %bb.2: ; in Loop: Header=BB15_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 28\n\tv_readlane_b32 s2, v11, 20\n\tv_readlane_b32 s3, v11, 21\n\tv_readlane_b32 s4, v11, 14\n\tv_readlane_b32 s5, v11, 15\n\tv_readlane_b32 s6, v11, 12\n\tv_readlane_b32 s7, v11, 13\n\tv_readlane_b32 s8, v11, 10\n\tv_readlane_b32 s9, v11, 11\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, 2\n\tv_lshlrev_b64 v[5:6], s1, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v5\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v6\n\tv_add_co_u32 v0, s8, v0, v3\n\tv_add_co_ci_u32_e64 v2, s8, v1, v2, s8\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[7:8], v[0:1]\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[9:10], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s4, v0, v4\n\tv_add_co_ci_u32_e64 v3, s4, v1, v3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tv_lshlrev_b64 v[5:6], s1, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s1, v0, v4\n\tv_add_co_ci_u32_e64 v3, s1, v1, v3, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0x1fffe00\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 29\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB15_3: ; in Loop: Header=BB15_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v11, 27\n\tv_readlane_b32 s1, v11, 29\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v11, s1, 26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v11, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB15_1\n; %bb.4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v11, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.5:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z27d_do_permutation_generic_f1PfS_Pii\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 224\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 36\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end15:\n\t.size\t_Z27d_do_permutation_generic_f1PfS_Pii, .Lfunc_end15-_Z27d_do_permutation_generic_f1PfS_Pii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1800\n; NumSgprs: 38\n; NumVgprs: 32\n; ScratchSize: 224\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 38\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.protected\t_Z27d_do_permutation_generic_f2PfS_Pii ; -- Begin function _Z27d_do_permutation_generic_f2PfS_Pii\n\t.globl\t_Z27d_do_permutation_generic_f2PfS_Pii\n\t.p2align\t8\n\t.type\t_Z27d_do_permutation_generic_f2PfS_Pii,@function\n_Z27d_do_permutation_generic_f2PfS_Pii: ; @_Z27d_do_permutation_generic_f2PfS_Pii\n; %bb.0:\n\ts_mov_b32 s32, 0x70\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_writelane_b32 v10, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v10, 0\n\tv_writelane_b32 v10, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v10, 1\n\tv_writelane_b32 v10, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v10, s10, 3\n\tv_writelane_b32 v10, s11, 4\n\tv_writelane_b32 v10, s2, 5\n\tv_writelane_b32 v10, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v10, 5\n\tv_readlane_b32 s1, v10, 6\n\tv_writelane_b32 v10, s4, 7\n\tv_writelane_b32 v10, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:96 ; 4-byte Folded Spill\n\ts_load_b64 s[30:31], s[0:1], 0x0\n\ts_load_b64 s[26:27], s[0:1], 0x8\n\ts_load_b64 s[22:23], s[0:1], 0x10\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v10, s3, 9\n\ts_mov_b32 s28, 32\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s3\n\ts_mov_b32 s24, 40\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s20, 48\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\ts_mov_b32 s18, 56\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b64 s[6:7], s[18:19]\n\tv_writelane_b32 v10, s6, 10\n\tv_writelane_b32 v10, s7, 11\n\ts_mov_b32 s16, 64\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v10, s6, 12\n\tv_writelane_b32 v10, s7, 13\n\ts_mov_b32 s8, 0x48\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v10, s6, 14\n\tv_writelane_b32 v10, s7, 15\n\ts_mov_b32 s6, 0x50\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[34:35], s[6:7]\n\tv_writelane_b32 v10, s34, 16\n\tv_writelane_b32 v10, s35, 17\n\ts_mov_b32 s34, 0x54\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v10, s34, 18\n\tv_writelane_b32 v10, s35, 19\n\tv_writelane_b32 v10, s34, 20\n\tv_writelane_b32 v10, s35, 21\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s30\n\tv_mov_b32_e32 v3, s31\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v10, s8, 22\n\tv_writelane_b32 v10, s9, 23\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v10, s2, 24\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s8, v10, 22\n\tv_readlane_b32 s9, v10, 23\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:92 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_readlane_b32 s8, v10, 22\n\tv_readlane_b32 s9, v10, 23\n\tv_readlane_b32 s2, v10, 24\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v3, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:92 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v10, 18\n\tv_readlane_b32 s3, v10, 19\n\tv_readlane_b32 s0, v10, 24\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v10, s0, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB16_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v10, 16\n\tv_readlane_b32 s3, v10, 17\n\tv_readlane_b32 s4, v10, 20\n\tv_readlane_b32 s5, v10, 21\n\tv_readlane_b32 s0, v10, 26\n\tv_readlane_b32 s1, v10, 25\n\tv_writelane_b32 v10, s1, 27\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 28\n\tv_writelane_b32 v10, s0, 29\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 30\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB16_3\n; %bb.2: ; in Loop: Header=BB16_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 28\n\tv_readlane_b32 s2, v10, 20\n\tv_readlane_b32 s3, v10, 21\n\tv_readlane_b32 s4, v10, 12\n\tv_readlane_b32 s5, v10, 13\n\tv_readlane_b32 s6, v10, 14\n\tv_readlane_b32 s7, v10, 15\n\tv_readlane_b32 s8, v10, 10\n\tv_readlane_b32 s9, v10, 11\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v3, s6\n\tv_mov_b32_e32 v4, s7\n\tflat_load_b64 v[8:9], v[3:4]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, 2\n\tv_lshlrev_b64 v[5:6], s1, v[3:4]\n\tv_mov_b32_e32 v3, v8\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v4, v6\n\tv_add_co_u32 v3, s6, v3, v7\n\tv_add_co_ci_u32_e64 v0, s6, v0, v4, s6\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_lshlrev_b64 v[7:8], s1, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v7\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v8\n\tv_add_co_u32 v0, s1, v0, v3\n\tv_add_co_ci_u32_e64 v2, s1, v1, v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[7:8], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s1, v0, v4\n\tv_add_co_ci_u32_e64 v3, s1, v1, v3, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0x1fffe00\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 29\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB16_3: ; in Loop: Header=BB16_1 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v10, 27\n\tv_readlane_b32 s1, v10, 29\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v10, s1, 26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v10, off offset:88 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB16_1\n; %bb.4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v10, off, off offset:88 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.5:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z27d_do_permutation_generic_f2PfS_Pii\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 224\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 36\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end16:\n\t.size\t_Z27d_do_permutation_generic_f2PfS_Pii, .Lfunc_end16-_Z27d_do_permutation_generic_f2PfS_Pii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1800\n; NumSgprs: 38\n; NumVgprs: 32\n; ScratchSize: 224\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 38\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.protected\t_Z32d_do_permutation_generic_inversePiS_i ; -- Begin function _Z32d_do_permutation_generic_inversePiS_i\n\t.globl\t_Z32d_do_permutation_generic_inversePiS_i\n\t.p2align\t8\n\t.type\t_Z32d_do_permutation_generic_inversePiS_i,@function\n_Z32d_do_permutation_generic_inversePiS_i: ; @_Z32d_do_permutation_generic_inversePiS_i\n; %bb.0:\n\ts_mov_b32 s32, 0x60\n ; implicit-def: $vgpr11 : SGPR spill to VGPR lane\n\tv_writelane_b32 v11, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v11, 0\n\tv_writelane_b32 v11, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v11, 1\n\tv_writelane_b32 v11, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v11, s10, 3\n\tv_writelane_b32 v11, s11, 4\n\tv_writelane_b32 v11, s2, 5\n\tv_writelane_b32 v11, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v11, 5\n\tv_readlane_b32 s1, v11, 6\n\tv_writelane_b32 v11, s4, 7\n\tv_writelane_b32 v11, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:80 ; 4-byte Folded Spill\n\ts_load_b64 s[24:25], s[0:1], 0x0\n\ts_load_b64 s[20:21], s[0:1], 0x8\n\ts_load_b32 s2, s[0:1], 0x10\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s22, 32\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s18, 40\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b32 s16, 48\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v11, s6, 9\n\tv_writelane_b32 v11, s7, 10\n\ts_mov_b32 s8, 56\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v11, s6, 11\n\tv_writelane_b32 v11, s7, 12\n\ts_mov_b32 s6, 64\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[26:27], s[6:7]\n\tv_writelane_b32 v11, s26, 13\n\tv_writelane_b32 v11, s27, 14\n\ts_mov_b32 s26, 0x44\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v11, s26, 15\n\tv_writelane_b32 v11, s27, 16\n\tv_writelane_b32 v11, s26, 17\n\tv_writelane_b32 v11, s27, 18\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v11, s8, 19\n\tv_writelane_b32 v11, s9, 20\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v11, s2, 21\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:80 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s8, v11, 19\n\tv_readlane_b32 s9, v11, 20\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:76 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:80 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v11, 0\n\tv_readlane_b32 s13, v11, 1\n\tv_readlane_b32 s12, v11, 2\n\tv_readlane_b32 s10, v11, 3\n\tv_readlane_b32 s11, v11, 4\n\tv_readlane_b32 s4, v11, 7\n\tv_readlane_b32 s5, v11, 8\n\tv_readlane_b32 s8, v11, 19\n\tv_readlane_b32 s9, v11, 20\n\tv_readlane_b32 s2, v11, 21\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v3, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:76 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v11, 15\n\tv_readlane_b32 s3, v11, 16\n\tv_readlane_b32 s0, v11, 21\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s1, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v11, s0, 22\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v11, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n.LBB17_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v11, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v11, 13\n\tv_readlane_b32 s3, v11, 14\n\tv_readlane_b32 s4, v11, 17\n\tv_readlane_b32 s5, v11, 18\n\tv_readlane_b32 s0, v11, 23\n\tv_readlane_b32 s1, v11, 22\n\tv_writelane_b32 v11, s1, 24\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 25\n\tv_writelane_b32 v11, s0, 26\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v11, s0, 27\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v11, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB17_3\n; %bb.2: ; in Loop: Header=BB17_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v11, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 25\n\tv_readlane_b32 s2, v11, 17\n\tv_readlane_b32 s3, v11, 18\n\tv_readlane_b32 s4, v11, 11\n\tv_readlane_b32 s5, v11, 12\n\tv_readlane_b32 s6, v11, 9\n\tv_readlane_b32 s7, v11, 10\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v2, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v2\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v1, v3\n\tv_mov_b32_e32 v3, s6\n\tv_mov_b32_e32 v4, s7\n\tflat_load_b64 v[7:8], v[3:4]\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b64 v[9:10], v[3:4]\n\ts_mov_b32 s1, 2\n\tv_lshlrev_b64 v[5:6], s1, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s4, v0, v4\n\tv_add_co_ci_u32_e64 v3, s4, v1, v3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tv_lshlrev_b64 v[5:6], s1, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s1, v0, v4\n\tv_add_co_ci_u32_e64 v3, s1, v1, v3, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0x1fffe00\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v11, s0, 26\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v11, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n.LBB17_3: ; in Loop: Header=BB17_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v11, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v11, 24\n\tv_readlane_b32 s1, v11, 26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v11, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 22\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v11, s1, 28\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v11, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB17_1\n; %bb.4:\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v11, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v11, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.5:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z32d_do_permutation_generic_inversePiS_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 208\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 33\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end17:\n\t.size\t_Z32d_do_permutation_generic_inversePiS_i, .Lfunc_end17-_Z32d_do_permutation_generic_inversePiS_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1608\n; NumSgprs: 35\n; NumVgprs: 32\n; ScratchSize: 208\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 35\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tblockIdx\n\t.protected\tblockDim\n\t.protected\tthreadIdx\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tblockIdx\n\t.weak\tblockDim\n\t.weak\tthreadIdx\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 112\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 120\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 128\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 136\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 232\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z27d_do_permutation_generic_f1PiS_S_i\n .private_segment_fixed_size: 224\n .sgpr_count: 38\n .sgpr_spill_count: 34\n .symbol: _Z27d_do_permutation_generic_f1PiS_S_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 6\n .wavefront_size: 32\n .workgroup_processor_mode: 1\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 112\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 120\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 128\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 136\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 232\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z27d_do_permutation_generic_f2PiS_S_i\n .private_segment_fixed_size: 224\n .sgpr_count: 38\n .sgpr_spill_count: 34\n .symbol: _Z27d_do_permutation_generic_f2PiS_S_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 6\n .wavefront_size: 32\n .workgroup_processor_mode: 1\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 112\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 120\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 128\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 136\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 232\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z27d_do_permutation_generic_f1PfS_Pii\n .private_segment_fixed_size: 224\n .sgpr_count: 38\n .sgpr_spill_count: 34\n .symbol: _Z27d_do_permutation_generic_f1PfS_Pii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 6\n .wavefront_size: 32\n .workgroup_processor_mode: 1\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 112\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 120\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 128\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 136\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 232\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z27d_do_permutation_generic_f2PfS_Pii\n .private_segment_fixed_size: 224\n .sgpr_count: 38\n .sgpr_spill_count: 34\n .symbol: _Z27d_do_permutation_generic_f2PfS_Pii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 6\n .wavefront_size: 32\n .workgroup_processor_mode: 1\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 104\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 112\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 120\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 128\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 224\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z32d_do_permutation_generic_inversePiS_i\n .private_segment_fixed_size: 208\n .sgpr_count: 35\n .sgpr_spill_count: 31\n .symbol: _Z32d_do_permutation_generic_inversePiS_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 6\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":80,"cells":{"id":{"kind":"string","value":"dd5e45b8023fb4492feb1d704722c453e30a9874_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18sumOfSquaresKernelPKfPfi --------------------------\n .section .text._Z18sumOfSquaresKernelPKfPfi,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=9\"\n .align 128\n\n\n\n\n .global _Z18sumOfSquaresKernelPKfPfi\n .type _Z18sumOfSquaresKernelPKfPfi,@function\n .size _Z18sumOfSquaresKernelPKfPfi,(.L_x_6 - _Z18sumOfSquaresKernelPKfPfi)\n .other _Z18sumOfSquaresKernelPKfPfi,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18sumOfSquaresKernelPKfPfi:\n.text._Z18sumOfSquaresKernelPKfPfi:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R2, SR_CTAID.X ;\n /*0020*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0030*/ S2R R6, SR_TID.X ;\n /*0040*/ IMAD R2, R2, c[0x0][0x0], R6 ;\n /*0050*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x170], PT ;\n /*0060*/ @!P0 MOV R3, 0x4 ;\n /*0070*/ @!P0 IMAD.WIDE R2, R2, R3, c[0x0][0x160] ;\n /*0080*/ @!P0 LDG.E R2, [R2.64] ;\n /*0090*/ ULDC UR4, c[0x0][0x0] ;\n /*00a0*/ IMAD.SHL.U32 R0, R6, 0x4, RZ ;\n /*00b0*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ;\n /*00c0*/ @P0 STS [R6.X4], RZ ;\n /*00d0*/ MOV R5, UR4 ;\n /*00e0*/ @!P0 FMUL R4, R2, R2 ;\n /*00f0*/ @!P0 STS [R6.X4], R4 ;\n /*0100*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0110*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ;\n /*0120*/ @!P0 BRA `(.L_x_0) ;\n.L_x_1:\n /*0130*/ ISETP.GE.AND P0, PT, R6, R5, PT ;\n /*0140*/ @!P0 IMAD R2, R5, 0x4, R0 ;\n /*0150*/ @!P0 LDS R3, [R6.X4] ;\n /*0160*/ SHF.R.U32.HI R5, RZ, 0x1, R5 ;\n /*0170*/ @!P0 LDS R2, [R2] ;\n /*0180*/ @!P0 FADD R3, R3, R2 ;\n /*0190*/ @!P0 STS [R6.X4], R3 ;\n /*01a0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*01b0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ;\n /*01c0*/ @P0 BRA `(.L_x_1) ;\n.L_x_0:\n /*01d0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ;\n /*01e0*/ @P0 EXIT ;\n /*01f0*/ LDS R5, [RZ] ;\n /*0200*/ MOV R2, c[0x0][0x168] ;\n /*0210*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x16c] ;\n /*0220*/ RED.E.ADD.F32.FTZ.RN.STRONG.GPU [R2.64], R5 ;\n /*0230*/ EXIT ;\n.L_x_2:\n /*0240*/ BRA `(.L_x_2);\n /*0250*/ NOP;\n /*0260*/ NOP;\n /*0270*/ NOP;\n /*0280*/ NOP;\n /*0290*/ NOP;\n /*02a0*/ NOP;\n /*02b0*/ NOP;\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n.L_x_6:\n\n\n//--------------------- .text._Z16dotProductKernelPKfS0_Pfi --------------------------\n .section .text._Z16dotProductKernelPKfS0_Pfi,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=11\"\n .align 128\n\n\n\n\n .global _Z16dotProductKernelPKfS0_Pfi\n .type _Z16dotProductKernelPKfS0_Pfi,@function\n .size _Z16dotProductKernelPKfS0_Pfi,(.L_x_7 - _Z16dotProductKernelPKfS0_Pfi)\n .other _Z16dotProductKernelPKfS0_Pfi,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z16dotProductKernelPKfS0_Pfi:\n.text._Z16dotProductKernelPKfS0_Pfi:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R2, SR_CTAID.X ;\n /*0020*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0030*/ S2R R8, SR_TID.X ;\n /*0040*/ IMAD R2, R2, c[0x0][0x0], R8 ;\n /*0050*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x178], PT ;\n /*0060*/ @!P0 MOV R3, 0x4 ;\n /*0070*/ @!P0 IMAD.WIDE R4, R2, R3, c[0x0][0x168] ;\n /*0080*/ @!P0 IMAD.WIDE R2, R2, R3, c[0x0][0x160] ;\n /*0090*/ @!P0 LDG.E R4, [R4.64] ;\n /*00a0*/ @!P0 LDG.E R3, [R2.64] ;\n /*00b0*/ ULDC UR4, c[0x0][0x0] ;\n /*00c0*/ IMAD.SHL.U32 R0, R8, 0x4, RZ ;\n /*00d0*/ USHF.R.U32.HI UR4, URZ, 0x1, UR4 ;\n /*00e0*/ @P0 STS [R8.X4], RZ ;\n /*00f0*/ MOV R7, UR4 ;\n /*0100*/ @!P0 FMUL R6, R4, R3 ;\n /*0110*/ @!P0 STS [R8.X4], R6 ;\n /*0120*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0130*/ ISETP.NE.AND P0, PT, RZ, UR4, PT ;\n /*0140*/ @!P0 BRA `(.L_x_3) ;\n.L_x_4:\n /*0150*/ ISETP.GE.AND P0, PT, R8, R7, PT ;\n /*0160*/ @!P0 IMAD R2, R7, 0x4, R0 ;\n /*0170*/ @!P0 LDS R3, [R8.X4] ;\n /*0180*/ SHF.R.U32.HI R7, RZ, 0x1, R7 ;\n /*0190*/ @!P0 LDS R2, [R2] ;\n /*01a0*/ @!P0 FADD R3, R3, R2 ;\n /*01b0*/ @!P0 STS [R8.X4], R3 ;\n /*01c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*01d0*/ ISETP.NE.AND P0, PT, R7, RZ, PT ;\n /*01e0*/ @P0 BRA `(.L_x_4) ;\n.L_x_3:\n /*01f0*/ ISETP.NE.AND P0, PT, R8, RZ, PT ;\n /*0200*/ @P0 EXIT ;\n /*0210*/ LDS R5, [RZ] ;\n /*0220*/ MOV R2, c[0x0][0x170] ;\n /*0230*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x174] ;\n /*0240*/ RED.E.ADD.F32.FTZ.RN.STRONG.GPU [R2.64], R5 ;\n /*0250*/ EXIT ;\n.L_x_5:\n /*0260*/ BRA `(.L_x_5);\n /*0270*/ NOP;\n /*0280*/ NOP;\n /*0290*/ NOP;\n /*02a0*/ NOP;\n /*02b0*/ NOP;\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n.L_x_7:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.weak\t__cxa_pure_virtual ; -- Begin function __cxa_pure_virtual\n\t.p2align\t2\n\t.type\t__cxa_pure_virtual,@function\n__cxa_pure_virtual: ; @__cxa_pure_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB0_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB0_1\n.Lfunc_end0:\n\t.size\t__cxa_pure_virtual, .Lfunc_end0-__cxa_pure_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.weak\t__cxa_deleted_virtual ; -- Begin function __cxa_deleted_virtual\n\t.p2align\t2\n\t.type\t__cxa_deleted_virtual,@function\n__cxa_deleted_virtual: ; @__cxa_deleted_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB1_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB1_1\n.Lfunc_end1:\n\t.size\t__cxa_deleted_virtual, .Lfunc_end1-__cxa_deleted_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hsa_signal_add\n\t.type\t__ockl_hsa_signal_add,@function\n__ockl_hsa_signal_add: ; @__ockl_hsa_signal_add\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v4, s32 offset:36 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s32 offset:32 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v2\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v1, s32 offset:28 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[3:4], s32 offset:20 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tscratch_store_b64 off, v[3:4], s32 offset:12 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s32 offset:4 ; 8-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 3\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s1, 0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 1\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_3\n; %bb.2:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 4\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s1, 2\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_17\n\ts_branch .LBB2_4\n.LBB2_3:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 1\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 0\n\tv_writelane_b32 v6, s2, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 5\n\tv_writelane_b32 v6, s1, 6\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 7\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_13\n\ts_branch .LBB2_6\n.LBB2_4:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 9\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_15\n\ts_branch .LBB2_18\n.LBB2_5:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 10\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 11\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 0\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_3\n.LBB2_6:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 12\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_7\n\ts_branch .LBB2_14\n.LBB2_7:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 13\n\tv_writelane_b32 v6, s1, 14\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 15\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_9\n; %bb.8:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 4\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_lt_i32_e64 s2, v0, s0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 13\n\tv_writelane_b32 v6, s0, 14\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_9:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s3, v6, 15\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_readlane_b32 s1, v6, 4\n\tv_readlane_b32 s2, v6, 13\n\tv_readlane_b32 s0, v6, 14\n\ts_and_b32 s0, s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 5\n\tv_writelane_b32 v6, s0, 6\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_13\n.LBB2_10:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 16\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 17\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_11:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v6, 17\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 19\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_19\n; %bb.12:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_19\n.LBB2_13:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v6, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s0, v6, 5\n\tv_readlane_b32 s1, v6, 6\n\tv_writelane_b32 v6, s1, 16\n\tv_writelane_b32 v6, s1, 17\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 18\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_11\n\ts_branch .LBB2_10\n.LBB2_14:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_branch .LBB2_7\n.LBB2_15:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 9\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 8\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_17\n.LBB2_16:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_5\n.LBB2_17:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v6, 2\n\tv_writelane_b32 v6, s1, 11\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 10\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_5\n\ts_branch .LBB2_16\n.LBB2_18:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 0\n\ts_xor_b32 s0, exec_lo, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_15\n.LBB2_19:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[0:1], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s1, v[0:1], s[0:1]\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 20\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_21\n; %bb.20:\n\tscratch_load_b64 v[1:2], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[3:4], off offset:24\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[1:2], v[3:4], off\n\tv_readfirstlane_b32 s0, v0\n\ts_mov_b32 s1, 0xff\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB2_21:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 20\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:48 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end2:\n\t.size\t__ockl_hsa_signal_add, .Lfunc_end2-__ockl_hsa_signal_add\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 1952\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 56\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_internal\n\t.type\t__ockl_hostcall_internal,@function\n__ockl_hostcall_internal: ; @__ockl_hostcall_internal\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s18, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v24, s33 offset:308 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v25, s33 offset:312 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v26, s33 offset:316 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x150\n\tv_writelane_b32 v24, s30, 0\n\tv_writelane_b32 v24, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:132 ; 4-byte Folded Spill\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s6, 0\n\tv_writelane_b32 v26, s7, 1\n\tscratch_store_b32 off, v18, s33 offset:128 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v16\n\tscratch_load_b32 v16, off, s33 offset:128 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:124 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v14\n\tscratch_load_b32 v14, off, s33 offset:124 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v12\n\tscratch_load_b32 v12, off, s33 offset:120 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:116 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v10\n\tscratch_load_b32 v10, off, s33 offset:116 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:112 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v8\n\tscratch_load_b32 v8, off, s33 offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v6\n\tscratch_load_b32 v6, off, s33 offset:108 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:104 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v4\n\tscratch_load_b32 v4, off, s33 offset:104 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v2\n\tscratch_load_b32 v2, off, s33 offset:100 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:96 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v1, s33 offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s33 offset:92 ; 4-byte Folded Reload\n\tv_writelane_b32 v26, s15, 2\n\tv_writelane_b32 v26, s14, 3\n\tv_writelane_b32 v26, s13, 4\n\tv_writelane_b32 v26, s12, 5\n\tv_writelane_b32 v26, s10, 6\n\tv_writelane_b32 v26, s11, 7\n\tv_writelane_b32 v26, s8, 8\n\tv_writelane_b32 v26, s9, 9\n\tv_writelane_b32 v26, s4, 10\n\tv_writelane_b32 v26, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\ts_waitcnt vmcnt(8)\n\tv_mov_b32_e32 v18, v16\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec\n\ts_waitcnt vmcnt(7)\n\tv_mov_b32_e32 v16, v14\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\ts_waitcnt vmcnt(6)\n\tv_mov_b32_e32 v14, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\ts_waitcnt vmcnt(5)\n\tv_mov_b32_e32 v12, v10\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\ts_waitcnt vmcnt(4)\n\tv_mov_b32_e32 v10, v8\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\ts_waitcnt vmcnt(3)\n\tv_mov_b32_e32 v8, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[17:18], s33 offset:84 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[15:16], s33 offset:76 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[13:14], s33 offset:68 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[11:12], s33 offset:60 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[9:10], s33 offset:52 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[7:8], s33 offset:44 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[5:6], s33 offset:36 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:28 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s0, -1\n\tv_mbcnt_lo_u32_b32 v0, s0, s1\n\tv_mbcnt_hi_u32_b32 v0, s0, v0\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b32 off, v3, s33 offset:24 ; 4-byte Folded Spill\n\tv_readfirstlane_b32 s0, v0\n\tscratch_store_b64 off, v[1:2], s33 offset:16 ; 8-byte Folded Spill\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, s1\n\tv_writelane_b32 v26, s0, 12\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v0, 0\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 13\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_6\n; %bb.1:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_mov_b64 s[2:3], 24\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:160 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b64 s[2:3], 40\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:152 ; 8-byte Folded Spill\n\tglobal_load_b64 v[5:6], v[0:1], off\n\tglobal_load_b64 v[10:11], v[0:1], off offset:40\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s1, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s1, v4, s1, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s0, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 15\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_5\n.LBB3_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 14\n\tscratch_load_b64 v[2:3], off, s33 offset:144 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:160 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:152 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[4:5], off\n\tglobal_load_b64 v[10:11], v[7:8], off\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s2, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s2, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s2, v4, s2, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e64 s0, v[0:1], v[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:168 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 16\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_2\n; %bb.3:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 16\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.4:\n\tscratch_load_b64 v[0:1], off, s33 offset:168 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n.LBB3_5:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:136 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n.LBB3_6:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[4:5], s0, v[4:5]\n\tv_mov_b32_e32 v2, v4\n\tv_readfirstlane_b32 s4, v3\n\tv_readfirstlane_b32 s2, v2\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr3\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s5\n\ts_lshl_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s0, 0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s0\n\ts_or_b64 s[2:3], s[2:3], s[4:5]\n\tv_writelane_b32 v26, s2, 17\n\tv_writelane_b32 v26, s3, 18\n\tglobal_load_b64 v[2:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:200 ; 8-byte Folded Spill\n\ts_mov_b64 s[6:7], 40\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s7\n\tv_add_co_u32 v2, s4, v2, s4\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tglobal_load_b64 v[3:4], v[0:1], off offset:40\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v4\n\tv_and_b32_e64 v2, s0, v2\n\ts_mov_b32 s0, s2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_and_b32_e64 v3, s0, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tscratch_store_b64 off, v[5:6], s33 offset:184 ; 8-byte Folded Spill\n\tglobal_load_b64 v[1:2], v[0:1], off offset:8\n\ts_mov_b32 s0, 12\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], exec\n\tv_writelane_b32 v26, s2, 19\n\tv_writelane_b32 v26, s3, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 21\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_8\n; %bb.7:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 19\n\tv_readlane_b32 s1, v26, 20\n\tscratch_load_b32 v2, off, s33 offset:96 ; 4-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v0\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[3:4], s2, v5, s3, 0\n\tv_mov_b32_e32 v9, v4\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s2\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v5\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[0:1], s2, v[0:1]\n\tv_mov_b32_e32 v5, v0\n\tv_mad_u64_u32 v[0:1], s3, v5, s3, v[9:10]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_lshlrev_b64 v[9:10], s2, v[0:1]\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v4, v3\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n\tv_mov_b32_e32 v3, v9\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v5, v1, v3\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s2, v0, v4\n\tv_add_co_ci_u32_e64 v3, s2, v1, v3, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tglobal_store_b32 v[0:1], v2, off offset:16\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tglobal_store_b64 v[0:1], v[2:3], off offset:8\n\tv_mov_b32_e32 v2, 1\n\tglobal_store_b32 v[0:1], v2, off offset:20\n.LBB3_8:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[2:3], off, s33 offset:84 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:76 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:68 ; 8-byte Folded Reload\n\tscratch_load_b64 v[8:9], off, s33 offset:60 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:52 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[14:15], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[16:17], off, s33 offset:28 ; 8-byte Folded Reload\n\tscratch_load_b64 v[22:23], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:24 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v18, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\ts_mov_b32 s0, 6\n\ts_waitcnt vmcnt(0)\n\tv_lshlrev_b64 v[20:21], s0, v[0:1]\n\tv_mov_b32_e32 v0, v22\n\tv_mov_b32_e32 v19, v20\n\tv_mov_b32_e32 v1, v23\n\tv_mov_b32_e32 v18, v21\n\tv_add_co_u32 v0, s0, v0, v19\n\tv_add_co_ci_u32_e64 v18, s0, v1, v18, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\tscratch_store_b64 off, v[0:1], s33 offset:216 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_mov_b64 s[4:5], 8\n\tv_mov_b32_e32 v16, v0\n\ts_mov_b32 s2, s4\n\tv_mov_b32_e32 v17, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v16, s2, v16, s2\n\tv_add_co_ci_u32_e64 v18, s0, v17, s0, s2\n ; kill: def $vgpr16 killed $vgpr16 def $vgpr16_vgpr17 killed $exec\n\tv_mov_b32_e32 v17, v18\n\tscratch_store_b64 off, v[16:17], s33 offset:208 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[14:15], off offset:8\n\tglobal_store_b64 v[0:1], v[12:13], off offset:16\n\tglobal_store_b64 v[0:1], v[10:11], off offset:24\n\tglobal_store_b64 v[0:1], v[8:9], off offset:32\n\tglobal_store_b64 v[0:1], v[6:7], off offset:40\n\tglobal_store_b64 v[0:1], v[4:5], off offset:48\n\tglobal_store_b64 v[0:1], v[2:3], off offset:56\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 22\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_13\n; %bb.9:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[5:6], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_mov_b64 s[4:5], 32\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:240 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:32 glc\n\ts_waitcnt vmcnt(1)\n\tglobal_load_b64 v[7:8], v[7:8], off\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v8\n\tv_and_b32_e64 v4, v4, s0\n\ts_mov_b32 s1, s2\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n\tv_and_b32_e64 v7, v7, s1\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v4, v7\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[9:10], s2, v4, s3, 0\n\tv_mov_b32_e32 v11, v10\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[7:8], s3, v4, s3, v[11:12]\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s3\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_lshlrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v11, v8\n ; kill: def $vgpr9 killed $vgpr9 killed $vgpr9_vgpr10 killed $exec\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v4, v10\n\tv_or_b32_e64 v4, v4, v11\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v7, v9\n\tv_or_b32_e64 v8, v7, v8\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v8\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v9\n\tv_add_co_u32 v4, s2, v4, v7\n\tv_add_co_ci_u32_e64 v6, s2, v5, v6, s2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:232 ; 8-byte Folded Spill\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v10, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 23\n\tv_writelane_b32 v26, s0, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 25\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_14\n.LBB3_10: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 24\n\tv_readlane_b32 s1, v26, 23\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[2:3], off, s33 offset:224 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:240 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:232 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s1, s3\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v10, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v26, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 26\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_10\n; %bb.11:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_branch .LBB3_14\n.LBB3_13:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB3_15\n.LBB3_14:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s15, v26, 2\n\tv_readlane_b32 s14, v26, 3\n\tv_readlane_b32 s13, v26, 4\n\tv_readlane_b32 s12, v26, 5\n\tv_readlane_b32 s10, v26, 6\n\tv_readlane_b32 s11, v26, 7\n\tv_readlane_b32 s8, v26, 8\n\tv_readlane_b32 s9, v26, 9\n\tv_readlane_b32 s6, v26, 0\n\tv_readlane_b32 s7, v26, 1\n\tv_readlane_b32 s4, v26, 10\n\tv_readlane_b32 s5, v26, 11\n\tscratch_load_b32 v31, off, s33 offset:132 ; 4-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hsa_signal_add@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hsa_signal_add@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v3, 0\n\tv_mov_b32_e32 v4, 3\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_branch .LBB3_13\n.LBB3_15:\n\tscratch_load_b64 v[6:7], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[3:4], s0, v2, s1, 0\n\tv_mov_b32_e32 v8, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[0:1]\n\tv_mov_b32_e32 v2, v0\n\tv_mad_u64_u32 v[0:1], s1, v2, s1, v[8:9]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\tv_mov_b32_e32 v5, v2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_mov_b32_e32 v0, v4\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v1, v3\n\tv_or_b32_e64 v4, v1, v2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v1, s0, v1, v3\n\tv_add_co_ci_u32_e64 v0, s0, v0, v2, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[2:3], 20\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:248 ; 8-byte Folded Spill\n.LBB3_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 27\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_18\n; %bb.17: ; in Loop: Header=BB3_16 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:248 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 1\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n.LBB3_18: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s33 offset:256 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s1, v0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0\n\ts_cmp_eq_u32 s1, s2\n\tv_writelane_b32 v26, s0, 28\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_cbranch_scc1 .LBB3_20\n; %bb.19: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_sleep 1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v26, s0, 28\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n.LBB3_20: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 28\n\tv_cndmask_b32_e64 v0, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v0, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccnz .LBB3_16\n; %bb.21:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:208 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:216 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:268 ; 8-byte Folded Spill\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:260 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 29\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_27\n; %bb.22:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[11:12], v[2:3], off\n\ts_mov_b64 s[4:5], 1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v11\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v12\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v4, v2\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v3\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_eq_u64_e64 s0, v[4:5], s[0:1]\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v5\n\tv_cndmask_b32_e64 v10, v6, v7, s0\n\tv_mov_b32_e32 v3, v2\n\tv_mov_b32_e32 v2, v4\n\tv_cndmask_b32_e64 v4, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v2, v8\n\tv_mov_b32_e32 v3, v9\n\tscratch_store_b64 off, v[2:3], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 24\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v5, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v5\n\tscratch_store_b64 off, v[2:3], s33 offset:292 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\tglobal_load_b64 v[6:7], v[0:1], off\n\tv_mov_b32_e32 v5, v9\n\tv_mov_b32_e32 v13, v12\n\tv_and_b32_e64 v5, v5, v13\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v11\n\tv_and_b32_e64 v8, v8, v9\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[11:12], s0, v5, s1, 0\n\tv_mov_b32_e32 v13, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\tv_mov_b32_e32 v14, v5\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v5, v8\n\tv_mad_u64_u32 v[8:9], s1, v5, s1, v[13:14]\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s1\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_lshlrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v13, v9\n ; kill: def $vgpr11 killed $vgpr11 killed $vgpr11_vgpr12 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\tv_mov_b32_e32 v5, v12\n\tv_or_b32_e64 v5, v5, v13\n\tv_mov_b32_e32 v9, v8\n\tv_mov_b32_e32 v8, v11\n\tv_or_b32_e64 v11, v8, v9\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v8, v11\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v7, v12\n\tv_add_co_u32 v5, s0, v5, v8\n\tv_add_co_ci_u32_e64 v7, s0, v6, v7, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[5:6], s33 offset:284 ; 8-byte Folded Spill\n\tglobal_store_b64 v[5:6], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 30\n\tv_writelane_b32 v26, s0, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s0, 0\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_26\n.LBB3_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v25, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v25, 31\n\tv_readlane_b32 s1, v25, 30\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[2:3], off, s33 offset:276 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:300 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:284 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[6:7], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v10, v5\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v25, s1, 30\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v25, s1, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v25, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_23\n; %bb.24:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.25:\n.LBB3_26:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 0\n\ts_or_b32 exec_lo, exec_lo, s0\n.LBB3_27:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[3:4], off, s33 offset:260 ; 8-byte Folded Reload\n\tscratch_load_b64 v[1:2], off, s33 offset:268 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v4\n\tv_readlane_b32 s30, v24, 0\n\tv_readlane_b32 s31, v24, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v24, off, s33 offset:308 ; 4-byte Folded Reload\n\tscratch_load_b32 v25, off, s33 offset:312 ; 4-byte Folded Reload\n\tscratch_load_b32 v26, off, s33 offset:316 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffeb0\n\ts_mov_b32 s33, s18\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end3:\n\t.size\t__ockl_hostcall_internal, .Lfunc_end3-__ockl_hostcall_internal\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 5344\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 392\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_preview\n\t.type\t__ockl_hostcall_preview,@function\n__ockl_hostcall_preview: ; @__ockl_hostcall_preview\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v27, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_writelane_b32 v27, s33, 0\n\tv_writelane_b32 v27, s30, 1\n\tv_writelane_b32 v27, s31, 2\n\tv_mov_b32_e32 v18, v16\n\tv_mov_b32_e32 v17, v15\n\tv_mov_b32_e32 v16, v14\n\tv_mov_b32_e32 v15, v13\n\tv_mov_b32_e32 v14, v12\n\tv_mov_b32_e32 v13, v11\n\tv_mov_b32_e32 v12, v10\n\tv_mov_b32_e32 v11, v9\n\tv_mov_b32_e32 v10, v8\n\tv_mov_b32_e32 v9, v7\n\tv_mov_b32_e32 v8, v6\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s0, s[0:1], 0x0\n\ts_mov_b32 s1, 0x1f4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s0, s1\n\ts_mov_b32 s1, 0x50\n\ts_mov_b32 s0, 24\n\ts_cselect_b32 s0, s0, s1\n\ts_load_b64 s[0:1], s[8:9], s0 offset:0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_internal@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_internal@rel32@hi+12\n\tv_mov_b32_e32 v0, s3\n\tv_mov_b32_e32 v1, s2\n\tv_readlane_b32 s30, v27, 1\n\tv_readlane_b32 s31, v27, 2\n\tv_readlane_b32 s33, v27, 0\n\ts_xor_saveexec_b32 s2, -1\n\tscratch_load_b32 v27, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s2\n\ts_setpc_b64 s[0:1]\n.Lfunc_end4:\n\t.size\t__ockl_hostcall_preview, .Lfunc_end4-__ockl_hostcall_preview\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 272\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 400\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_stderr_begin\n\t.type\t__ockl_fprintf_stderr_begin,@function\n__ockl_fprintf_stderr_begin: ; @__ockl_fprintf_stderr_begin\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v1, 33\n\tv_mov_b32_e32 v3, 1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v2, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end5:\n\t.size\t__ockl_fprintf_stderr_begin, .Lfunc_end5-__ockl_fprintf_stderr_begin\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 228\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 416\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_string_n\n\t.type\t__ockl_fprintf_append_string_n,@function\n__ockl_fprintf_append_string_n: ; @__ockl_fprintf_append_string_n\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s20, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v32, s33 offset:704 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v33, s33 offset:708 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v34, s33 offset:712 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x2d0\n\tv_writelane_b32 v32, s30, 0\n\tv_writelane_b32 v32, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:68 ; 4-byte Folded Spill\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s6, 0\n\tv_writelane_b32 v34, s7, 1\n\tscratch_store_b32 off, v6, s33 offset:60 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v5, s33 offset:56 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v4, s33 offset:64 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v6, v3\n\tscratch_load_b32 v3, off, s33 offset:64 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v2\n\tscratch_load_b32 v2, off, s33 offset:60 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v4, s33 offset:52 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v7, v1\n\tscratch_load_b32 v1, off, s33 offset:56 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v5, v0\n\tscratch_load_b32 v0, off, s33 offset:52 ; 4-byte Folded Reload\n\tv_writelane_b32 v34, s15, 2\n\tv_writelane_b32 v34, s14, 3\n\tv_writelane_b32 v34, s13, 4\n\tv_writelane_b32 v34, s12, 5\n\tv_writelane_b32 v34, s10, 6\n\tv_writelane_b32 v34, s11, 7\n\tv_writelane_b32 v34, s8, 8\n\tv_writelane_b32 v34, s9, 9\n\tv_writelane_b32 v34, s4, 10\n\tv_writelane_b32 v34, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[3:4], s33 offset:44 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b64 off, v[3:4], s33 offset:36 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\tv_cmp_eq_u32_e64 s0, v2, s0\n\tv_mov_b32_e32 v4, v6\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v2, v4, s1\n\tv_mov_b32_e32 v3, v5\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v5, v3, s1\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v2, v6\n\tv_cndmask_b32_e64 v4, v2, v4, s0\n\tv_mov_b32_e32 v2, v5\n\tv_cndmask_b32_e64 v2, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:28 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s0, v[0:1], s[0:1]\n ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr7\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tv_mov_b32_e32 v2, s6\n\tv_mov_b32_e32 v3, s7\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_3\n\ts_branch .LBB6_2\n.LBB6_1:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v34, 2\n\tv_readlane_b32 s14, v34, 3\n\tv_readlane_b32 s13, v34, 4\n\tv_readlane_b32 s12, v34, 5\n\tv_readlane_b32 s10, v34, 6\n\tv_readlane_b32 s11, v34, 7\n\tv_readlane_b32 s8, v34, 8\n\tv_readlane_b32 s9, v34, 9\n\tv_readlane_b32 s6, v34, 0\n\tv_readlane_b32 s7, v34, 1\n\tv_readlane_b32 s4, v34, 10\n\tv_readlane_b32 s5, v34, 11\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v3\n\tv_and_b32_e64 v4, v0, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v1\n\ts_mov_b64 s[0:1], 32\n\ts_mov_b32 s2, s1\n\tv_or_b32_e64 v4, v4, s2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_or_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v16, 0\n\tscratch_store_b32 off, v16, s33 offset:88 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_mov_b32_e32 v6, v1\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v4, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v2, v5\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_branch .LBB6_63\n.LBB6_2:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b64 v[4:5], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b64 s[0:1], 2\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v8, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v2, v0, s0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v8\n\tscratch_store_b64 off, v[2:3], s33 offset:124 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], -3\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v2, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v10, v1\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\ts_mov_b64 s[2:3], 0\n\ts_mov_b32 s0, s3\n\ts_mov_b32 s1, s2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v9, s1\n\tv_mov_b32_e32 v8, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v2, v9\n\tv_mov_b32_e32 v3, v8\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v34, s0, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:92 ; 16-byte Folded Spill\n\ts_branch .LBB6_4\n.LBB6_3:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b128 v[0:3], off, s33 offset:12 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 14\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_63\n\ts_branch .LBB6_1\n.LBB6_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n\ts_branch .LBB10_9\n.LBB10_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB10_12\n.LBB10_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB10_11\n.LBB10_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB10_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB10_7\n.LBB10_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB10_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_local_id, .Lfunc_end10-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_group_id\n\t.type\t__ockl_get_group_id,@function\n__ockl_get_group_id: ; @__ockl_get_group_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s14, 0\n\tv_writelane_b32 v2, s13, 1\n\tv_writelane_b32 v2, s12, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n; %bb.1:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_10\n\ts_branch .LBB11_9\n.LBB11_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 6\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 7\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_12\n; %bb.6:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB11_12\n.LBB11_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 8\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_11\n; %bb.8:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB11_11\n.LBB11_9:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n.LBB11_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB11_7\n.LBB11_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB11_4\n.LBB11_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB11_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end11:\n\t.size\t__ockl_get_group_id, .Lfunc_end11-__ockl_get_group_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 988\n; NumSgprs: 33\n; NumVgprs: 3\n; ScratchSize: 40\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_size\n\t.type\t__ockl_get_local_size,@function\n__ockl_get_local_size: ; @__ockl_get_local_size\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s32 offset:104 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr4 : SGPR spill to VGPR lane\n\tv_writelane_b32 v4, s14, 0\n\tv_writelane_b32 v4, s13, 1\n\tv_writelane_b32 v4, s12, 2\n\tv_writelane_b32 v4, s8, 3\n\tv_writelane_b32 v4, s9, 4\n\tv_writelane_b32 v4, s4, 5\n\tv_writelane_b32 v4, s5, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_10\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_20\n\ts_branch .LBB12_15\n.LBB12_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 7\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 10\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 11\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_24\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 12\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB12_9\n.LBB12_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 12\n\tscratch_load_b64 v[0:1], off, s32 offset:48 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB12_23\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 2\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_load_b32 s0, s[2:3], 0xc\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_branch .LBB12_23\n.LBB12_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 2\n\ts_load_b32 s3, s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 18\n\ts_mov_b32 s2, 12\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB12_7\n.LBB12_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 8\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_22\n; %bb.11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB12_14\n.LBB12_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 14\n\tscratch_load_b64 v[0:1], off, s32 offset:72 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB12_21\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 1\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_load_b32 s0, s[2:3], 0x10\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_branch .LBB12_21\n.LBB12_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 1\n\ts_load_b32 s3, s[0:1], 0x4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 20\n\ts_mov_b32 s2, 14\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB12_12\n.LBB12_15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 15\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB12_18\n.LBB12_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 15\n\tscratch_load_b64 v[0:1], off, s32 offset:88 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB12_19\n; %bb.17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 0\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_load_b32 s0, s[2:3], 0x14\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_branch .LBB12_19\n.LBB12_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 0\n\ts_load_b32 s3, s[0:1], 0x8\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 22\n\ts_mov_b32 s2, 16\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 15\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB12_16\n.LBB12_19:\n\tscratch_load_b64 v[0:1], off, s32 offset:96 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n.LBB12_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 9\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:24 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_branch .LBB12_10\n.LBB12_21:\n\tscratch_load_b64 v[0:1], off, s32 offset:80 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n.LBB12_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:64 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_branch .LBB12_4\n.LBB12_23:\n\tscratch_load_b64 v[0:1], off, s32 offset:56 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n.LBB12_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:40 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n.LBB12_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[2:3], off, s32 offset:32 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s32 offset:104 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end12:\n\t.size\t__ockl_get_local_size, .Lfunc_end12-__ockl_get_local_size\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2384\n; NumSgprs: 35\n; NumVgprs: 5\n; ScratchSize: 112\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function _ZL20__work_group_barrierj\n\t.type\t_ZL20__work_group_barrierj,@function\n_ZL20__work_group_barrierj: ; @_ZL20__work_group_barrierj\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v3, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s32\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr3 : SGPR spill to VGPR lane\n\tv_writelane_b32 v3, s1, 0\n\ts_or_saveexec_b32 s4, -1\n\tscratch_store_b32 off, v3, s32 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s4\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_1\n\ts_branch .LBB13_3\n.LBB13_1:\n\ts_or_saveexec_b32 s4, -1\n\tscratch_load_b32 v3, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s4\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v3, 0\n\ts_or_saveexec_b32 s0, s0\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v3, s0, 1\n\ts_or_saveexec_b32 s4, -1\n\tscratch_store_b32 off, v3, s32 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s4\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB13_4\n; %bb.2:\n\ts_waitcnt_vscnt null, 0x0\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_branch .LBB13_4\n.LBB13_3:\n\ts_waitcnt_vscnt null, 0x0\n\ts_barrier\n\ts_branch .LBB13_1\n.LBB13_4:\n\ts_or_saveexec_b32 s4, -1\n\tscratch_load_b32 v3, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s4\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v3, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v3, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end13:\n\t.size\t_ZL20__work_group_barrierj, .Lfunc_end13-_ZL20__work_group_barrierj\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 300\n; NumSgprs: 33\n; NumVgprs: 4\n; ScratchSize: 16\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function _ZL9__barrieri\n\t.type\t_ZL9__barrieri,@function\n_ZL9__barrieri: ; @_ZL9__barrieri\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s3, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v4, s30, 0\n\tv_writelane_b32 v4, s31, 1\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s33\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _ZL20__work_group_barrierj@rel32@lo+4\n\ts_addc_u32 s1, s1, _ZL20__work_group_barrierj@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s30, v4, 0\n\tv_readlane_b32 s31, v4, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s3\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end14:\n\t.size\t_ZL9__barrieri, .Lfunc_end14-_ZL9__barrieri\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 180\n; NumSgprs: 34\n; NumVgprs: 32\n; ScratchSize: 32\n; MemoryBound: 0\n\t.section\t.text._Z13__syncthreadsv,\"axG\",@progbits,_Z13__syncthreadsv,comdat\n\t.hidden\t_Z13__syncthreadsv ; -- Begin function _Z13__syncthreadsv\n\t.weak\t_Z13__syncthreadsv\n\t.p2align\t2\n\t.type\t_Z13__syncthreadsv,@function\n_Z13__syncthreadsv: ; @_Z13__syncthreadsv\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v5, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v5, s30, 0\n\tv_writelane_b32 v5, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _ZL9__barrieri@rel32@lo+4\n\ts_addc_u32 s1, s1, _ZL9__barrieri@rel32@hi+12\n\tv_mov_b32_e32 v0, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s30, v5, 0\n\tv_readlane_b32 s31, v5, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v5, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end15:\n\t.size\t_Z13__syncthreadsv, .Lfunc_end15-_Z13__syncthreadsv\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 124\n; NumSgprs: 34\n; NumVgprs: 32\n; ScratchSize: 48\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_num_groups\n\t.type\t__ockl_get_num_groups,@function\n__ockl_get_num_groups: ; @__ockl_get_num_groups\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v5, s32 offset:44 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr5 : SGPR spill to VGPR lane\n\tv_writelane_b32 v5, s8, 0\n\tv_writelane_b32 v5, s9, 1\n\tv_writelane_b32 v5, s4, 2\n\tv_writelane_b32 v5, s5, 3\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v5, s1, 4\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB16_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v5, s1, 5\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB16_12\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v5, s0, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB16_23\n\ts_branch .LBB16_19\n.LBB16_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v5, s0, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB16_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v5, s0, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB16_10\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s2\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v5, s0, 9\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB16_9\n.LBB16_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 9\n\tv_readlane_b32 s1, v5, 10\n\tv_readlane_b32 s0, v5, 11\n\tv_cndmask_b32_e64 v0, 0, 1, s2\n\ts_mov_b32 s2, 1\n ; implicit-def: $sgpr3\n\tv_cmp_ne_u32_e64 s2, v0, s2\n\ts_and_b32 vcc_lo, exec_lo, s2\n\tv_mov_b32_e32 v0, s1\n\tv_writelane_b32 v5, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_cbranch_vccnz .LBB16_11\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 2\n\tv_readlane_b32 s3, v5, 3\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s0, s[2:3], 0xc\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_mov_b32 s1, 0\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_sub_nc_u32_e64 v2, s1, v1\n\tv_cvt_f32_u32_e32 v0, v1\n\tv_rcp_iflag_f32_e32 v0, v0\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v0, 0x4f7ffffe, v0\n\tv_cvt_u32_f32_e32 v0, v0\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v2, v2, v0\n ; implicit-def: $sgpr1\n\tv_mul_hi_u32 v2, v0, v2\n ; implicit-def: $sgpr1\n\tv_add_nc_u32_e64 v0, v0, v2\n\ts_waitcnt lgkmcnt(0)\n\tv_mul_hi_u32 v0, s0, v0\n\ts_mov_b32 s1, 1\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr2\n\tv_mul_lo_u32 v3, v0, v1\n\tv_sub_nc_u32_e64 v3, s0, v3\n ; implicit-def: $sgpr2\n\tv_sub_nc_u32_e64 v4, v3, v1\n ; implicit-def: $sgpr2\n\tv_cmp_ge_u32_e64 s2, v3, v1\n\tv_cndmask_b32_e64 v3, v3, v4, s2\n\tv_cndmask_b32_e64 v0, v0, v2, s2\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr1\n\tv_cmp_ge_u32_e64 s1, v3, v1\n\tv_cndmask_b32_e64 v0, v0, v2, s1\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v1, v0, v1\n\tv_cmp_gt_u32_e64 s0, s0, v1\n\tv_writelane_b32 v5, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB16_11\n.LBB16_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 0\n\tv_readlane_b32 s1, v5, 1\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s2, s[0:1], 0x0\n\tglobal_load_u16 v0, v0, s[0:1] offset:18\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_writelane_b32 v5, s2, 10\n\tv_writelane_b32 v5, s1, 11\n\tv_writelane_b32 v5, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB16_7\n.LBB16_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_branch .LBB16_25\n.LBB16_11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 12\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\tv_cndmask_b32_e64 v1, 0, 1, s0\n ; implicit-def: $sgpr0\n\ts_waitcnt vmcnt(0)\n\tv_add_nc_u32_e64 v0, v0, v1\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB16_10\n.LBB16_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 5\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v5, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB16_17\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s2\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v5, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB16_16\n.LBB16_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 14\n\tv_readlane_b32 s1, v5, 15\n\tv_readlane_b32 s0, v5, 16\n\tv_cndmask_b32_e64 v0, 0, 1, s2\n\ts_mov_b32 s2, 1\n ; implicit-def: $sgpr3\n\tv_cmp_ne_u32_e64 s2, v0, s2\n\ts_and_b32 vcc_lo, exec_lo, s2\n\tv_mov_b32_e32 v0, s1\n\tv_writelane_b32 v5, s0, 17\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:36 ; 4-byte Folded Spill\n\ts_cbranch_vccnz .LBB16_18\n; %bb.15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 2\n\tv_readlane_b32 s3, v5, 3\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s0, s[2:3], 0x10\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_mov_b32 s1, 0\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_sub_nc_u32_e64 v2, s1, v1\n\tv_cvt_f32_u32_e32 v0, v1\n\tv_rcp_iflag_f32_e32 v0, v0\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v0, 0x4f7ffffe, v0\n\tv_cvt_u32_f32_e32 v0, v0\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v2, v2, v0\n ; implicit-def: $sgpr1\n\tv_mul_hi_u32 v2, v0, v2\n ; implicit-def: $sgpr1\n\tv_add_nc_u32_e64 v0, v0, v2\n\ts_waitcnt lgkmcnt(0)\n\tv_mul_hi_u32 v0, s0, v0\n\ts_mov_b32 s1, 1\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr2\n\tv_mul_lo_u32 v3, v0, v1\n\tv_sub_nc_u32_e64 v3, s0, v3\n ; implicit-def: $sgpr2\n\tv_sub_nc_u32_e64 v4, v3, v1\n ; implicit-def: $sgpr2\n\tv_cmp_ge_u32_e64 s2, v3, v1\n\tv_cndmask_b32_e64 v3, v3, v4, s2\n\tv_cndmask_b32_e64 v0, v0, v2, s2\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr1\n\tv_cmp_ge_u32_e64 s1, v3, v1\n\tv_cndmask_b32_e64 v0, v0, v2, s1\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v1, v0, v1\n\tv_cmp_gt_u32_e64 s0, s0, v1\n\tv_writelane_b32 v5, s0, 17\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:36 ; 4-byte Folded Spill\n\ts_branch .LBB16_18\n.LBB16_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 0\n\tv_readlane_b32 s1, v5, 1\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s2, s[0:1], 0x4\n\tglobal_load_u16 v0, v0, s[0:1] offset:20\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_writelane_b32 v5, s2, 15\n\tv_writelane_b32 v5, s1, 16\n\tv_writelane_b32 v5, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB16_14\n.LBB16_17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB16_4\n.LBB16_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 17\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\tv_cndmask_b32_e64 v1, 0, 1, s0\n ; implicit-def: $sgpr0\n\ts_waitcnt vmcnt(0)\n\tv_add_nc_u32_e64 v0, v0, v1\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB16_17\n.LBB16_19:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s2\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v5, s0, 18\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB16_22\n.LBB16_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 18\n\tv_readlane_b32 s1, v5, 19\n\tv_readlane_b32 s0, v5, 20\n\tv_cndmask_b32_e64 v0, 0, 1, s2\n\ts_mov_b32 s2, 1\n ; implicit-def: $sgpr3\n\tv_cmp_ne_u32_e64 s2, v0, s2\n\ts_and_b32 vcc_lo, exec_lo, s2\n\tv_mov_b32_e32 v0, s1\n\tv_writelane_b32 v5, s0, 21\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:40 ; 4-byte Folded Spill\n\ts_cbranch_vccnz .LBB16_24\n; %bb.21:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v5, 2\n\tv_readlane_b32 s3, v5, 3\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s0, s[2:3], 0x14\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_mov_b32 s1, 0\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_sub_nc_u32_e64 v2, s1, v1\n\tv_cvt_f32_u32_e32 v0, v1\n\tv_rcp_iflag_f32_e32 v0, v0\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v0, 0x4f7ffffe, v0\n\tv_cvt_u32_f32_e32 v0, v0\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v2, v2, v0\n ; implicit-def: $sgpr1\n\tv_mul_hi_u32 v2, v0, v2\n ; implicit-def: $sgpr1\n\tv_add_nc_u32_e64 v0, v0, v2\n\ts_waitcnt lgkmcnt(0)\n\tv_mul_hi_u32 v0, s0, v0\n\ts_mov_b32 s1, 1\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr2\n\tv_mul_lo_u32 v3, v0, v1\n\tv_sub_nc_u32_e64 v3, s0, v3\n ; implicit-def: $sgpr2\n\tv_sub_nc_u32_e64 v4, v3, v1\n ; implicit-def: $sgpr2\n\tv_cmp_ge_u32_e64 s2, v3, v1\n\tv_cndmask_b32_e64 v3, v3, v4, s2\n\tv_cndmask_b32_e64 v0, v0, v2, s2\n\tv_add_nc_u32_e64 v2, v0, s1\n ; implicit-def: $sgpr1\n\tv_cmp_ge_u32_e64 s1, v3, v1\n\tv_cndmask_b32_e64 v0, v0, v2, s1\n ; implicit-def: $sgpr1\n\tv_mul_lo_u32 v1, v0, v1\n\tv_cmp_gt_u32_e64 s0, s0, v1\n\tv_writelane_b32 v5, s0, 21\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\tscratch_store_b32 off, v0, s32 offset:40 ; 4-byte Folded Spill\n\ts_branch .LBB16_24\n.LBB16_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 0\n\tv_readlane_b32 s1, v5, 1\n\tv_mov_b32_e32 v0, 0\n\ts_load_b32 s2, s[0:1], 0x8\n\tglobal_load_u16 v0, v0, s[0:1] offset:22\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_writelane_b32 v5, s2, 19\n\tv_writelane_b32 v5, s1, 20\n\tv_writelane_b32 v5, s0, 18\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v5, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB16_20\n.LBB16_23:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB16_12\n.LBB16_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 21\n\tscratch_load_b32 v0, off, s32 offset:40 ; 4-byte Folded Reload\n\tv_cndmask_b32_e64 v1, 0, 1, s0\n ; implicit-def: $sgpr0\n\ts_waitcnt vmcnt(0)\n\tv_add_nc_u32_e64 v0, v0, v1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB16_23\n.LBB16_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v5, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v5, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v5, off, s32 offset:44 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end16:\n\t.size\t__ockl_get_num_groups, .Lfunc_end16-__ockl_get_num_groups\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2880\n; NumSgprs: 35\n; NumVgprs: 6\n; ScratchSize: 52\n; MemoryBound: 0\n\t.section\t.text._Z9atomicAddPff,\"axG\",@progbits,_Z9atomicAddPff,comdat\n\t.hidden\t_Z9atomicAddPff ; -- Begin function _Z9atomicAddPff\n\t.weak\t_Z9atomicAddPff\n\t.p2align\t2\n\t.type\t_Z9atomicAddPff,@function\n_Z9atomicAddPff: ; @_Z9atomicAddPff\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:52 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s8, s0\n\ts_add_i32 s0, s32, 8\n\ts_mov_b32 s4, s0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s8\n\ts_add_i32 s0, s32, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s8\n\ts_add_i32 s1, s32, 20\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s8\n\ts_add_i32 s7, s32, 24\n\ts_mov_b32 s6, s7\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s8\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s6, 0\n\tv_writelane_b32 v6, s7, 1\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_load_b32 v4, v[2:3]\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[2:3], v4\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s10, -1\n\tscratch_store_b32 off, v6, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s10\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n.LBB17_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s10, -1\n\tscratch_load_b32 v6, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 2\n\tscratch_load_b32 v1, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_add_f32_e64 v4, v1, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tflat_atomic_cmpswap_b32 v0, v[2:3], v[4:5] glc\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, v1\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v6, s1, 2\n\tv_mov_b32_e32 v1, v0\n\tscratch_store_b32 off, v1, s32 offset:32 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s10, -1\n\tscratch_store_b32 off, v6, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s10\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB17_1\n; %bb.2:\n\ts_or_saveexec_b32 s10, -1\n\tscratch_load_b32 v6, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.3:\n\ts_or_saveexec_b32 s10, -1\n\tscratch_load_b32 v6, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 0\n\tv_readlane_b32 s1, v6, 1\n\tscratch_load_b32 v2, off, s32 offset:48 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:52 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end17:\n\t.size\t_Z9atomicAddPff, .Lfunc_end17-_Z9atomicAddPff\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 576\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 64\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z16dotProductKernelPKfS0_Pfi ; -- Begin function _Z16dotProductKernelPKfS0_Pfi\n\t.globl\t_Z16dotProductKernelPKfS0_Pfi\n\t.p2align\t8\n\t.type\t_Z16dotProductKernelPKfS0_Pfi,@function\n_Z16dotProductKernelPKfS0_Pfi: ; @_Z16dotProductKernelPKfS0_Pfi\n; %bb.0:\n\ts_mov_b32 s32, 0x240\n ; implicit-def: $vgpr40 : SGPR spill to VGPR lane\n\tv_writelane_b32 v40, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v40, 0\n\tv_writelane_b32 v40, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v40, 1\n\tv_writelane_b32 v40, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v40, s10, 3\n\tv_writelane_b32 v40, s11, 4\n\tv_writelane_b32 v40, s2, 5\n\tv_writelane_b32 v40, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tv_writelane_b32 v40, s4, 7\n\tv_writelane_b32 v40, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:492 ; 4-byte Folded Spill\n\ts_load_b64 s[30:31], s[0:1], 0x0\n\ts_load_b64 s[26:27], s[0:1], 0x8\n\ts_load_b64 s[22:23], s[0:1], 0x10\n\ts_load_b32 s2, s[0:1], 0x18\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v40, s3, 9\n\ts_mov_b32 s28, 0x110\n ; kill: def $sgpr28 killed $sgpr28 def $sgpr28_sgpr29\n\ts_mov_b32 s29, s3\n\ts_mov_b32 s24, 0x118\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s20, 0x120\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\ts_mov_b32 s18, 0x128\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b64 s[6:7], s[18:19]\n\tv_writelane_b32 v40, s6, 10\n\tv_writelane_b32 v40, s7, 11\n\ts_mov_b32 s16, 0x130\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v40, s6, 12\n\tv_writelane_b32 v40, s7, 13\n\ts_mov_b32 s8, 0x138\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v40, s6, 14\n\tv_writelane_b32 v40, s7, 15\n\ts_mov_b32 s6, 0x140\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\tv_writelane_b32 v40, s6, 16\n\tv_writelane_b32 v40, s7, 17\n\ts_mov_b32 s34, 0x144\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v40, s34, 18\n\tv_writelane_b32 v40, s35, 19\n\tv_writelane_b32 v40, s34, 20\n\tv_writelane_b32 v40, s35, 21\n\ts_mov_b32 s34, 0x148\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v40, s34, 22\n\tv_writelane_b32 v40, s35, 23\n\ts_mov_b32 s34, 0x14c\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v40, s34, 24\n\tv_writelane_b32 v40, s35, 25\n\tv_writelane_b32 v40, s34, 26\n\tv_writelane_b32 v40, s35, 27\n\ts_mov_b32 s15, 0x150\n\tv_mov_b32_e32 v0, s15\n\tv_mov_b32_e32 v2, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], off offset:476 ; 8-byte Folded Spill\n\ts_mov_b32 s34, 0x158\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v40, s34, 28\n\tv_writelane_b32 v40, s35, 29\n\ts_mov_b32 s34, 0x180\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v40, s34, 30\n\tv_writelane_b32 v40, s35, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v40, off offset:472 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 s34, 0x1a8\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n ; implicit-def: $vgpr41 : SGPR spill to VGPR lane\n\tv_writelane_b32 v41, s34, 0\n\tv_writelane_b32 v41, s35, 1\n\ts_mov_b32 s34, 0x1d0\n ; kill: def $sgpr34 killed $sgpr34 def $sgpr34_sgpr35\n\ts_mov_b32 s35, s3\n\tv_writelane_b32 v41, s34, 2\n\tv_writelane_b32 v41, s35, 3\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s30\n\tv_mov_b32_e32 v3, s31\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s28\n\tv_mov_b32_e32 v1, s29\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tv_mov_b32_e32 v2, s26\n\tv_mov_b32_e32 v3, s27\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\ts_waitcnt vmcnt(2) lgkmcnt(4)\n\tflat_store_b64 v[0:1], v[6:7]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(3)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v41, s8, 4\n\tv_writelane_b32 v41, s9, 5\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, off offset:484 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s8, v41, 4\n\tv_readlane_b32 s9, v41, 5\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 18\n\tv_readlane_b32 s1, v40, 19\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:484 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:496 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:496 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_store_b32 v[1:2], v3\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s8, v41, 4\n\tv_readlane_b32 s9, v41, 5\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 22\n\tv_readlane_b32 s1, v40, 23\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:484 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:488 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:488 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_store_b32 v[1:2], v3\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v5, v[1:2]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:484 ; 4-byte Folded Reload\n\tv_readlane_b32 s4, v40, 18\n\tv_readlane_b32 s5, v40, 19\n\tv_readlane_b32 s2, v40, 24\n\tv_readlane_b32 s3, v40, 25\n\tv_readlane_b32 s0, v40, 16\n\tv_readlane_b32 s1, v40, 17\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v6, v1\n\tscratch_load_b64 v[0:1], off, off offset:476 ; 8-byte Folded Reload\n ; implicit-def: $sgpr6\n ; implicit-def: $sgpr6\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v6\n\tv_mov_b32_e32 v6, v3\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b32 v7, v[3:4]\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr5\n\tv_mov_b32_e32 v3, s4\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mad_u64_u32 v[3:4], s4, v5, v6, v[7:8]\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_store_b32 v[3:4], v5\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ge_i32_e64 s0, v0, v1\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v41, s1, 6\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB18_1\n\ts_branch .LBB18_3\n.LBB18_1:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 6\n\ts_or_saveexec_b32 s0, s0\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v41, s0, 7\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB18_4\n; %bb.2:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 20\n\tv_readlane_b32 s3, v41, 21\n\tv_readlane_b32 s4, v41, 12\n\tv_readlane_b32 s5, v41, 13\n\tv_readlane_b32 s0, v41, 26\n\tv_readlane_b32 s1, v41, 27\n\tv_readlane_b32 s6, v41, 10\n\tv_readlane_b32 s7, v41, 11\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[5:6], s0, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v5\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v6\n\tv_add_co_u32 v0, s1, v0, v3\n\tv_add_co_ci_u32_e64 v2, s1, v1, v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s4\n\tv_mov_b32_e32 v2, s5\n\tflat_load_b64 v[2:3], v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v1, s1, v1, v4\n\tv_add_co_ci_u32_e64 v3, s1, v2, v3, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mul_f32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b64 s[2:3], src_shared_base\n\ts_mov_b32 s1, 32\n\ts_lshr_b64 s[2:3], s[2:3], s1\n\ts_mov_b32 s1, s2\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s1\n\tv_lshlrev_b64 v[3:4], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v4\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v3, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB18_4\n.LBB18_3:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 20\n\tv_readlane_b32 s1, v41, 21\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v2, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b64 s[0:1], src_shared_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v2\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v2, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, 0\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB18_1\n.LBB18_4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v41, s8, 8\n\tv_writelane_b32 v41, s9, 9\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z13__syncthreadsv@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z13__syncthreadsv@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s16, v41, 0\n\tv_readlane_b32 s17, v41, 1\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s14, v40, 0\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_writelane_b32 v41, s0, 10\n\ts_mov_b32 s18, 0xd8\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s0\n\tv_writelane_b32 v41, s18, 11\n\tv_writelane_b32 v41, s19, 12\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n\tv_writelane_b32 v41, s0, 13\n\tv_writelane_b32 v41, s1, 14\n\tv_mov_b32_e32 v0, 2\n\tscratch_store_b32 off, v0, off offset:524 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:524 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:560 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:560 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:556 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_num_groups@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_num_groups@rel32@hi+12\n\tv_writelane_b32 v41, s0, 15\n\tv_writelane_b32 v41, s1, 16\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:556 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:552 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:552 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, v0, v1\n\tscratch_store_b32 off, v0, off offset:544 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, off offset:504 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s0, v41, 15\n\tv_readlane_b32 s1, v41, 16\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:504 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:548 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:548 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:540 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:544 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v1\n\tscratch_load_b32 v1, off, off offset:540 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tv_mul_lo_u32 v0, v0, v1\n\tscratch_store_b32 off, v0, off offset:536 ; 4-byte Folded Spill\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v41, s2, 17\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s0, v41, 15\n\tv_readlane_b32 s1, v41, 16\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s2, v41, 17\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:532 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tscratch_load_b32 v3, off, off offset:524 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s6, v40, 28\n\tv_readlane_b32 s7, v40, 29\n\tv_readlane_b32 s3, v41, 10\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_readlane_b32 s2, v41, 17\n\tv_mov_b32_e32 v4, v0\n\tscratch_load_b32 v0, off, off offset:536 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v2, v1\n\tscratch_load_b32 v1, off, off offset:532 ; 4-byte Folded Reload\n ; implicit-def: $sgpr15\n ; implicit-def: $sgpr15\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, v4\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tv_mul_lo_u32 v2, v0, v1\n\ts_mov_b32 s22, 0x88\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 0x90\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tv_mov_b32_e32 v4, s18\n\tv_mov_b32_e32 v5, s19\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b32 v2, v[0:1]\n\ts_mov_b32 s26, 0x48\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\ts_mov_b32 s24, 0x50\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s22, 0x54\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 0x58\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_store_b32 v[0:1], v3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, 0\n\tv_mov_b32_e32 v3, 0\n\tscratch_store_b64 off, v[2:3], off offset:512 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\tflat_load_b64 v[0:1], v[0:1]\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2 offset:4\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_load_b64 v[2:3], v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v3, v[0:1] offset:4\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[4:5], v[0:1] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v6, v[0:1] offset:16\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v7, v[0:1] offset:20\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_u8 v8, v[0:1] offset:24\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v9, v[0:1] offset:28\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v10, v[0:1] offset:32\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v11, v[0:1] offset:36\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v11 offset:36\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v10 offset:32\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v9 offset:28\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b8 v[0:1], v8 offset:24\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v7 offset:20\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v6 offset:16\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b64 v[0:1], v[4:5] offset:8\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v3 offset:4\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s18, 0xb0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\tv_writelane_b32 v41, s18, 18\n\tv_writelane_b32 v41, s19, 19\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:504 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:528 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:528 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:520 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:524 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v1\n\tscratch_load_b32 v1, off, off offset:520 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tscratch_store_b32 off, v1, off offset:508 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, off offset:512 ; 8-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s3, v41, 10\n\tv_readlane_b32 s6, v40, 30\n\tv_readlane_b32 s7, v40, 31\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 8\n\tv_readlane_b32 s9, v41, 9\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_readlane_b32 s2, v41, 17\n\tv_mov_b32_e32 v4, v0\n\tscratch_load_b32 v0, off, off offset:508 ; 4-byte Folded Reload\n ; implicit-def: $sgpr15\n ; implicit-def: $sgpr15\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v4, v0, v1\n\ts_mov_b32 s22, 32\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 40\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tv_mov_b32_e32 v5, s18\n\tv_mov_b32_e32 v6, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[5:6], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b32 v4, v[0:1]\n\ts_mov_b32 s26, 8\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\ts_mov_b32 s24, 16\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s22, 20\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 24\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v5, 3\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_store_b32 v[0:1], v5\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\tflat_load_b64 v[0:1], v[0:1]\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2 offset:4\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_load_b64 v[2:3], v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v3, v[0:1] offset:4\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[4:5], v[0:1] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v6, v[0:1] offset:16\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v7, v[0:1] offset:20\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_u8 v8, v[0:1] offset:24\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v9, v[0:1] offset:28\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v10, v[0:1] offset:32\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v11, v[0:1] offset:36\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v11 offset:36\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v10 offset:32\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v9 offset:28\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v8 offset:24\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v7 offset:20\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v6 offset:16\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[4:5] offset:8\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v3 offset:4\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1] offset:24\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5] offset:24\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1] offset:16\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5]\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s2, v41, 2\n\tv_readlane_b32 s3, v41, 3\n\tv_readlane_b32 s0, v41, 17\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:504 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:500 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:500 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v41, s0, 20\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB18_5: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 2\n\tv_readlane_b32 s3, v41, 3\n\tv_readlane_b32 s0, v41, 21\n\tv_readlane_b32 s1, v41, 20\n\tv_writelane_b32 v41, s1, 22\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_gt_i32_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v41, s0, 23\n\tv_writelane_b32 v41, s0, 24\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB18_8\n; %bb.6: ; in Loop: Header=BB18_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 2\n\tv_readlane_b32 s1, v41, 3\n\tv_readlane_b32 s2, v40, 20\n\tv_readlane_b32 s3, v40, 21\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 26\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB18_9\n; %bb.7: ; in Loop: Header=BB18_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v40, 2\n\tv_readlane_b32 s1, v40, 3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 20\n\tv_readlane_b32 s3, v41, 21\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v2, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v2\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v1, v3\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v2, v3\n\tv_ashrrev_i32_e64 v4, 31, v2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b64 s[0:1], src_shared_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[3:4], s0, v[2:3]\n\ts_mov_b32 s4, s2\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s1, s3\n\tv_mov_b32_e32 v3, v4\n\tv_add_co_u32 v2, s4, s4, v2\n\tv_add_co_ci_u32_e64 v4, s1, s1, v3, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tflat_load_b32 v3, v[2:3]\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v2\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v2, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_f32_e64 v2, v2, v3\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB18_9\n.LBB18_8: ; in Loop: Header=BB18_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v41, 22\n\tv_readlane_b32 s1, v41, 24\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v41, s1, 21\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v41, s1, 20\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v41, s1, 27\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB18_5\n\ts_branch .LBB18_11\n.LBB18_9: ; in Loop: Header=BB18_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s2, v40, 26\n\ts_or_b32 exec_lo, exec_lo, s2\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s14, v41, 0\n\tv_readlane_b32 s13, v41, 1\n\tv_readlane_b32 s12, v41, 2\n\tv_readlane_b32 s10, v41, 3\n\tv_readlane_b32 s11, v41, 4\n\tv_readlane_b32 s4, v41, 7\n\tv_readlane_b32 s5, v41, 8\n\tv_readlane_b32 s0, v41, 5\n\tv_readlane_b32 s1, v41, 6\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\ts_mov_b64 s[6:7], 32\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z13__syncthreadsv@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z13__syncthreadsv@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n; %bb.10: ; in Loop: Header=BB18_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 23\n\tv_readlane_b32 s2, v41, 2\n\tv_readlane_b32 s3, v41, 3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v2, s1, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v41, s0, 24\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_branch .LBB18_8\n.LBB18_11:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v40, 20\n\tv_readlane_b32 s1, v40, 21\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 28\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:468 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB18_14\n; %bb.13:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:472 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s14, v41, 0\n\tv_readlane_b32 s13, v41, 1\n\tv_readlane_b32 s12, v41, 2\n\tv_readlane_b32 s10, v41, 3\n\tv_readlane_b32 s11, v41, 4\n\tv_readlane_b32 s4, v41, 7\n\tv_readlane_b32 s5, v41, 8\n\tv_readlane_b32 s6, v41, 5\n\tv_readlane_b32 s7, v41, 6\n\tv_readlane_b32 s0, v41, 14\n\tv_readlane_b32 s1, v41, 15\n\tscratch_load_b32 v31, off, off offset:492 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b64 v[3:4], v[0:1]\n\ts_mov_b64 s[2:3], src_shared_base\n\ts_mov_b32 s0, 32\n\ts_lshr_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s1, s2\n\ts_mov_b32 s2, 0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\ts_mov_b64 s[8:9], 32\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_mov_b32 s6, s8\n\ts_mov_b32 s2, s9\n\ts_add_u32 s8, s3, s6\n\ts_addc_u32 s1, s1, s2\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s1\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[3:4]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v3\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z9atomicAddPff@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z9atomicAddPff@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n.LBB18_14:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:468 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z16dotProductKernelPKfS0_Pfi\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 688\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 1\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 42\n\t\t.amdhsa_next_free_sgpr 36\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end18:\n\t.size\t_Z16dotProductKernelPKfS0_Pfi, .Lfunc_end18-_Z16dotProductKernelPKfS0_Pfi\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 6916\n; NumSgprs: 38\n; NumVgprs: 42\n; ScratchSize: 688\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 5\n; NumSGPRsForWavesPerEU: 38\n; NumVGPRsForWavesPerEU: 42\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.protected\t_Z18sumOfSquaresKernelPKfPfi ; -- Begin function _Z18sumOfSquaresKernelPKfPfi\n\t.globl\t_Z18sumOfSquaresKernelPKfPfi\n\t.p2align\t8\n\t.type\t_Z18sumOfSquaresKernelPKfPfi,@function\n_Z18sumOfSquaresKernelPKfPfi: ; @_Z18sumOfSquaresKernelPKfPfi\n; %bb.0:\n\ts_mov_b32 s32, 0x230\n ; implicit-def: $vgpr40 : SGPR spill to VGPR lane\n\tv_writelane_b32 v40, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v40, 0\n\tv_writelane_b32 v40, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v40, 1\n\tv_writelane_b32 v40, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v40, s10, 3\n\tv_writelane_b32 v40, s11, 4\n\tv_writelane_b32 v40, s2, 5\n\tv_writelane_b32 v40, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tv_writelane_b32 v40, s4, 7\n\tv_writelane_b32 v40, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:476 ; 4-byte Folded Spill\n\ts_load_b64 s[24:25], s[0:1], 0x0\n\ts_load_b64 s[20:21], s[0:1], 0x8\n\ts_load_b32 s2, s[0:1], 0x10\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v40, s3, 9\n\ts_mov_b32 s22, 0x110\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s18, 0x118\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b32 s16, 0x120\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v40, s6, 10\n\tv_writelane_b32 v40, s7, 11\n\ts_mov_b32 s8, 0x128\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v40, s6, 12\n\tv_writelane_b32 v40, s7, 13\n\ts_mov_b32 s6, 0x130\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\tv_writelane_b32 v40, s6, 14\n\tv_writelane_b32 v40, s7, 15\n\ts_mov_b32 s26, 0x134\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 16\n\tv_writelane_b32 v40, s27, 17\n\tv_writelane_b32 v40, s26, 18\n\tv_writelane_b32 v40, s27, 19\n\ts_mov_b32 s26, 0x138\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 20\n\tv_writelane_b32 v40, s27, 21\n\ts_mov_b32 s26, 0x13c\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 22\n\tv_writelane_b32 v40, s27, 23\n\tv_writelane_b32 v40, s26, 24\n\tv_writelane_b32 v40, s27, 25\n\ts_mov_b32 s15, 0x140\n\tv_mov_b32_e32 v0, s15\n\tv_mov_b32_e32 v2, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], off offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s26, 0x148\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 26\n\tv_writelane_b32 v40, s27, 27\n\ts_mov_b32 s26, 0x170\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 28\n\tv_writelane_b32 v40, s27, 29\n\ts_mov_b32 s26, 0x198\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 30\n\tv_writelane_b32 v40, s27, 31\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v40, off offset:456 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 s26, 0x1c0\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n ; implicit-def: $vgpr41 : SGPR spill to VGPR lane\n\tv_writelane_b32 v41, s26, 0\n\tv_writelane_b32 v41, s27, 1\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v41, s8, 2\n\tv_writelane_b32 v41, s9, 3\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, off offset:468 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s8, v41, 2\n\tv_readlane_b32 s9, v41, 3\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 16\n\tv_readlane_b32 s1, v40, 17\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:468 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:480 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:480 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_store_b32 v[1:2], v3\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s8, v41, 2\n\tv_readlane_b32 s9, v41, 3\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 20\n\tv_readlane_b32 s1, v40, 21\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:468 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:472 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:472 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_store_b32 v[1:2], v3\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v5, v[1:2]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:468 ; 4-byte Folded Reload\n\tv_readlane_b32 s4, v40, 16\n\tv_readlane_b32 s5, v40, 17\n\tv_readlane_b32 s2, v40, 22\n\tv_readlane_b32 s3, v40, 23\n\tv_readlane_b32 s0, v40, 14\n\tv_readlane_b32 s1, v40, 15\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v6, v1\n\tscratch_load_b64 v[0:1], off, off offset:460 ; 8-byte Folded Reload\n ; implicit-def: $sgpr6\n ; implicit-def: $sgpr6\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v6\n\tv_mov_b32_e32 v6, v3\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b32 v7, v[3:4]\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr5\n\tv_mov_b32_e32 v3, s4\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mad_u64_u32 v[3:4], s4, v5, v6, v[7:8]\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_store_b32 v[3:4], v5\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ge_i32_e64 s0, v0, v1\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v41, s1, 4\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB19_1\n\ts_branch .LBB19_3\n.LBB19_1:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 4\n\ts_or_saveexec_b32 s0, s0\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v41, s0, 5\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB19_4\n; %bb.2:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 18\n\tv_readlane_b32 s3, v41, 19\n\tv_readlane_b32 s0, v41, 24\n\tv_readlane_b32 s1, v41, 25\n\tv_readlane_b32 s4, v41, 10\n\tv_readlane_b32 s5, v41, 11\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s1, v0, v3\n\tv_add_co_ci_u32_e64 v2, s1, v1, v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mul_f32_e64 v2, v0, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b64 s[2:3], src_shared_base\n\ts_mov_b32 s1, 32\n\ts_lshr_b64 s[2:3], s[2:3], s1\n\ts_mov_b32 s1, s2\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s1\n\tv_lshlrev_b64 v[3:4], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v4\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v3, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB19_4\n.LBB19_3:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 18\n\tv_readlane_b32 s1, v41, 19\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v2, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b64 s[0:1], src_shared_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v2\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v2, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, 0\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB19_1\n.LBB19_4:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 5\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v41, s8, 6\n\tv_writelane_b32 v41, s9, 7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z13__syncthreadsv@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z13__syncthreadsv@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s16, v40, 30\n\tv_readlane_b32 s17, v40, 31\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s14, v40, 0\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_writelane_b32 v41, s0, 8\n\ts_mov_b32 s18, 0xd8\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s0\n\tv_writelane_b32 v41, s18, 9\n\tv_writelane_b32 v41, s19, 10\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n\tv_writelane_b32 v41, s0, 11\n\tv_writelane_b32 v41, s1, 12\n\tv_mov_b32_e32 v0, 2\n\tscratch_store_b32 off, v0, off offset:508 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:508 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:544 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:544 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:540 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_num_groups@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_num_groups@rel32@hi+12\n\tv_writelane_b32 v41, s0, 13\n\tv_writelane_b32 v41, s1, 14\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:540 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:536 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:536 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, v0, v1\n\tscratch_store_b32 off, v0, off offset:528 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, off offset:488 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:488 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:532 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:532 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:524 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:528 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v1\n\tscratch_load_b32 v1, off, off offset:524 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tv_mul_lo_u32 v0, v0, v1\n\tscratch_store_b32 off, v0, off offset:520 ; 4-byte Folded Spill\n\ts_mov_b32 s2, 0\n\tv_writelane_b32 v41, s2, 15\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s0, v41, 13\n\tv_readlane_b32 s1, v41, 14\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s2, v41, 15\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tscratch_store_b32 off, v0, off offset:516 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tscratch_load_b32 v3, off, off offset:508 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s6, v40, 26\n\tv_readlane_b32 s7, v40, 27\n\tv_readlane_b32 s3, v41, 8\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_readlane_b32 s2, v41, 15\n\tv_mov_b32_e32 v4, v0\n\tscratch_load_b32 v0, off, off offset:520 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v2, v1\n\tscratch_load_b32 v1, off, off offset:516 ; 4-byte Folded Reload\n ; implicit-def: $sgpr15\n ; implicit-def: $sgpr15\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, v4\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tv_mul_lo_u32 v2, v0, v1\n\ts_mov_b32 s22, 0x88\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 0x90\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tv_mov_b32_e32 v4, s18\n\tv_mov_b32_e32 v5, s19\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b32 v2, v[0:1]\n\ts_mov_b32 s26, 0x48\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\ts_mov_b32 s24, 0x50\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s22, 0x54\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 0x58\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_store_b32 v[0:1], v3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, 0\n\tv_mov_b32_e32 v3, 0\n\tscratch_store_b64 off, v[2:3], off offset:496 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\tflat_load_b64 v[0:1], v[0:1]\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2 offset:4\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_load_b64 v[2:3], v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v3, v[0:1] offset:4\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[4:5], v[0:1] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v6, v[0:1] offset:16\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v7, v[0:1] offset:20\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_u8 v8, v[0:1] offset:24\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v9, v[0:1] offset:28\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v10, v[0:1] offset:32\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v11, v[0:1] offset:36\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v11 offset:36\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v10 offset:32\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v9 offset:28\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b8 v[0:1], v8 offset:24\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v7 offset:20\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v6 offset:16\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b64 v[0:1], v[4:5] offset:8\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v3 offset:4\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s18, 0xb0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\tv_writelane_b32 v41, s18, 16\n\tv_writelane_b32 v41, s19, 17\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:488 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:512 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:512 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:504 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:508 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v1\n\tscratch_load_b32 v1, off, off offset:504 ; 4-byte Folded Reload\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v1, v1, v2\n\tscratch_store_b32 off, v1, off offset:492 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, off offset:496 ; 8-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s3, v41, 8\n\tv_readlane_b32 s6, v40, 28\n\tv_readlane_b32 s7, v40, 29\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v41, 6\n\tv_readlane_b32 s9, v41, 7\n\tv_readlane_b32 s0, v41, 11\n\tv_readlane_b32 s1, v41, 12\n\tv_readlane_b32 s2, v41, 15\n\tv_mov_b32_e32 v4, v0\n\tscratch_load_b32 v0, off, off offset:492 ; 4-byte Folded Reload\n ; implicit-def: $sgpr15\n ; implicit-def: $sgpr15\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v4, v0, v1\n\ts_mov_b32 s22, 32\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 40\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tv_mov_b32_e32 v5, s18\n\tv_mov_b32_e32 v6, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[5:6], v[0:1]\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_load_b32 v4, v[0:1]\n\ts_mov_b32 s26, 8\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\ts_mov_b32 s24, 16\n ; kill: def $sgpr24 killed $sgpr24 def $sgpr24_sgpr25\n\ts_mov_b32 s25, s3\n\ts_mov_b32 s22, 20\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s20, 24\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s3\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v5, 3\n\tv_mov_b32_e32 v0, s24\n\tv_mov_b32_e32 v1, s25\n\tflat_store_b32 v[0:1], v5\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt vmcnt(0) lgkmcnt(2)\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s26\n\tv_mov_b32_e32 v1, s27\n\tflat_load_b64 v[0:1], v[0:1]\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v2, s22\n\tv_mov_b32_e32 v3, s23\n\tflat_load_b32 v2, v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2 offset:4\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_load_b64 v[2:3], v[2:3]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v3, v[0:1] offset:4\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[4:5], v[0:1] offset:8\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v6, v[0:1] offset:16\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v7, v[0:1] offset:20\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_u8 v8, v[0:1] offset:24\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v9, v[0:1] offset:28\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v10, v[0:1] offset:32\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b32 v11, v[0:1] offset:36\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v11 offset:36\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v10 offset:32\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v9 offset:28\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v8 offset:24\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v7 offset:20\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v6 offset:16\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[4:5] offset:8\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v3 offset:4\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1] offset:24\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5] offset:24\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1] offset:16\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b128 v[2:5], v[0:1]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b128 v[0:1], v[2:5]\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\tv_mov_b32_e32 v0, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s2, v41, 0\n\tv_readlane_b32 s3, v41, 1\n\tv_readlane_b32 s0, v41, 15\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:488 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:484 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:484 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v41, s0, 18\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n.LBB19_5: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 0\n\tv_readlane_b32 s3, v41, 1\n\tv_readlane_b32 s0, v41, 19\n\tv_readlane_b32 s1, v41, 18\n\tv_writelane_b32 v41, s1, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_gt_i32_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v41, s0, 21\n\tv_writelane_b32 v41, s0, 22\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 23\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB19_8\n; %bb.6: ; in Loop: Header=BB19_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 0\n\tv_readlane_b32 s1, v41, 1\n\tv_readlane_b32 s2, v40, 18\n\tv_readlane_b32 s3, v40, 19\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 24\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB19_9\n; %bb.7: ; in Loop: Header=BB19_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v40, 0\n\tv_readlane_b32 s1, v40, 1\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v41, 18\n\tv_readlane_b32 s3, v41, 19\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v2, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v2\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v1, v3\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v2, v3\n\tv_ashrrev_i32_e64 v4, 31, v2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b64 s[0:1], src_shared_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\ts_mov_b32 s2, 0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[3:4], s0, v[2:3]\n\ts_mov_b32 s4, s2\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s1, s3\n\tv_mov_b32_e32 v3, v4\n\tv_add_co_u32 v2, s4, s4, v2\n\tv_add_co_ci_u32_e64 v4, s1, s1, v3, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tflat_load_b32 v3, v[2:3]\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s0, s3\n\tv_mov_b32_e32 v1, v2\n\tv_add_co_u32 v0, s1, s1, v0\n\tv_add_co_ci_u32_e64 v2, s0, s0, v1, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_f32_e64 v2, v2, v3\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB19_9\n.LBB19_8: ; in Loop: Header=BB19_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 23\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v41, 20\n\tv_readlane_b32 s1, v41, 22\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v41, s1, 19\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v41, s1, 18\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v41, s1, 25\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB19_5\n\ts_branch .LBB19_11\n.LBB19_9: ; in Loop: Header=BB19_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s2, v40, 24\n\ts_or_b32 exec_lo, exec_lo, s2\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s14, v41, 0\n\tv_readlane_b32 s13, v41, 1\n\tv_readlane_b32 s12, v41, 2\n\tv_readlane_b32 s10, v41, 3\n\tv_readlane_b32 s11, v41, 4\n\tv_readlane_b32 s4, v41, 7\n\tv_readlane_b32 s5, v41, 8\n\tv_readlane_b32 s0, v41, 5\n\tv_readlane_b32 s1, v41, 6\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z13__syncthreadsv@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z13__syncthreadsv@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n; %bb.10: ; in Loop: Header=BB19_5 Depth=1\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 21\n\tv_readlane_b32 s2, v41, 0\n\tv_readlane_b32 s3, v41, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v2, s1, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v41, s0, 22\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_branch .LBB19_8\n.LBB19_11:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v40, 18\n\tv_readlane_b32 s1, v40, 19\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v41, s0, 26\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v41, off offset:452 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB19_14\n; %bb.13:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:456 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s14, v41, 0\n\tv_readlane_b32 s13, v41, 1\n\tv_readlane_b32 s12, v41, 2\n\tv_readlane_b32 s10, v41, 3\n\tv_readlane_b32 s11, v41, 4\n\tv_readlane_b32 s4, v41, 7\n\tv_readlane_b32 s5, v41, 8\n\tv_readlane_b32 s6, v41, 5\n\tv_readlane_b32 s7, v41, 6\n\tv_readlane_b32 s0, v41, 12\n\tv_readlane_b32 s1, v41, 13\n\tscratch_load_b32 v31, off, off offset:476 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b64 v[3:4], v[0:1]\n\ts_mov_b64 s[2:3], src_shared_base\n\ts_mov_b32 s0, 32\n\ts_lshr_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s1, s2\n\ts_mov_b32 s2, 0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\ts_mov_b64 s[8:9], 24\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_mov_b32 s6, s8\n\ts_mov_b32 s2, s9\n\ts_add_u32 s8, s3, s6\n\ts_addc_u32 s1, s1, s2\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s1\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[3:4]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v3\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z9atomicAddPff@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z9atomicAddPff@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n.LBB19_14:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v41, off, off offset:452 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v41, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z18sumOfSquaresKernelPKfPfi\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 672\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 1\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 42\n\t\t.amdhsa_next_free_sgpr 34\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end19:\n\t.size\t_Z18sumOfSquaresKernelPKfPfi, .Lfunc_end19-_Z18sumOfSquaresKernelPKfPfi\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 6724\n; NumSgprs: 36\n; NumVgprs: 42\n; ScratchSize: 672\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 5\n; NumSGPRsForWavesPerEU: 36\n; NumVGPRsForWavesPerEU: 42\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tthreadIdx\n\t.protected\tblockIdx\n\t.protected\tblockDim\n\t.type\t.str,@object ; @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.str:\n\t.asciz\t\"workgroup\"\n\t.size\t.str, 10\n\n\t.protected\tgridDim\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tthreadIdx\n\t.weak\tblockIdx\n\t.weak\tblockDim\n\t.weak\tgridDim\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 112\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 120\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 128\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 136\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 152\n .size: 4\n .value_kind: hidden_dynamic_lds_size\n - .offset: 232\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z16dotProductKernelPKfS0_Pfi\n .private_segment_fixed_size: 688\n .sgpr_count: 38\n .sgpr_spill_count: 63\n .symbol: _Z16dotProductKernelPKfS0_Pfi.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: true\n .vgpr_count: 42\n .vgpr_spill_count: 31\n .wavefront_size: 32\n .workgroup_processor_mode: 1\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 104\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 112\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 120\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 128\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 144\n .size: 4\n .value_kind: hidden_dynamic_lds_size\n - .offset: 224\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z18sumOfSquaresKernelPKfPfi\n .private_segment_fixed_size: 672\n .sgpr_count: 36\n .sgpr_spill_count: 61\n .symbol: _Z18sumOfSquaresKernelPKfPfi.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: true\n .vgpr_count: 42\n .vgpr_spill_count: 31\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":81,"cells":{"id":{"kind":"string","value":"7c562ad05c27877c54f7f89345f0a68d53cc7990_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z13beeman_kernelP6float4S0_S0_S0_ --------------------------\n .section .text._Z13beeman_kernelP6float4S0_S0_S0_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=35\"\n .align 128\n\n\n\n\n .global _Z13beeman_kernelP6float4S0_S0_S0_\n .type _Z13beeman_kernelP6float4S0_S0_S0_,@function\n .size _Z13beeman_kernelP6float4S0_S0_S0_,(.L_x_2 - _Z13beeman_kernelP6float4S0_S0_S0_)\n .other _Z13beeman_kernelP6float4S0_S0_S0_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z13beeman_kernelP6float4S0_S0_S0_:\n.text._Z13beeman_kernelP6float4S0_S0_S0_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R26, c[0x0][0x118] ;\n /*0020*/ MOV R27, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R16, R2 ;\n /*0060*/ MOV R17, R3 ;\n /*0070*/ MOV R16, R16 ;\n /*0080*/ MOV R17, R17 ;\n /*0090*/ MOV R2, 0x8 ;\n /*00a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00b0*/ MOV R4, R2 ;\n /*00c0*/ MOV R5, R3 ;\n /*00d0*/ MOV R4, R4 ;\n /*00e0*/ MOV R5, R5 ;\n /*00f0*/ MOV R2, 0x10 ;\n /*0100*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0110*/ MOV R8, R2 ;\n /*0120*/ MOV R7, R3 ;\n /*0130*/ MOV R8, R8 ;\n /*0140*/ MOV R7, R7 ;\n /*0150*/ MOV R2, 0x18 ;\n /*0160*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0170*/ MOV R12, R2 ;\n /*0180*/ MOV R13, R3 ;\n /*0190*/ MOV R12, R12 ;\n /*01a0*/ MOV R13, R13 ;\n /*01b0*/ S2R R0, SR_TID.X ;\n /*01c0*/ MOV R0, R0 ;\n /*01d0*/ MOV R2, c[0x0][0x0] ;\n /*01e0*/ S2R R3, SR_CTAID.X ;\n /*01f0*/ MOV R3, R3 ;\n /*0200*/ IMAD R0, R3, R2, R0 ;\n /*0210*/ ISETP.GT.AND P0, PT, R0, 0x3f, PT ;\n /*0220*/ MOV R16, R16 ;\n /*0230*/ MOV R17, R17 ;\n /*0240*/ MOV R4, R4 ;\n /*0250*/ MOV R3, R5 ;\n /*0260*/ MOV R8, R8 ;\n /*0270*/ MOV R7, R7 ;\n /*0280*/ MOV R12, R12 ;\n /*0290*/ MOV R13, R13 ;\n /*02a0*/ MOV R5, R0 ;\n /*02b0*/ @P0 BRA `(.L_x_0) ;\n /*02c0*/ MOV R16, R16 ;\n /*02d0*/ MOV R17, R17 ;\n /*02e0*/ IMAD.WIDE R10, R5, 0xc, RZ ;\n /*02f0*/ MOV R6, R10 ;\n /*0300*/ MOV R9, R11 ;\n /*0310*/ MOV R10, RZ ;\n /*0320*/ MOV R10, R10 ;\n /*0330*/ MOV R11, RZ ;\n /*0340*/ MOV R0, R10 ;\n /*0350*/ MOV R2, R11 ;\n /*0360*/ MOV R0, R0 ;\n /*0370*/ MOV R2, R2 ;\n /*0380*/ IADD3 R0, P0, R0, R6, RZ ;\n /*0390*/ IADD3.X R2, R2, R9, RZ, P0, !PT ;\n /*03a0*/ IMAD.WIDE R10, R5, 0x10, RZ ;\n /*03b0*/ MOV R14, R10 ;\n /*03c0*/ MOV R15, R11 ;\n /*03d0*/ IADD3 R5, P0, R16, R14, RZ ;\n /*03e0*/ IADD3.X R6, R17, R15, RZ, P0, !PT ;\n /*03f0*/ MOV R16, R5 ;\n /*0400*/ MOV R17, R6 ;\n /*0410*/ MOV R16, R16 ;\n /*0420*/ MOV R17, R17 ;\n /*0430*/ R2UR UR4, R26 ;\n /*0440*/ R2UR UR5, R27 ;\n /*0450*/ LDG.E.128 R16, [R16.64] ;\n /*0460*/ MOV R16, R16 ;\n /*0470*/ MOV R17, R17 ;\n /*0480*/ MOV R18, R18 ;\n /*0490*/ MOV R19, R19 ;\n /*04a0*/ MOV R4, R4 ;\n /*04b0*/ MOV R9, R3 ;\n /*04c0*/ IADD3 R3, P0, R4, R14, RZ ;\n /*04d0*/ IADD3.X R4, R9, R15, RZ, P0, !PT ;\n /*04e0*/ MOV R20, R3 ;\n /*04f0*/ MOV R21, R4 ;\n /*0500*/ MOV R20, R20 ;\n /*0510*/ MOV R21, R21 ;\n /*0520*/ R2UR UR4, R26 ;\n /*0530*/ R2UR UR5, R27 ;\n /*0540*/ LDG.E.128 R20, [R20.64] ;\n /*0550*/ MOV R20, R20 ;\n /*0560*/ MOV R21, R21 ;\n /*0570*/ MOV R22, R22 ;\n /*0580*/ MOV R23, R23 ;\n /*0590*/ MOV R8, R8 ;\n /*05a0*/ MOV R24, R7 ;\n /*05b0*/ IADD3 R7, P0, R8, R14, RZ ;\n /*05c0*/ IADD3.X R24, R24, R15, RZ, P0, !PT ;\n /*05d0*/ MOV R8, R7 ;\n /*05e0*/ MOV R9, R24 ;\n /*05f0*/ MOV R8, R8 ;\n /*0600*/ MOV R9, R9 ;\n /*0610*/ R2UR UR4, R26 ;\n /*0620*/ R2UR UR5, R27 ;\n /*0630*/ LDG.E.128 R8, [R8.64] ;\n /*0640*/ MOV R8, R8 ;\n /*0650*/ MOV R9, R9 ;\n /*0660*/ MOV R10, R10 ;\n /*0670*/ MOV R11, R11 ;\n /*0680*/ MOV R12, R12 ;\n /*0690*/ MOV R13, R13 ;\n /*06a0*/ IADD3 R28, P0, R12, R14, RZ ;\n /*06b0*/ IADD3.X R25, R13, R15, RZ, P0, !PT ;\n /*06c0*/ MOV R12, R28 ;\n /*06d0*/ MOV R13, R25 ;\n /*06e0*/ MOV R12, R12 ;\n /*06f0*/ MOV R13, R13 ;\n /*0700*/ R2UR UR4, R26 ;\n /*0710*/ R2UR UR5, R27 ;\n /*0720*/ LDG.E.128 R12, [R12.64] ;\n /*0730*/ MOV R15, R12 ;\n /*0740*/ MOV R13, R13 ;\n /*0750*/ MOV R12, R14 ;\n /*0760*/ FMUL R14, R8, 1.3333333730697631836 ;\n /*0770*/ FMUL R29, R15, 0.3333333432674407959 ;\n /*0780*/ FADD R14, R14, -R29 ;\n /*0790*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*07a0*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*07b0*/ FFMA R29, R20, 0.0010000000474974513054, R14 ;\n /*07c0*/ FMUL R14, R9, 1.3333333730697631836 ;\n /*07d0*/ FMUL R30, R13, 0.3333333432674407959 ;\n /*07e0*/ FADD R14, R14, -R30 ;\n /*07f0*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*0800*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*0810*/ FFMA R30, R21, 0.0010000000474974513054, R14 ;\n /*0820*/ FMUL R14, R10, 1.3333333730697631836 ;\n /*0830*/ FMUL R31, R12, 0.3333333432674407959 ;\n /*0840*/ FADD R14, R14, -R31 ;\n /*0850*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*0860*/ FMUL R14, R14, 0.0010000000474974513054 ;\n /*0870*/ FFMA R31, R22, 0.0010000000474974513054, R14 ;\n /*0880*/ FMUL R14, R8, 1.5 ;\n /*0890*/ FMUL R15, R15, 0.5 ;\n /*08a0*/ FADD R14, R14, -R15 ;\n /*08b0*/ FMUL R15, R9, 1.5 ;\n /*08c0*/ FMUL R13, R13, 0.5 ;\n /*08d0*/ FADD R15, R15, -R13 ;\n /*08e0*/ FMUL R13, R10, 1.5 ;\n /*08f0*/ FMUL R12, R12, 0.5 ;\n /*0900*/ FADD R32, R13, -R12 ;\n /*0910*/ FADD R18, R18, R31 ;\n /*0920*/ FADD R17, R17, R30 ;\n /*0930*/ FADD R16, R16, R29 ;\n /*0940*/ MOV R12, R5 ;\n /*0950*/ MOV R13, R6 ;\n /*0960*/ MOV R12, R12 ;\n /*0970*/ MOV R13, R13 ;\n /*0980*/ R2UR UR4, R26 ;\n /*0990*/ R2UR UR5, R27 ;\n /*09a0*/ STG.E.128 [R12.64], R16 ;\n /*09b0*/ FFMA R22, R32, 0.0010000000474974513054, R22 ;\n /*09c0*/ FFMA R21, R15, 0.0010000000474974513054, R21 ;\n /*09d0*/ FFMA R20, R14, 0.0010000000474974513054, R20 ;\n /*09e0*/ MOV R5, R3 ;\n /*09f0*/ MOV R4, R4 ;\n /*0a00*/ LOP3.LUT R5, R5, R4, RZ, 0x3c, !PT ;\n /*0a10*/ LOP3.LUT R4, R5, R4, RZ, 0x3c, !PT ;\n /*0a20*/ LOP3.LUT R5, R5, R4, RZ, 0x3c, !PT ;\n /*0a30*/ R2UR UR4, R26 ;\n /*0a40*/ R2UR UR5, R27 ;\n /*0a50*/ STG.E.128 [R4.64], R20 ;\n /*0a60*/ MOV R4, R28 ;\n /*0a70*/ MOV R5, R25 ;\n /*0a80*/ MOV R4, R4 ;\n /*0a90*/ MOV R5, R5 ;\n /*0aa0*/ R2UR UR4, R26 ;\n /*0ab0*/ R2UR UR5, R27 ;\n /*0ac0*/ STG.E.128 [R4.64], R8 ;\n /*0ad0*/ IADD3 R10, P0, R0, 0x8, RZ ;\n /*0ae0*/ IADD3.X R3, R2, RZ, RZ, P0, !PT ;\n /*0af0*/ MOV R10, R10 ;\n /*0b00*/ MOV R3, R3 ;\n /*0b10*/ LDC R10, c[0x3][R10] ;\n /*0b20*/ MOV R10, R10 ;\n /*0b30*/ IADD3 R9, P0, R0, 0x4, RZ ;\n /*0b40*/ IADD3.X R3, R2, RZ, RZ, P0, !PT ;\n /*0b50*/ MOV R9, R9 ;\n /*0b60*/ MOV R3, R3 ;\n /*0b70*/ LDC R9, c[0x3][R9] ;\n /*0b80*/ MOV R9, R9 ;\n /*0b90*/ MOV R8, R0 ;\n /*0ba0*/ MOV R2, R2 ;\n /*0bb0*/ LDC R8, c[0x3][R8] ;\n /*0bc0*/ MOV R8, R8 ;\n /*0bd0*/ MOV R11, RZ ;\n /*0be0*/ MOV R2, R7 ;\n /*0bf0*/ MOV R3, R24 ;\n /*0c00*/ MOV R2, R2 ;\n /*0c10*/ MOV R3, R3 ;\n /*0c20*/ R2UR UR4, R26 ;\n /*0c30*/ R2UR UR5, R27 ;\n /*0c40*/ STG.E.128 [R2.64], R8 ;\n.L_x_0:\n /*0c50*/ EXIT ;\n.L_x_1:\n /*0c60*/ BRA `(.L_x_1);\n /*0c70*/ NOP;\n /*0c80*/ NOP;\n /*0c90*/ NOP;\n /*0ca0*/ NOP;\n /*0cb0*/ NOP;\n /*0cc0*/ NOP;\n /*0cd0*/ NOP;\n /*0ce0*/ NOP;\n /*0cf0*/ NOP;\n.L_x_2:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_073917.hip\"\n\t.globl\t_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_ # -- Begin function _Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.p2align\t4, 0x90\n\t.type\t_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_,@function\n_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_: # @_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovq\t%rdx, 56(%rsp)\n\tmovq\t%rcx, 48(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t48(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t32(%rsp), %rdi\n\tleaq\t16(%rsp), %rsi\n\tleaq\t8(%rsp), %rdx\n\tmovq\t%rsp, %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t32(%rsp), %rsi\n\tmovl\t40(%rsp), %edx\n\tmovq\t16(%rsp), %rcx\n\tmovl\t24(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_, %edi\n\tpushq\t(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_, .Lfunc_end0-_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.cfi_endproc\n # -- End function\n\t.globl\t_Z14checkCudaError10hipError_tPKci # -- Begin function _Z14checkCudaError10hipError_tPKci\n\t.p2align\t4, 0x90\n\t.type\t_Z14checkCudaError10hipError_tPKci,@function\n_Z14checkCudaError10hipError_tPKci: # @_Z14checkCudaError10hipError_tPKci\n\t.cfi_startproc\n# %bb.0:\n\ttestl\t%edi, %edi\n\tjne\t.LBB1_2\n# %bb.1:\n\tretq\n.LBB1_2:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 32\n\t.cfi_offset %rbx, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t%edi, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rsi, %r14\n\tmovl\t$.L.str, %esi\n\tmovl\t%edx, %ebp\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tmovq\t%r14, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovl\t$.L.str.1, %esi\n\tmovq\t%rax, %rdi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tmovl\t%ebp, %esi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.2, %esi\n\tmovq\t%rax, %rdi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %r14\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\tmovq\t%r14, %rdi\n\tmovq\t%rax, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tmovl\t$1, %edi\n\tcallq\texit\n.Lfunc_end1:\n\t.size\t_Z14checkCudaError10hipError_tPKci, .Lfunc_end1-_Z14checkCudaError10hipError_tPKci\n\t.cfi_endproc\n # -- End function\n\t.section\t.rodata.cst16,\"aM\",@progbits,16\n\t.p2align\t4, 0x0 # -- Begin function main\n.LCPI2_0:\n\t.long\t0x3dcccccd # float 0.100000001\n\t.long\t0x3dcccccd # float 0.100000001\n\t.zero\t4\n\t.zero\t4\n\t.text\n\t.globl\tmain\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 32\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 40\n\tsubq\t$920, %rsp # imm = 0x398\n\t.cfi_def_cfa_offset 960\n\t.cfi_offset %rbx, -40\n\t.cfi_offset %r12, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %r15, -16\n\tmovl\t$1024, %edi # imm = 0x400\n\tcallq\tmalloc\n\tmovq\t%rax, %rbx\n\tmovl\t$1, %edi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\tcalloc@PLT\n\tmovq\t%rax, %r14\n\tmovl\t$1, %edi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\tcalloc@PLT\n\tmovq\t%rax, %r15\n\tmovl\t$1, %edi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\tcalloc@PLT\n\tmovq\t%rax, %r12\n\tmovq\t%rbx, %rax\n\taddq\t$24, %rax\n\txorl\t%ecx, %ecx\n\t.p2align\t4, 0x90\n.LBB2_1: # =>This Inner Loop Header: Depth=1\n\txorps\t%xmm0, %xmm0\n\tcvtsi2ss\t%ecx, %xmm0\n\tmovq\t%xmm0, %xmm1 # xmm1 = xmm0[0],zero\n\tmovl\t%ecx, %edx\n\torl\t$1, %edx\n\txorps\t%xmm2, %xmm2\n\tcvtsi2ss\t%edx, %xmm2\n\tshufps\t$128, %xmm1, %xmm0 # xmm0 = xmm0[0,0],xmm1[0,2]\n\tmovaps\t%xmm0, -24(%rax)\n\tmovq\t%xmm2, %xmm0 # xmm0 = xmm2[0],zero\n\tshufps\t$128, %xmm0, %xmm2 # xmm2 = xmm2[0,0],xmm0[0,2]\n\tmovaps\t%xmm2, -8(%rax)\n\taddq\t$2, %rcx\n\taddq\t$32, %rax\n\tcmpq\t$64, %rcx\n\tjne\t.LBB2_1\n# %bb.2:\n\tleaq\t24(%rsp), %rdi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\thipMalloc\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$64, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\thipMalloc\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$65, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\thipMalloc\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$66, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t%rsp, %rdi\n\tmovl\t$1024, %esi # imm = 0x400\n\tcallq\thipMalloc\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$67, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t24(%rsp), %rdi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%rbx, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$70, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t16(%rsp), %rdi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r14, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$71, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t8(%rsp), %rdi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r15, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$72, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t(%rsp), %rdi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r12, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$73, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovl\t$44, %eax\n\tmovsd\t.LCPI2_0(%rip), %xmm0 # xmm0 = mem[0],zero\n\t.p2align\t4, 0x90\n.LBB2_3: # =>This Inner Loop Header: Depth=1\n\tmovsd\t%xmm0, 100(%rsp,%rax)\n\tmovl\t$1036831949, 108(%rsp,%rax) # imm = 0x3DCCCCCD\n\tmovsd\t%xmm0, 112(%rsp,%rax)\n\tmovl\t$1036831949, 120(%rsp,%rax) # imm = 0x3DCCCCCD\n\tmovsd\t%xmm0, 124(%rsp,%rax)\n\tmovl\t$1036831949, 132(%rsp,%rax) # imm = 0x3DCCCCCD\n\tmovsd\t%xmm0, 136(%rsp,%rax)\n\tmovl\t$1036831949, 144(%rsp,%rax) # imm = 0x3DCCCCCD\n\taddq\t$48, %rax\n\tcmpq\t$812, %rax # imm = 0x32C\n\tjne\t.LBB2_3\n# %bb.4:\n\tleaq\t144(%rsp), %rsi\n\tmovl\t$forces, %edi\n\tmovl\t$768, %edx # imm = 0x300\n\txorl\t%ecx, %ecx\n\tmovl\t$1, %r8d\n\tcallq\thipMemcpyToSymbol\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$80, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovabsq\t$4294967297, %rdi # imm = 0x100000001\n\tleaq\t255(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB2_6\n# %bb.5:\n\tmovq\t24(%rsp), %rax\n\tmovq\t16(%rsp), %rcx\n\tmovq\t8(%rsp), %rdx\n\tmovq\t(%rsp), %rsi\n\tmovq\t%rax, 104(%rsp)\n\tmovq\t%rcx, 96(%rsp)\n\tmovq\t%rdx, 88(%rsp)\n\tmovq\t%rsi, 80(%rsp)\n\tleaq\t104(%rsp), %rax\n\tmovq\t%rax, 112(%rsp)\n\tleaq\t96(%rsp), %rax\n\tmovq\t%rax, 120(%rsp)\n\tleaq\t88(%rsp), %rax\n\tmovq\t%rax, 128(%rsp)\n\tleaq\t80(%rsp), %rax\n\tmovq\t%rax, 136(%rsp)\n\tleaq\t64(%rsp), %rdi\n\tleaq\t48(%rsp), %rsi\n\tleaq\t40(%rsp), %rdx\n\tleaq\t32(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t64(%rsp), %rsi\n\tmovl\t72(%rsp), %edx\n\tmovq\t48(%rsp), %rcx\n\tmovl\t56(%rsp), %r8d\n\tleaq\t112(%rsp), %r9\n\tmovl\t$_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_, %edi\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t48(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$16, %rsp\n\t.cfi_adjust_cfa_offset -16\n.LBB2_6:\n\tcallq\thipGetLastError\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$86, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tcallq\thipDeviceSynchronize\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$87, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t24(%rsp), %rsi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%rbx, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$90, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t16(%rsp), %rsi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$91, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t8(%rsp), %rsi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r15, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$92, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t(%rsp), %rsi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovq\t%r12, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$93, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t24(%rsp), %rdi\n\tcallq\thipFree\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$96, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$97, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$98, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovl\t$.L.str.3, %esi\n\tmovl\t%eax, %edi\n\tmovl\t$99, %edx\n\tcallq\t_Z14checkCudaError10hipError_tPKci\n\tmovq\t%rbx, %rdi\n\tcallq\tfree\n\tmovq\t%r14, %rdi\n\tcallq\tfree\n\tmovq\t%r15, %rdi\n\tcallq\tfree\n\tmovq\t%r12, %rdi\n\tcallq\tfree\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$34, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cout(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cout+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB2_11\n# %bb.7:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB2_9\n# %bb.8:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB2_10\n.LBB2_9:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB2_10:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\txorl\t%eax, %eax\n\taddq\t$920, %rsp # imm = 0x398\n\t.cfi_def_cfa_offset 40\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB2_11:\n\t.cfi_def_cfa_offset 960\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end2:\n\t.size\tmain, .Lfunc_end2-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_073917.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_073917.hip,@function\n_GLOBAL__sub_I_cuda_code_073917.hip: # @_GLOBAL__sub_I_cuda_code_073917.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end3:\n\t.size\t_GLOBAL__sub_I_cuda_code_073917.hip, .Lfunc_end3-_GLOBAL__sub_I_cuda_code_073917.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 16\n\tsubq\t$32, %rsp\n\t.cfi_def_cfa_offset 48\n\t.cfi_offset %rbx, -16\n\tmovq\t__hip_gpubin_handle(%rip), %rbx\n\ttestq\t%rbx, %rbx\n\tjne\t.LBB4_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rbx\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB4_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovq\t%rbx, %rdi\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$0, 8(%rsp)\n\tmovl\t$1, (%rsp)\n\tmovl\t$forces, %esi\n\tmovl\t$.L__unnamed_2, %edx\n\tmovl\t$.L__unnamed_2, %ecx\n\tmovl\t$768, %r9d # imm = 0x300\n\tmovq\t%rbx, %rdi\n\txorl\t%r8d, %r8d\n\tcallq\t__hipRegisterVar\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$32, %rsp\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end4:\n\t.size\t__hip_module_ctor, .Lfunc_end4-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB5_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB5_2:\n\tretq\n.Lfunc_end5:\n\t.size\t__hip_module_dtor, .Lfunc_end5-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\tforces,@object # @forces\n\t.local\tforces\n\t.comm\tforces,768,16\n\t.type\t_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_,@object # @_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.p2align\t3, 0x0\n_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_:\n\t.quad\t_Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\n\t.size\t_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"CUDA error at \"\n\t.size\t.L.str, 15\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\":\"\n\t.size\t.L.str.1, 2\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\" - \"\n\t.size\t.L.str.2, 4\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"CUDA_repos/synthetic/cuda_code_073917.hip\"\n\t.size\t.L.str.3, 42\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Simulation completed successfully.\"\n\t.size\t.L.str.4, 35\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z13beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_\"\n\t.size\t.L__unnamed_1, 52\n\n\t.type\t.L__unnamed_2,@object # @1\n.L__unnamed_2:\n\t.asciz\t\"forces\"\n\t.size\t.L__unnamed_2, 7\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_073917.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":82,"cells":{"id":{"kind":"string","value":"f70daf450bbd941b98fee50317302eab97c5d518_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z12idwt_per_X_1PfS_S_iiiii --------------------------\n .section .text._Z12idwt_per_X_1PfS_S_iiiii,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=40\"\n .align 128\n\n\n\n\n .global _Z12idwt_per_X_1PfS_S_iiiii\n .type _Z12idwt_per_X_1PfS_S_iiiii,@function\n .size _Z12idwt_per_X_1PfS_S_iiiii,(.L_x_27 - _Z12idwt_per_X_1PfS_S_iiiii)\n .other _Z12idwt_per_X_1PfS_S_iiiii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z12idwt_per_X_1PfS_S_iiiii:\n.text._Z12idwt_per_X_1PfS_S_iiiii:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R2, SR_CTAID.Y ;\n /*0020*/ IMAD.MOV.U32 R5, RZ, RZ, 0x3 ;\n /*0030*/ S2R R3, SR_TID.Y ;\n /*0040*/ S2R R14, SR_CTAID.X ;\n /*0050*/ S2R R15, SR_TID.X ;\n /*0060*/ IMAD R2, R2, 0x4, R3 ;\n /*0070*/ IMAD R0, R14, R5, -c[0x0][0x188] ;\n /*0080*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x178], PT ;\n /*0090*/ IMAD R9, R0, 0x20, R15 ;\n /*00a0*/ @P0 EXIT ;\n /*00b0*/ MOV R0, c[0x0][0x188] ;\n /*00c0*/ IMAD R7, R2, c[0x0][0x17c], R9 ;\n /*00d0*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*00e0*/ IMAD R10, R14, 0x60, R15 ;\n /*00f0*/ ISETP.GE.AND P0, PT, R0, 0x1, PT ;\n /*0100*/ SHF.R.S32.HI R8, RZ, 0x1f, R7 ;\n /*0110*/ IMAD.SHL.U32 R4, R10, 0x2, RZ ;\n /*0120*/ LEA R6, R0, 0x3, 0x1 ;\n /*0130*/ @!P0 BRA `(.L_x_0) ;\n /*0140*/ IADD3 R11, R0.reuse, -0x1, RZ ;\n /*0150*/ IMAD.SHL.U32 R28, R3, 0x20, RZ ;\n /*0160*/ LOP3.LUT R5, R0, 0x3, RZ, 0xc0, !PT ;\n /*0170*/ IMAD.MOV.U32 R27, RZ, RZ, RZ ;\n /*0180*/ ISETP.GE.U32.AND P1, PT, R11, 0x3, PT ;\n /*0190*/ IMAD R28, R6, R28, R15 ;\n /*01a0*/ ISETP.NE.AND P0, PT, R5, RZ, PT ;\n /*01b0*/ LEA R11, R0, 0x180, 0x8 ;\n /*01c0*/ @!P1 BRA `(.L_x_1) ;\n /*01d0*/ IADD3 R29, -R5, c[0x0][0x188], RZ ;\n /*01e0*/ IMAD.IADD R26, R28, 0x1, R11 ;\n /*01f0*/ MOV R27, RZ ;\n.L_x_2:\n /*0200*/ IMAD R12, R27, 0x20, R9 ;\n /*0210*/ ISETP.GT.AND P1, PT, R12, -0x1, PT ;\n /*0220*/ IMAD.SHL.U32 R12, R27, 0x20, RZ ;\n /*0230*/ SEL R16, RZ, c[0x0][0x17c], P1 ;\n /*0240*/ IADD3 R18, R12.reuse, 0x20, RZ ;\n /*0250*/ IADD3 R22, R12.reuse, 0x60, RZ ;\n /*0260*/ IMAD R16, R27, 0x20, R16 ;\n /*0270*/ IADD3 R20, R12, 0x40, RZ ;\n /*0280*/ IMAD.IADD R13, R9, 0x1, R18 ;\n /*0290*/ IADD3 R31, P2, R7, R16, RZ ;\n /*02a0*/ ISETP.GT.AND P1, PT, R13, -0x1, PT ;\n /*02b0*/ IMAD.IADD R13, R9, 0x1, R22 ;\n /*02c0*/ LEA.HI.X.SX32 R16, R16, R8, 0x1, P2 ;\n /*02d0*/ IMAD.SHL.U32 R23, R31, 0x4, RZ ;\n /*02e0*/ IADD3 R12, R9, R20, RZ ;\n /*02f0*/ ISETP.GT.AND P2, PT, R13, -0x1, PT ;\n /*0300*/ SEL R13, RZ, c[0x0][0x17c], P1 ;\n /*0310*/ ISETP.GT.AND P3, PT, R12, -0x1, PT ;\n /*0320*/ SHF.L.U64.HI R31, R31, 0x2, R16 ;\n /*0330*/ IMAD.IADD R16, R18, 0x1, R13 ;\n /*0340*/ SEL R17, RZ, c[0x0][0x17c], P3 ;\n /*0350*/ IADD3 R12, P1, R23, c[0x0][0x168], RZ ;\n /*0360*/ SEL R19, RZ, c[0x0][0x17c], P2 ;\n /*0370*/ IMAD.IADD R21, R20, 0x1, R17 ;\n /*0380*/ IADD3 R25, P2, R7, R16, RZ ;\n /*0390*/ IADD3.X R13, R31, c[0x0][0x16c], RZ, P1, !PT ;\n /*03a0*/ IADD3 R18, P1, R23, c[0x0][0x170], RZ ;\n /*03b0*/ LEA.HI.X.SX32 R24, R16, R8, 0x1, P2 ;\n /*03c0*/ LDG.E R30, [R12.64] ;\n /*03d0*/ IADD3 R22, R22, R19, RZ ;\n /*03e0*/ IADD3 R16, P2, R7, R21, RZ ;\n /*03f0*/ IADD3.X R19, R31, c[0x0][0x174], RZ, P1, !PT ;\n /*0400*/ SHF.L.U64.HI R17, R25.reuse, 0x2, R24 ;\n /*0410*/ IMAD.SHL.U32 R25, R25, 0x4, RZ ;\n /*0420*/ IADD3 R20, P1, R7, R22, RZ ;\n /*0430*/ IMAD.SHL.U32 R13, R16, 0x4, RZ ;\n /*0440*/ LEA.HI.X.SX32 R21, R21, R8.reuse, 0x1, P2 ;\n /*0450*/ LDG.E R31, [R18.64] ;\n /*0460*/ LEA.HI.X.SX32 R23, R22, R8, 0x1, P1 ;\n /*0470*/ IADD3 R24, P1, R25.reuse, c[0x0][0x168], RZ ;\n /*0480*/ SHF.L.U64.HI R21, R16, 0x2, R21 ;\n /*0490*/ IMAD.SHL.U32 R22, R20, 0x4, RZ ;\n /*04a0*/ IADD3 R16, P2, R25, c[0x0][0x170], RZ ;\n /*04b0*/ IADD3.X R25, R17, c[0x0][0x16c], RZ, P1, !PT ;\n /*04c0*/ IADD3 R12, P1, R13, c[0x0][0x168], RZ ;\n /*04d0*/ SHF.L.U64.HI R23, R20, 0x2, R23 ;\n /*04e0*/ LDG.E R24, [R24.64] ;\n /*04f0*/ IADD3.X R17, R17, c[0x0][0x174], RZ, P2, !PT ;\n /*0500*/ IADD3 R18, P3, R13, c[0x0][0x170], RZ ;\n /*0510*/ IADD3 R20, P2, R22, c[0x0][0x168], RZ ;\n /*0520*/ LDG.E R16, [R16.64] ;\n /*0530*/ IADD3.X R13, R21, c[0x0][0x16c], RZ, P1, !PT ;\n /*0540*/ IADD3 R22, P1, R22, c[0x0][0x170], RZ ;\n /*0550*/ IADD3.X R19, R21, c[0x0][0x174], RZ, P3, !PT ;\n /*0560*/ LDG.E R12, [R12.64] ;\n /*0570*/ IADD3.X R21, R23.reuse, c[0x0][0x16c], RZ, P2, !PT ;\n /*0580*/ IADD3.X R23, R23, c[0x0][0x174], RZ, P1, !PT ;\n /*0590*/ LDG.E R19, [R18.64] ;\n /*05a0*/ LDG.E R20, [R20.64] ;\n /*05b0*/ LDG.E R23, [R22.64] ;\n /*05c0*/ IMAD R25, R27.reuse, 0x20, R28 ;\n /*05d0*/ LEA R32, R27, R26, 0x5 ;\n /*05e0*/ IADD3 R29, R29, -0x4, RZ ;\n /*05f0*/ ISETP.NE.AND P1, PT, R29, RZ, PT ;\n /*0600*/ IADD3 R27, R27, 0x4, RZ ;\n /*0610*/ STS [R25.X4], R30 ;\n /*0620*/ STS [R32.X4], R31 ;\n /*0630*/ STS [R25.X4+0x80], R24 ;\n /*0640*/ STS [R32.X4+0x80], R16 ;\n /*0650*/ STS [R25.X4+0x100], R12 ;\n /*0660*/ STS [R32.X4+0x100], R19 ;\n /*0670*/ STS [R25.X4+0x180], R20 ;\n /*0680*/ STS [R32.X4+0x180], R23 ;\n /*0690*/ @P1 BRA `(.L_x_2) ;\n.L_x_1:\n /*06a0*/ @!P0 BRA `(.L_x_0) ;\n /*06b0*/ IMAD.SHL.U32 R27, R27, 0x20, RZ ;\n /*06c0*/ IMAD.MOV R12, RZ, RZ, -c[0x0][0x188] ;\n /*06d0*/ IMAD.IADD R9, R27, 0x1, R10 ;\n /*06e0*/ IADD3 R11, R28.reuse, R27, R11 ;\n /*06f0*/ IMAD.IADD R28, R28, 0x1, R27 ;\n /*0700*/ LEA R9, R12, R9, 0x5 ;\n /*0710*/ IMAD.SHL.U32 R11, R11, 0x4, RZ ;\n /*0720*/ IMAD.SHL.U32 R28, R28, 0x4, RZ ;\n.L_x_3:\n /*0730*/ ISETP.GT.AND P0, PT, R9, -0x1, PT ;\n /*0740*/ SEL R12, RZ, c[0x0][0x17c], P0 ;\n /*0750*/ IMAD.IADD R12, R12, 0x1, R27 ;\n /*0760*/ IADD3 R17, P0, R7, R12, RZ ;\n /*0770*/ LEA.HI.X.SX32 R12, R12, R8, 0x1, P0 ;\n /*0780*/ IMAD.SHL.U32 R16, R17, 0x4, RZ ;\n /*0790*/ SHF.L.U64.HI R17, R17, 0x2, R12 ;\n /*07a0*/ IADD3 R12, P0, R16.reuse, c[0x0][0x168], RZ ;\n /*07b0*/ IADD3 R16, P1, R16, c[0x0][0x170], RZ ;\n /*07c0*/ IADD3.X R13, R17.reuse, c[0x0][0x16c], RZ, P0, !PT ;\n /*07d0*/ IADD3.X R17, R17, c[0x0][0x174], RZ, P1, !PT ;\n /*07e0*/ LDG.E R13, [R12.64] ;\n /*07f0*/ LDG.E R16, [R16.64] ;\n /*0800*/ IADD3 R5, R5, -0x1, RZ ;\n /*0810*/ IADD3 R9, R9, 0x20, RZ ;\n /*0820*/ ISETP.NE.AND P0, PT, R5, RZ, PT ;\n /*0830*/ IADD3 R27, R27, 0x20, RZ ;\n /*0840*/ STS [R28], R13 ;\n /*0850*/ STS [R11], R16 ;\n /*0860*/ IADD3 R28, R28, 0x80, RZ ;\n /*0870*/ IADD3 R11, R11, 0x80, RZ ;\n /*0880*/ @P0 BRA `(.L_x_3) ;\n.L_x_0:\n /*0890*/ ISETP.GT.AND P0, PT, R0, -0x3, PT ;\n /*08a0*/ MOV R24, c[0x0][0x184] ;\n /*08b0*/ LEA.HI R5, R24, c[0x0][0x184], RZ, 0x1 ;\n /*08c0*/ SHF.R.S32.HI R5, RZ, 0x1, R5 ;\n /*08d0*/ @!P0 BRA `(.L_x_4) ;\n /*08e0*/ IADD3 R9, R0, 0x1, RZ ;\n /*08f0*/ ULDC UR4, c[0x0][0x188] ;\n /*0900*/ IMAD R18, R6.reuse, R3, RZ ;\n /*0910*/ ULOP3.LUT UR4, URZ, UR4, URZ, 0x33, !UPT ;\n /*0920*/ IMNMX R9, R6, R9, !PT ;\n /*0930*/ IMAD.SHL.U32 R18, R18, 0x20, RZ ;\n /*0940*/ IADD3 R11, R9.reuse, -c[0x0][0x188], RZ ;\n /*0950*/ IADD3 R9, R9, UR4, RZ ;\n /*0960*/ LOP3.LUT P1, R20, R11, 0x3, RZ, 0xc0, !PT ;\n /*0970*/ ISETP.GE.U32.AND P0, PT, R9, 0x3, PT ;\n /*0980*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x188] ;\n /*0990*/ @!P1 BRA `(.L_x_5) ;\n /*09a0*/ IMAD.SHL.U32 R9, R0, 0x20, RZ ;\n /*09b0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x4 ;\n /*09c0*/ IMAD R11, R2, c[0x0][0x17c], R15 ;\n /*09d0*/ IMAD.WIDE R16, R9, R12, c[0x0][0x170] ;\n /*09e0*/ IMAD.WIDE R12, R9, R12, c[0x0][0x168] ;\n /*09f0*/ IMAD R22, R14, 0x60, R11 ;\n /*0a00*/ MOV R11, R16 ;\n /*0a10*/ IMAD R14, R0, 0x120, R18 ;\n /*0a20*/ IMAD.MOV.U32 R21, RZ, RZ, R12 ;\n /*0a30*/ IADD3 R12, R9.reuse, R15.reuse, R18 ;\n /*0a40*/ IMAD.IADD R22, R9, 0x1, -R22 ;\n /*0a50*/ IADD3 R14, R14, R15, RZ ;\n /*0a60*/ IMAD.MOV.U32 R19, RZ, RZ, R17 ;\n /*0a70*/ IMAD.MOV.U32 R23, RZ, RZ, R13 ;\n /*0a80*/ LEA R14, R14, 0x600, 0x2 ;\n /*0a90*/ IMAD.MOV.U32 R26, RZ, RZ, R10 ;\n /*0aa0*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x188] ;\n /*0ab0*/ IMAD.SHL.U32 R25, R12, 0x4, RZ ;\n.L_x_6:\n /*0ac0*/ ISETP.GE.AND P1, PT, R26, c[0x0][0x17c], PT ;\n /*0ad0*/ SEL R13, RZ, c[0x0][0x17c], !P1 ;\n /*0ae0*/ IMAD.IADD R13, R22, 0x1, R13 ;\n /*0af0*/ IMAD.WIDE R16, R13, 0x4, RZ ;\n /*0b00*/ IADD3 R12, P1, -R16.reuse, R21, RZ ;\n /*0b10*/ IADD3 R16, P2, -R16, R11, RZ ;\n /*0b20*/ IADD3.X R13, ~R17, R23, RZ, P1, !PT ;\n /*0b30*/ IMAD.X R17, R19, 0x1, ~R17, P2 ;\n /*0b40*/ LDG.E R12, [R12.64] ;\n /*0b50*/ LDG.E R17, [R16.64] ;\n /*0b60*/ IADD3 R20, R20, -0x1, RZ ;\n /*0b70*/ IADD3 R21, P3, R21, 0x80, RZ ;\n /*0b80*/ ISETP.NE.AND P1, PT, R20, RZ, PT ;\n /*0b90*/ IADD3 R11, P2, R11, 0x80, RZ ;\n /*0ba0*/ IMAD.X R23, RZ, RZ, R23, P3 ;\n /*0bb0*/ IADD3 R9, R9, 0x1, RZ ;\n /*0bc0*/ IADD3 R26, R26, 0x20, RZ ;\n /*0bd0*/ IMAD.X R19, RZ, RZ, R19, P2 ;\n /*0be0*/ STS [R25], R12 ;\n /*0bf0*/ STS [R14], R17 ;\n /*0c00*/ IADD3 R25, R25, 0x80, RZ ;\n /*0c10*/ IADD3 R14, R14, 0x80, RZ ;\n /*0c20*/ @P1 BRA `(.L_x_6) ;\n.L_x_5:\n /*0c30*/ @!P0 BRA `(.L_x_4) ;\n /*0c40*/ IMAD.SHL.U32 R25, R9, 0x20, RZ ;\n /*0c50*/ IMAD.MOV R13, RZ, RZ, -c[0x0][0x188] ;\n /*0c60*/ LEA R11, R6, R25, 0x7 ;\n /*0c70*/ IADD3 R10, R10, 0x60, R25 ;\n /*0c80*/ IADD3 R11, R15.reuse, R11, R18.reuse ;\n /*0c90*/ IADD3 R26, R15, R25, R18 ;\n /*0ca0*/ IMAD R14, R13, 0x20, R10 ;\n /*0cb0*/ IMAD.SHL.U32 R27, R11, 0x4, RZ ;\n /*0cc0*/ LEA R26, R26, 0x100, 0x2 ;\n.L_x_7:\n /*0cd0*/ ISETP.GE.AND P0, PT, R14.reuse, c[0x0][0x17c], PT ;\n /*0ce0*/ IADD3 R12, R14, -0x60, RZ ;\n /*0cf0*/ SEL R10, RZ, c[0x0][0x17c], !P0 ;\n /*0d00*/ ISETP.GE.AND P0, PT, R12, c[0x0][0x17c], PT ;\n /*0d10*/ IADD3 R11, -R10, 0x60, R25 ;\n /*0d20*/ IADD3 R12, R14, -0x40, RZ ;\n /*0d30*/ IADD3 R17, P1, R7, R11, RZ ;\n /*0d40*/ SEL R10, RZ, c[0x0][0x17c], !P0 ;\n /*0d50*/ ISETP.GE.AND P0, PT, R12, c[0x0][0x17c], PT ;\n /*0d60*/ IADD3 R13, R14, -0x20, RZ ;\n /*0d70*/ LEA.HI.X.SX32 R28, R11, R8, 0x1, P1 ;\n /*0d80*/ IMAD.IADD R11, R25, 0x1, -R10 ;\n /*0d90*/ SEL R10, RZ, c[0x0][0x17c], !P0 ;\n /*0da0*/ ISETP.GE.AND P1, PT, R13, c[0x0][0x17c], PT ;\n /*0db0*/ SHF.L.U64.HI R28, R17, 0x2, R28 ;\n /*0dc0*/ IADD3 R13, P0, R7, R11, RZ ;\n /*0dd0*/ SHF.L.U32 R17, R17, 0x2, RZ ;\n /*0de0*/ IADD3 R12, -R10, 0x20, R25 ;\n /*0df0*/ IMAD.SHL.U32 R20, R13, 0x4, RZ ;\n /*0e00*/ SEL R16, RZ, c[0x0][0x17c], !P1 ;\n /*0e10*/ LEA.HI.X.SX32 R18, R11, R8, 0x1, P0 ;\n /*0e20*/ IADD3 R10, P1, R17, c[0x0][0x168], RZ ;\n /*0e30*/ IADD3 R32, P0, R7, R12, RZ ;\n /*0e40*/ IADD3 R16, -R16, 0x40, R25 ;\n /*0e50*/ IADD3.X R11, R28, c[0x0][0x16c], RZ, P1, !PT ;\n /*0e60*/ SHF.L.U64.HI R13, R13, 0x2, R18 ;\n /*0e70*/ LEA.HI.X.SX32 R19, R12, R8, 0x1, P0 ;\n /*0e80*/ LDG.E R29, [R10.64] ;\n /*0e90*/ IADD3 R18, P1, R7, R16, RZ ;\n /*0ea0*/ IADD3 R22, P0, R20, c[0x0][0x168], RZ ;\n /*0eb0*/ SHF.L.U64.HI R19, R32.reuse, 0x2, R19 ;\n /*0ec0*/ IMAD.SHL.U32 R32, R32, 0x4, RZ ;\n /*0ed0*/ LEA.HI.X.SX32 R33, R16, R8, 0x1, P1 ;\n /*0ee0*/ IADD3.X R23, R13.reuse, c[0x0][0x16c], RZ, P0, !PT ;\n /*0ef0*/ IADD3 R20, P0, R20, c[0x0][0x170], RZ ;\n /*0f00*/ SHF.L.U64.HI R30, R18.reuse, 0x2, R33 ;\n /*0f10*/ IMAD.SHL.U32 R18, R18, 0x4, RZ ;\n /*0f20*/ IADD3 R12, P1, R32, c[0x0][0x168], RZ ;\n /*0f30*/ LDG.E R31, [R22.64] ;\n /*0f40*/ IADD3.X R21, R13, c[0x0][0x174], RZ, P0, !PT ;\n /*0f50*/ IADD3 R10, P0, R32, c[0x0][0x170], RZ ;\n /*0f60*/ IADD3.X R13, R19.reuse, c[0x0][0x16c], RZ, P1, !PT ;\n /*0f70*/ LDG.E R20, [R20.64] ;\n /*0f80*/ IADD3 R16, P1, R18.reuse, c[0x0][0x168], RZ ;\n /*0f90*/ IADD3 R18, P2, R18, c[0x0][0x170], RZ ;\n /*0fa0*/ IADD3.X R11, R19, c[0x0][0x174], RZ, P0, !PT ;\n /*0fb0*/ LDG.E R13, [R12.64] ;\n /*0fc0*/ IADD3 R22, P0, R17, c[0x0][0x170], RZ ;\n /*0fd0*/ IADD3.X R17, R30.reuse, c[0x0][0x16c], RZ, P1, !PT ;\n /*0fe0*/ LDG.E R10, [R10.64] ;\n /*0ff0*/ IADD3.X R19, R30, c[0x0][0x174], RZ, P2, !PT ;\n /*1000*/ IADD3.X R23, R28, c[0x0][0x174], RZ, P0, !PT ;\n /*1010*/ LDG.E R17, [R16.64] ;\n /*1020*/ LDG.E R18, [R18.64] ;\n /*1030*/ LDG.E R22, [R22.64] ;\n /*1040*/ IADD3 R9, R9, 0x4, RZ ;\n /*1050*/ ISETP.GE.AND P0, PT, R9, R6, PT ;\n /*1060*/ IADD3 R14, R14, 0x80, RZ ;\n /*1070*/ IADD3 R25, R25, 0x80, RZ ;\n /*1080*/ STS [R26+-0x100], R31 ;\n /*1090*/ STS [R27], R20 ;\n /*10a0*/ STS [R26+-0x80], R13 ;\n /*10b0*/ STS [R27+0x80], R10 ;\n /*10c0*/ STS [R26], R17 ;\n /*10d0*/ STS [R27+0x100], R18 ;\n /*10e0*/ STS [R26+0x80], R29 ;\n /*10f0*/ STS [R27+0x180], R22 ;\n /*1100*/ IADD3 R26, R26, 0x200, RZ ;\n /*1110*/ IADD3 R27, R27, 0x200, RZ ;\n /*1120*/ @!P0 BRA `(.L_x_7) ;\n.L_x_4:\n /*1130*/ IMAD R2, R2, c[0x0][0x180], R4 ;\n /*1140*/ IADD3 R9, -R5, 0x41, RZ ;\n /*1150*/ IMAD.SHL.U32 R13, R3, 0x20, RZ ;\n /*1160*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*1170*/ ISETP.GT.AND P0, PT, R24, 0x1, PT ;\n /*1180*/ IADD3 R7, -R5, 0x1, RZ ;\n /*1190*/ SHF.R.S32.HI R8, RZ, 0x1f, R2 ;\n /*11a0*/ ULDC UR4, c[0x0][0x17c] ;\n /*11b0*/ IADD3 R12, P2, R2.reuse, R9, RZ ;\n /*11c0*/ ULDC UR5, c[0x0][0x184] ;\n /*11d0*/ IADD3 R11, P1, R2, R7, RZ ;\n /*11e0*/ ULEA UR4, UR4, UR5, 0x1 ;\n /*11f0*/ LEA.HI.X.SX32 R9, R9, R8, 0x1, P2 ;\n /*1200*/ LEA.HI.X.SX32 R14, R7, R8, 0x1, P1 ;\n /*1210*/ UIADD3 UR4, UR4, -0x2, URZ ;\n /*1220*/ LEA R2, P2, R12.reuse, c[0x0][0x160], 0x2 ;\n /*1230*/ IADD3 R8, R13, 0x80, RZ ;\n /*1240*/ LEA R10, P1, R11, c[0x0][0x160], 0x2 ;\n /*1250*/ IADD3 R7, R5, -0x1, RZ ;\n /*1260*/ LEA.HI.X R3, R12, c[0x0][0x164], R9, 0x2, P2 ;\n /*1270*/ IMAD R9, R6.reuse, R13, R15.reuse ;\n /*1280*/ LEA.HI.X R11, R11, c[0x0][0x164], R14, 0x2, P1 ;\n /*1290*/ IMAD R15, R6, R8, R15 ;\n /*12a0*/ IADD3 R16, R4, 0x1, RZ ;\n /*12b0*/ IADD3 R17, R7, c[0x0][0x180], RZ ;\n /*12c0*/ @P0 BRA `(.L_x_8) ;\n /*12d0*/ ISETP.GE.AND P0, PT, R16, UR4, PT ;\n /*12e0*/ BSSY B0, `(.L_x_9) ;\n /*12f0*/ IADD3 R0, R4.reuse, 0x41, RZ ;\n /*1300*/ IADD3 R8, R4, 0x81, RZ ;\n /*1310*/ ISETP.GE.AND P2, PT, R0, UR4, PT ;\n /*1320*/ ISETP.GE.AND P3, PT, R8, UR4, PT ;\n /*1330*/ @P0 BRA `(.L_x_10) ;\n /*1340*/ ISETP.GE.AND P0, PT, R4, R7.reuse, PT ;\n /*1350*/ ISETP.GE.AND P1, PT, R16, R7, PT ;\n /*1360*/ ISETP.GE.OR P0, PT, R4, R17.reuse, !P0 ;\n /*1370*/ ISETP.GE.OR P1, PT, R16, R17, !P1 ;\n /*1380*/ @!P0 STG.E [R10.64], RZ ;\n /*1390*/ @!P1 STG.E [R10.64+0x4], RZ ;\n.L_x_10:\n /*13a0*/ BSYNC B0 ;\n.L_x_9:\n /*13b0*/ BSSY B0, `(.L_x_11) ;\n /*13c0*/ @P2 BRA `(.L_x_12) ;\n /*13d0*/ IADD3 R6, R4, 0x40, RZ ;\n /*13e0*/ ISETP.GE.AND P1, PT, R0, R7.reuse, PT ;\n /*13f0*/ ISETP.GE.AND P0, PT, R6, R7, PT ;\n /*1400*/ ISETP.GE.OR P1, PT, R0, R17, !P1 ;\n /*1410*/ ISETP.GE.OR P0, PT, R6, R17, !P0 ;\n /*1420*/ @!P1 STG.E [R2.64+0x4], RZ ;\n /*1430*/ @!P0 STG.E [R2.64], RZ ;\n.L_x_12:\n /*1440*/ BSYNC B0 ;\n.L_x_11:\n /*1450*/ @P3 EXIT ;\n /*1460*/ IADD3 R4, R4, 0x80, RZ ;\n /*1470*/ ISETP.GE.AND P1, PT, R8, R7.reuse, PT ;\n /*1480*/ ISETP.GE.AND P0, PT, R4, R7, PT ;\n /*1490*/ ISETP.GE.OR P1, PT, R8, R17, !P1 ;\n /*14a0*/ ISETP.GE.OR P0, PT, R4, R17, !P0 ;\n /*14b0*/ @!P0 STG.E [R2.64+0x100], RZ ;\n /*14c0*/ @P1 EXIT ;\n /*14d0*/ STG.E [R2.64+0x104], RZ ;\n /*14e0*/ EXIT ;\n.L_x_8:\n /*14f0*/ ISETP.GE.AND P0, PT, R16, UR4, PT ;\n /*1500*/ BSSY B0, `(.L_x_13) ;\n /*1510*/ @P0 BRA `(.L_x_14) ;\n /*1520*/ ISETP.GE.U32.AND P0, PT, R7, 0x3, PT ;\n /*1530*/ IMAD R8, R0.reuse, 0x20, R15 ;\n /*1540*/ LEA R14, R0, R9, 0x5 ;\n /*1550*/ IMAD.MOV.U32 R23, RZ, RZ, RZ ;\n /*1560*/ LOP3.LUT R6, R5, 0x3, RZ, 0xc0, !PT ;\n /*1570*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ;\n /*1580*/ CS2R R20, SRZ ;\n /*1590*/ @!P0 BRA `(.L_x_15) ;\n /*15a0*/ IMAD.IADD R20, R5, 0x1, -R6 ;\n /*15b0*/ CS2R R22, SRZ ;\n /*15c0*/ MOV R25, RZ ;\n.L_x_16:\n /*15d0*/ IMAD.SHL.U32 R18, R22, 0x2, RZ ;\n /*15e0*/ IMAD.MOV.U32 R19, RZ, RZ, 0x4 ;\n /*15f0*/ IMAD.WIDE R12, R18, R19, c[0x3][0x8] ;\n /*1600*/ LDG.E R34, [R12.64] ;\n /*1610*/ LDG.E R32, [R12.64+0x4] ;\n /*1620*/ IMAD.WIDE R18, R18, R19, c[0x3][0x0] ;\n /*1630*/ LDG.E R30, [R12.64+0xc] ;\n /*1640*/ LDG.E R26, [R18.64] ;\n /*1650*/ LDG.E R28, [R18.64+0x4] ;\n /*1660*/ LDG.E R29, [R18.64+0xc] ;\n /*1670*/ LDG.E R27, [R12.64+0x8] ;\n /*1680*/ LDG.E R31, [R18.64+0x8] ;\n /*1690*/ IMAD.IADD R24, R8, 0x1, R25 ;\n /*16a0*/ LDG.E R36, [R12.64+0x14] ;\n /*16b0*/ LDS R33, [R24.X4] ;\n /*16c0*/ IMAD.IADD R25, R14, 0x1, R25 ;\n /*16d0*/ LDG.E R37, [R12.64+0x1c] ;\n /*16e0*/ FMUL R34, R33.reuse, R34 ;\n /*16f0*/ FMUL R35, R33, R32 ;\n /*1700*/ LDS R33, [R25.X4] ;\n /*1710*/ LDS R32, [R25.X4+-0x4] ;\n /*1720*/ FFMA R26, R33.reuse, R26, R34 ;\n /*1730*/ FFMA R28, R33, R28, R35 ;\n /*1740*/ LDG.E R34, [R12.64+0x18] ;\n /*1750*/ LDS R33, [R24.X4+-0x4] ;\n /*1760*/ LDG.E R35, [R18.64+0x1c] ;\n /*1770*/ FMUL R30, R33.reuse, R30 ;\n /*1780*/ FMUL R27, R33, R27 ;\n /*1790*/ LDG.E R33, [R18.64+0x10] ;\n /*17a0*/ FFMA R29, R32, R29, R30 ;\n /*17b0*/ LDG.E R30, [R12.64+0x10] ;\n /*17c0*/ FFMA R27, R32, R31, R27 ;\n /*17d0*/ LDG.E R32, [R18.64+0x14] ;\n /*17e0*/ LDG.E R31, [R18.64+0x18] ;\n /*17f0*/ FADD R26, R26, R21 ;\n /*1800*/ LDS R13, [R24.X4+-0x8] ;\n /*1810*/ FADD R28, R28, R23 ;\n /*1820*/ LDS R21, [R25.X4+-0x8] ;\n /*1830*/ LDS R23, [R24.X4+-0xc] ;\n /*1840*/ LDS R25, [R25.X4+-0xc] ;\n /*1850*/ IADD3 R20, R20, -0x4, RZ ;\n /*1860*/ ISETP.NE.AND P0, PT, R20, RZ, PT ;\n /*1870*/ FADD R26, R26, R27 ;\n /*1880*/ FADD R28, R28, R29 ;\n /*1890*/ FMUL R36, R13, R36 ;\n /*18a0*/ FMUL R12, R23.reuse, R37 ;\n /*18b0*/ FMUL R34, R23, R34 ;\n /*18c0*/ FFMA R35, R25, R35, R12 ;\n /*18d0*/ IADD3 R12, R22, 0x4, RZ ;\n /*18e0*/ FMUL R30, R13, R30 ;\n /*18f0*/ FFMA R33, R21.reuse, R33, R30 ;\n /*1900*/ FFMA R21, R21, R32, R36 ;\n /*1910*/ FADD R26, R26, R33 ;\n /*1920*/ FADD R28, R28, R21 ;\n /*1930*/ FFMA R31, R25, R31, R34 ;\n /*1940*/ IADD3 R25, -R22, -0x4, RZ ;\n /*1950*/ FADD R23, R28, R35 ;\n /*1960*/ FADD R21, R26, R31 ;\n /*1970*/ MOV R22, R12 ;\n /*1980*/ @P0 BRA `(.L_x_16) ;\n /*1990*/ IMAD.MOV.U32 R20, RZ, RZ, R12 ;\n.L_x_15:\n /*19a0*/ ISETP.NE.AND P2, PT, R6, RZ, PT ;\n /*19b0*/ ISETP.GE.AND P0, PT, R16, R7, PT ;\n /*19c0*/ ISETP.GE.AND P1, PT, R4, R7, PT ;\n /*19d0*/ ISETP.GE.OR P0, PT, R16, R17.reuse, !P0 ;\n /*19e0*/ ISETP.GE.OR P1, PT, R4, R17, !P1 ;\n /*19f0*/ @!P2 BRA `(.L_x_17) ;\n /*1a00*/ IMAD.SHL.U32 R12, R20, 0x2, RZ ;\n /*1a10*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*1a20*/ IMAD.WIDE R18, R12, R13, c[0x3][0x8] ;\n /*1a30*/ IMAD.WIDE R12, R12, R13, c[0x3][0x0] ;\n /*1a40*/ LDG.E R27, [R18.64] ;\n /*1a50*/ LDG.E R29, [R18.64+0x4] ;\n /*1a60*/ LDG.E R16, [R12.64] ;\n /*1a70*/ LDG.E R26, [R12.64+0x4] ;\n /*1a80*/ IMAD.IADD R22, R8, 0x1, R25 ;\n /*1a90*/ IADD3 R25, R14, R25, RZ ;\n /*1aa0*/ ISETP.NE.AND P2, PT, R6, 0x1, PT ;\n /*1ab0*/ LDS R22, [R22.X4] ;\n /*1ac0*/ LDS R25, [R25.X4] ;\n /*1ad0*/ FMUL R24, R22.reuse, R27 ;\n /*1ae0*/ FMUL R29, R22, R29 ;\n /*1af0*/ FFMA R16, R25.reuse, R16, R24 ;\n /*1b00*/ FFMA R26, R25, R26, R29 ;\n /*1b10*/ FADD R21, R21, R16 ;\n /*1b20*/ FADD R23, R23, R26 ;\n /*1b30*/ @!P2 BRA `(.L_x_17) ;\n /*1b40*/ ISETP.NE.AND P2, PT, R6, 0x2, PT ;\n /*1b50*/ LDG.E R31, [R18.64+0x8] ;\n /*1b60*/ LDG.E R27, [R18.64+0xc] ;\n /*1b70*/ LDG.E R26, [R12.64+0x8] ;\n /*1b80*/ LDG.E R16, [R12.64+0xc] ;\n /*1b90*/ @P2 LDG.E R6, [R18.64+0x10] ;\n /*1ba0*/ @P2 LDG.E R24, [R18.64+0x14] ;\n /*1bb0*/ @P2 LDG.E R22, [R12.64+0x10] ;\n /*1bc0*/ @P2 LDG.E R25, [R12.64+0x14] ;\n /*1bd0*/ LOP3.LUT R29, RZ, R20, RZ, 0x33, !PT ;\n /*1be0*/ IMAD.IADD R8, R8, 0x1, R29.reuse ;\n /*1bf0*/ IMAD.IADD R14, R14, 0x1, R29 ;\n /*1c00*/ IMAD.SHL.U32 R28, R8, 0x4, RZ ;\n /*1c10*/ IMAD.SHL.U32 R20, R14, 0x4, RZ ;\n /*1c20*/ LDS R8, [R28] ;\n /*1c30*/ LDS R29, [R20] ;\n /*1c40*/ @P2 LDS R33, [R28+-0x4] ;\n /*1c50*/ @P2 LDS R18, [R20+-0x4] ;\n /*1c60*/ FMUL R14, R8.reuse, R31 ;\n /*1c70*/ FMUL R27, R8, R27 ;\n /*1c80*/ FFMA R14, R29.reuse, R26, R14 ;\n /*1c90*/ FFMA R16, R29, R16, R27 ;\n /*1ca0*/ FADD R21, R21, R14 ;\n /*1cb0*/ @P2 FMUL R13, R33, R6 ;\n /*1cc0*/ FADD R23, R23, R16 ;\n /*1cd0*/ @P2 FMUL R24, R33, R24 ;\n /*1ce0*/ @P2 FFMA R22, R18.reuse, R22, R13 ;\n /*1cf0*/ @P2 FFMA R24, R18, R25, R24 ;\n /*1d00*/ @P2 FADD R21, R21, R22 ;\n /*1d10*/ @P2 FADD R23, R23, R24 ;\n.L_x_17:\n /*1d20*/ @!P1 STG.E [R10.64], R21 ;\n /*1d30*/ @!P0 STG.E [R10.64+0x4], R23 ;\n.L_x_14:\n /*1d40*/ BSYNC B0 ;\n.L_x_13:\n /*1d50*/ IADD3 R6, R4, 0x41, RZ ;\n /*1d60*/ BSSY B0, `(.L_x_18) ;\n /*1d70*/ ISETP.GE.AND P0, PT, R6, UR4, PT ;\n /*1d80*/ @P0 BRA `(.L_x_19) ;\n /*1d90*/ ISETP.GE.U32.AND P0, PT, R7, 0x3, PT ;\n /*1da0*/ IMAD R14, R0.reuse, 0x20, R15 ;\n /*1db0*/ LEA R8, R0, R9, 0x5 ;\n /*1dc0*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ;\n /*1dd0*/ LOP3.LUT R16, R5, 0x3, RZ, 0xc0, !PT ;\n /*1de0*/ IMAD.MOV.U32 R27, RZ, RZ, RZ ;\n /*1df0*/ MOV R21, RZ ;\n /*1e00*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ;\n /*1e10*/ @!P0 BRA `(.L_x_20) ;\n /*1e20*/ IMAD.IADD R35, R5, 0x1, -R16 ;\n /*1e30*/ IMAD.MOV.U32 R25, RZ, RZ, RZ ;\n /*1e40*/ IMAD.MOV.U32 R27, RZ, RZ, RZ ;\n /*1e50*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ;\n.L_x_21:\n /*1e60*/ SHF.L.U32 R12, R18, 0x1, RZ ;\n /*1e70*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*1e80*/ IMAD.WIDE R10, R12, R13, c[0x3][0x8] ;\n /*1e90*/ LDG.E R29, [R10.64] ;\n /*1ea0*/ LDG.E R37, [R10.64+0x4] ;\n /*1eb0*/ IMAD.WIDE R12, R12, R13, c[0x3][0x0] ;\n /*1ec0*/ LDG.E R20, [R10.64+0x8] ;\n /*1ed0*/ LDG.E R33, [R12.64+0x8] ;\n /*1ee0*/ LDG.E R30, [R10.64+0xc] ;\n /*1ef0*/ LDG.E R26, [R12.64] ;\n /*1f00*/ LDG.E R19, [R12.64+0x4] ;\n /*1f10*/ IMAD.IADD R23, R14, 0x1, R27 ;\n /*1f20*/ IMAD.IADD R22, R8, 0x1, R27 ;\n /*1f30*/ LDG.E R34, [R10.64+0x10] ;\n /*1f40*/ LDS R28, [R23.X4+0x80] ;\n /*1f50*/ LDS R31, [R23.X4+0x7c] ;\n /*1f60*/ LDS R24, [R22.X4+0x80] ;\n /*1f70*/ LDG.E R36, [R10.64+0x1c] ;\n /*1f80*/ FMUL R27, R28, R29 ;\n /*1f90*/ LDG.E R29, [R12.64+0xc] ;\n /*1fa0*/ FMUL R32, R28, R37 ;\n /*1fb0*/ LDS R28, [R22.X4+0x7c] ;\n /*1fc0*/ FMUL R37, R31, R20 ;\n /*1fd0*/ LDG.E R20, [R12.64+0x18] ;\n /*1fe0*/ FFMA R26, R24, R26, R27 ;\n /*1ff0*/ LDG.E R27, [R12.64+0x10] ;\n /*2000*/ FFMA R19, R24, R19, R32 ;\n /*2010*/ LDG.E R24, [R12.64+0x14] ;\n /*2020*/ LDG.E R32, [R12.64+0x1c] ;\n /*2030*/ LDS R13, [R22.X4+0x74] ;\n /*2040*/ FFMA R33, R28, R33, R37 ;\n /*2050*/ FMUL R37, R31, R30 ;\n /*2060*/ LDG.E R31, [R10.64+0x14] ;\n /*2070*/ LDG.E R30, [R10.64+0x18] ;\n /*2080*/ IADD3 R35, R35, -0x4, RZ ;\n /*2090*/ FADD R26, R26, R21 ;\n /*20a0*/ ISETP.NE.AND P0, PT, R35, RZ, PT ;\n /*20b0*/ FADD R12, R19, R25 ;\n /*20c0*/ FADD R26, R26, R33 ;\n /*20d0*/ IADD3 R10, R18, 0x4, RZ ;\n /*20e0*/ FFMA R29, R28, R29, R37 ;\n /*20f0*/ LDS R37, [R23.X4+0x78] ;\n /*2100*/ LDS R23, [R23.X4+0x74] ;\n /*2110*/ LDS R28, [R22.X4+0x78] ;\n /*2120*/ FADD R12, R12, R29 ;\n /*2130*/ FMUL R21, R37.reuse, R34 ;\n /*2140*/ FMUL R31, R37, R31 ;\n /*2150*/ FFMA R21, R28.reuse, R27, R21 ;\n /*2160*/ FMUL R30, R23.reuse, R30 ;\n /*2170*/ FFMA R31, R28, R24, R31 ;\n /*2180*/ FMUL R23, R23, R36 ;\n /*2190*/ FADD R21, R26, R21 ;\n /*21a0*/ FFMA R20, R13.reuse, R20, R30 ;\n /*21b0*/ FADD R12, R12, R31 ;\n /*21c0*/ FFMA R23, R13, R32, R23 ;\n /*21d0*/ IADD3 R27, -R18, -0x4, RZ ;\n /*21e0*/ FADD R21, R21, R20 ;\n /*21f0*/ IMAD.MOV.U32 R18, RZ, RZ, R10 ;\n /*2200*/ FADD R25, R12, R23 ;\n /*2210*/ @P0 BRA `(.L_x_21) ;\n /*2220*/ MOV R18, R10 ;\n.L_x_20:\n /*2230*/ ISETP.NE.AND P2, PT, R16, RZ, PT ;\n /*2240*/ IADD3 R10, R4, 0x40, RZ ;\n /*2250*/ ISETP.GE.AND P0, PT, R6, R7.reuse, PT ;\n /*2260*/ ISETP.GE.AND P1, PT, R10, R7, PT ;\n /*2270*/ ISETP.GE.OR P0, PT, R6, R17.reuse, !P0 ;\n /*2280*/ ISETP.GE.OR P1, PT, R10, R17, !P1 ;\n /*2290*/ @!P2 BRA `(.L_x_22) ;\n /*22a0*/ IMAD.SHL.U32 R10, R18, 0x2, RZ ;\n /*22b0*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ;\n /*22c0*/ IMAD.WIDE R12, R10, R11, c[0x3][0x8] ;\n /*22d0*/ IMAD.WIDE R10, R10, R11, c[0x3][0x0] ;\n /*22e0*/ LDG.E R20, [R12.64] ;\n /*22f0*/ LDG.E R24, [R12.64+0x4] ;\n /*2300*/ LDG.E R6, [R10.64] ;\n /*2310*/ LDG.E R22, [R10.64+0x4] ;\n /*2320*/ IMAD.IADD R19, R14, 0x1, R27.reuse ;\n /*2330*/ ISETP.NE.AND P2, PT, R16, 0x1, PT ;\n /*2340*/ IMAD.IADD R27, R8, 0x1, R27 ;\n /*2350*/ LDS R19, [R19.X4+0x80] ;\n /*2360*/ LDS R27, [R27.X4+0x80] ;\n /*2370*/ FMUL R20, R19.reuse, R20 ;\n /*2380*/ FMUL R23, R19, R24 ;\n /*2390*/ FFMA R6, R27.reuse, R6, R20 ;\n /*23a0*/ FFMA R22, R27, R22, R23 ;\n /*23b0*/ FADD R21, R21, R6 ;\n /*23c0*/ FADD R25, R25, R22 ;\n /*23d0*/ @!P2 BRA `(.L_x_22) ;\n /*23e0*/ ISETP.NE.AND P2, PT, R16, 0x2, PT ;\n /*23f0*/ LDG.E R27, [R12.64+0x8] ;\n /*2400*/ LDG.E R29, [R12.64+0xc] ;\n /*2410*/ LDG.E R24, [R10.64+0x8] ;\n /*2420*/ LDG.E R22, [R10.64+0xc] ;\n /*2430*/ @P2 LDG.E R6, [R12.64+0x10] ;\n /*2440*/ @P2 LDG.E R19, [R12.64+0x14] ;\n /*2450*/ @P2 LDG.E R16, [R10.64+0x10] ;\n /*2460*/ @P2 LDG.E R20, [R10.64+0x14] ;\n /*2470*/ LOP3.LUT R23, RZ, R18, RZ, 0x33, !PT ;\n /*2480*/ IADD3 R14, R14, R23, RZ ;\n /*2490*/ IMAD.IADD R8, R8, 0x1, R23 ;\n /*24a0*/ IMAD.SHL.U32 R26, R14, 0x4, RZ ;\n /*24b0*/ IMAD.SHL.U32 R18, R8, 0x4, RZ ;\n /*24c0*/ LDS R8, [R26+0x80] ;\n /*24d0*/ LDS R23, [R18+0x80] ;\n /*24e0*/ @P2 LDS R14, [R26+0x7c] ;\n /*24f0*/ @P2 LDS R13, [R18+0x7c] ;\n /*2500*/ FMUL R12, R8.reuse, R27 ;\n /*2510*/ FMUL R29, R8, R29 ;\n /*2520*/ FFMA R12, R23.reuse, R24, R12 ;\n /*2530*/ FFMA R22, R23, R22, R29 ;\n /*2540*/ FADD R21, R21, R12 ;\n /*2550*/ @P2 FMUL R6, R14.reuse, R6 ;\n /*2560*/ FADD R25, R25, R22 ;\n /*2570*/ @P2 FMUL R19, R14, R19 ;\n /*2580*/ @P2 FFMA R6, R13.reuse, R16, R6 ;\n /*2590*/ @P2 FFMA R20, R13, R20, R19 ;\n /*25a0*/ @P2 FADD R21, R21, R6 ;\n /*25b0*/ @P2 FADD R25, R25, R20 ;\n.L_x_22:\n /*25c0*/ @!P1 STG.E [R2.64], R21 ;\n /*25d0*/ @!P0 STG.E [R2.64+0x4], R25 ;\n.L_x_19:\n /*25e0*/ BSYNC B0 ;\n.L_x_18:\n /*25f0*/ IADD3 R6, R4, 0x81, RZ ;\n /*2600*/ ISETP.GE.AND P0, PT, R6, UR4, PT ;\n /*2610*/ @P0 EXIT ;\n /*2620*/ ISETP.GE.U32.AND P0, PT, R7, 0x3, PT ;\n /*2630*/ IMAD.MOV.U32 R19, RZ, RZ, RZ ;\n /*2640*/ LEA R12, R0.reuse, 0x40, 0x5 ;\n /*2650*/ IMAD.MOV.U32 R21, RZ, RZ, RZ ;\n /*2660*/ LEA R13, R0.reuse, R9, 0x5 ;\n /*2670*/ IMAD R0, R0, 0x20, R15 ;\n /*2680*/ IADD3 R8, R4, 0x80, RZ ;\n /*2690*/ IMAD.MOV.U32 R35, RZ, RZ, RZ ;\n /*26a0*/ LOP3.LUT R14, R5, 0x3, RZ, 0xc0, !PT ;\n /*26b0*/ MOV R10, RZ ;\n /*26c0*/ @!P0 BRA `(.L_x_23) ;\n /*26d0*/ IMAD.IADD R16, R5, 0x1, -R14 ;\n /*26e0*/ CS2R R18, SRZ ;\n /*26f0*/ IMAD.MOV.U32 R21, RZ, RZ, RZ ;\n.L_x_24:\n /*2700*/ SHF.L.U32 R10, R18, 0x1, RZ ;\n /*2710*/ IMAD.MOV.U32 R11, RZ, RZ, 0x4 ;\n /*2720*/ IMAD.WIDE R4, R10, R11, c[0x3][0x8] ;\n /*2730*/ IMAD.WIDE R10, R10, R11, c[0x3][0x0] ;\n /*2740*/ LDG.E R25, [R4.64] ;\n /*2750*/ LDG.E R33, [R4.64+0x4] ;\n /*2760*/ LDG.E R27, [R10.64] ;\n /*2770*/ LDG.E R31, [R10.64+0x4] ;\n /*2780*/ IMAD.IADD R20, R0, 0x1, R21 ;\n /*2790*/ IMAD.IADD R21, R13, 0x1, R21 ;\n /*27a0*/ LDG.E R22, [R4.64+0x8] ;\n /*27b0*/ LDS R24, [R20.X4+0x100] ;\n /*27c0*/ LDS R26, [R21.X4+0x100] ;\n /*27d0*/ LDG.E R23, [R10.64+0x8] ;\n /*27e0*/ LDG.E R30, [R4.64+0x18] ;\n /*27f0*/ LDG.E R32, [R10.64+0x18] ;\n /*2800*/ LDG.E R34, [R10.64+0x1c] ;\n /*2810*/ LDS R37, [R20.X4+0xfc] ;\n /*2820*/ FMUL R29, R24, R25 ;\n /*2830*/ LDG.E R25, [R4.64+0x10] ;\n /*2840*/ FMUL R28, R24, R33 ;\n /*2850*/ LDG.E R24, [R4.64+0xc] ;\n /*2860*/ FFMA R36, R26, R27, R29 ;\n /*2870*/ LDG.E R27, [R10.64+0xc] ;\n /*2880*/ LDG.E R29, [R4.64+0x14] ;\n /*2890*/ FFMA R26, R26, R31, R28 ;\n /*28a0*/ LDG.E R28, [R10.64+0x10] ;\n /*28b0*/ LDG.E R31, [R4.64+0x1c] ;\n /*28c0*/ LDG.E R33, [R10.64+0x14] ;\n /*28d0*/ FADD R35, R36, R35 ;\n /*28e0*/ LDS R36, [R21.X4+0xfc] ;\n /*28f0*/ FADD R26, R26, R19 ;\n /*2900*/ FMUL R19, R37, R22 ;\n /*2910*/ LDS R22, [R20.X4+0xf8] ;\n /*2920*/ LDS R5, [R20.X4+0xf4] ;\n /*2930*/ LDS R4, [R21.X4+0xf8] ;\n /*2940*/ IADD3 R16, R16, -0x4, RZ ;\n /*2950*/ FFMA R23, R36, R23, R19 ;\n /*2960*/ LDS R19, [R21.X4+0xf4] ;\n /*2970*/ ISETP.NE.AND P0, PT, R16, RZ, PT ;\n /*2980*/ FADD R23, R35, R23 ;\n /*2990*/ FMUL R30, R5, R30 ;\n /*29a0*/ IADD3 R10, R18.reuse, 0x4, RZ ;\n /*29b0*/ IADD3 R21, -R18, -0x4, RZ ;\n /*29c0*/ MOV R18, R10 ;\n /*29d0*/ FFMA R30, R19, R32, R30 ;\n /*29e0*/ FMUL R25, R22, R25 ;\n /*29f0*/ FMUL R37, R37, R24 ;\n /*2a00*/ FFMA R27, R36, R27, R37 ;\n /*2a10*/ FMUL R29, R22, R29 ;\n /*2a20*/ FADD R26, R26, R27 ;\n /*2a30*/ FFMA R28, R4.reuse, R28, R25 ;\n /*2a40*/ FMUL R31, R5, R31 ;\n /*2a50*/ FFMA R29, R4, R33, R29 ;\n /*2a60*/ FADD R23, R23, R28 ;\n /*2a70*/ FFMA R19, R19, R34, R31 ;\n /*2a80*/ FADD R26, R26, R29 ;\n /*2a90*/ FADD R35, R23, R30 ;\n /*2aa0*/ FADD R19, R26, R19 ;\n /*2ab0*/ @P0 BRA `(.L_x_24) ;\n.L_x_23:\n /*2ac0*/ ISETP.NE.AND P2, PT, R14, RZ, PT ;\n /*2ad0*/ ISETP.GE.AND P0, PT, R8, R7, PT ;\n /*2ae0*/ ISETP.GE.AND P1, PT, R6, R7, PT ;\n /*2af0*/ ISETP.GE.OR P0, PT, R8, R17.reuse, !P0 ;\n /*2b00*/ ISETP.GE.OR P1, PT, R6, R17, !P1 ;\n /*2b10*/ @!P2 BRA `(.L_x_25) ;\n /*2b20*/ IMAD.SHL.U32 R6, R10, 0x2, RZ ;\n /*2b30*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*2b40*/ IMAD.WIDE R4, R6, R7, c[0x3][0x8] ;\n /*2b50*/ IMAD.WIDE R6, R6, R7, c[0x3][0x0] ;\n /*2b60*/ LDG.E R16, [R4.64] ;\n /*2b70*/ LDG.E R20, [R4.64+0x4] ;\n /*2b80*/ LDG.E R8, [R6.64] ;\n /*2b90*/ LDG.E R18, [R6.64+0x4] ;\n /*2ba0*/ IADD3 R15, R21, R15, R12 ;\n /*2bb0*/ IADD3 R9, R21, R9, R12 ;\n /*2bc0*/ ISETP.NE.AND P2, PT, R14, 0x1, PT ;\n /*2bd0*/ LDS R15, [R15.X4] ;\n /*2be0*/ LDS R9, [R9.X4] ;\n /*2bf0*/ FMUL R16, R15.reuse, R16 ;\n /*2c00*/ FMUL R11, R15, R20 ;\n /*2c10*/ FFMA R8, R9.reuse, R8, R16 ;\n /*2c20*/ FFMA R18, R9, R18, R11 ;\n /*2c30*/ FADD R35, R35, R8 ;\n /*2c40*/ FADD R19, R19, R18 ;\n /*2c50*/ @!P2 BRA `(.L_x_25) ;\n /*2c60*/ ISETP.NE.AND P2, PT, R14, 0x2, PT ;\n /*2c70*/ LDG.E R11, [R4.64+0x8] ;\n /*2c80*/ LDG.E R17, [R4.64+0xc] ;\n /*2c90*/ LDG.E R9, [R6.64+0x8] ;\n /*2ca0*/ LDG.E R15, [R6.64+0xc] ;\n /*2cb0*/ @P2 LDG.E R21, [R4.64+0x10] ;\n /*2cc0*/ @P2 LDG.E R23, [R4.64+0x14] ;\n /*2cd0*/ @P2 LDG.E R12, [R6.64+0x10] ;\n /*2ce0*/ @P2 LDG.E R14, [R6.64+0x14] ;\n /*2cf0*/ LOP3.LUT R10, RZ, R10, RZ, 0x33, !PT ;\n /*2d00*/ IMAD.IADD R0, R0, 0x1, R10 ;\n /*2d10*/ IADD3 R10, R13, R10, RZ ;\n /*2d20*/ IMAD.SHL.U32 R16, R0, 0x4, RZ ;\n /*2d30*/ IMAD.SHL.U32 R13, R10, 0x4, RZ ;\n /*2d40*/ LDS R8, [R16+0x100] ;\n /*2d50*/ LDS R0, [R13+0x100] ;\n /*2d60*/ @P2 LDS R10, [R16+0xfc] ;\n /*2d70*/ @P2 LDS R5, [R13+0xfc] ;\n /*2d80*/ FMUL R11, R8.reuse, R11 ;\n /*2d90*/ FMUL R8, R8, R17 ;\n /*2da0*/ FFMA R4, R0.reuse, R9, R11 ;\n /*2db0*/ FFMA R8, R0, R15, R8 ;\n /*2dc0*/ FADD R35, R35, R4 ;\n /*2dd0*/ @P2 FMUL R0, R10.reuse, R21 ;\n /*2de0*/ FADD R19, R19, R8 ;\n /*2df0*/ @P2 FMUL R23, R10, R23 ;\n /*2e00*/ @P2 FFMA R0, R5.reuse, R12, R0 ;\n /*2e10*/ @P2 FFMA R14, R5, R14, R23 ;\n /*2e20*/ @P2 FADD R35, R35, R0 ;\n /*2e30*/ @P2 FADD R19, R19, R14 ;\n.L_x_25:\n /*2e40*/ @!P0 STG.E [R2.64+0x100], R35 ;\n /*2e50*/ @P1 EXIT ;\n /*2e60*/ STG.E [R2.64+0x104], R19 ;\n /*2e70*/ EXIT ;\n.L_x_26:\n /*2e80*/ BRA `(.L_x_26);\n /*2e90*/ NOP;\n /*2ea0*/ NOP;\n /*2eb0*/ NOP;\n /*2ec0*/ NOP;\n /*2ed0*/ NOP;\n /*2ee0*/ NOP;\n /*2ef0*/ NOP;\n /*2f00*/ NOP;\n /*2f10*/ NOP;\n /*2f20*/ NOP;\n /*2f30*/ NOP;\n /*2f40*/ NOP;\n /*2f50*/ NOP;\n /*2f60*/ NOP;\n /*2f70*/ NOP;\n.L_x_27:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z12idwt_per_X_1PfS_S_iiiii ; -- Begin function _Z12idwt_per_X_1PfS_S_iiiii\n\t.globl\t_Z12idwt_per_X_1PfS_S_iiiii\n\t.p2align\t8\n\t.type\t_Z12idwt_per_X_1PfS_S_iiiii,@function\n_Z12idwt_per_X_1PfS_S_iiiii: ; @_Z12idwt_per_X_1PfS_S_iiiii\n; %bb.0:\n\ts_load_b128 s[4:7], s[0:1], 0x18\n\tv_bfe_u32 v2, v0, 10, 10\n\ts_mov_b32 s2, exec_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshl_add_u32 v5, s15, 2, v2\n\ts_waitcnt lgkmcnt(0)\n\tv_cmpx_gt_i32_e64 s4, v5\n\ts_cbranch_execz .LBB0_52\n; %bb.1:\n\ts_clause 0x1\n\ts_load_b32 s12, s[0:1], 0x28\n\ts_load_b128 s[8:11], s[0:1], 0x0\n\tv_and_b32_e32 v0, 0x3ff, v0\n\ts_mul_i32 s2, s14, 3\n\ts_load_b64 s[0:1], s[0:1], 0x10\n\ts_waitcnt lgkmcnt(0)\n\ts_sub_i32 s2, s2, s12\n\ts_cmp_gt_i32 s12, 0\n\tv_lshl_add_u32 v1, s2, 5, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[3:4], null, v5, s5, v[1:2]\n\tv_ashrrev_i32_e32 v4, 31, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], 2, v[3:4]\n\tv_add_co_u32 v6, vcc_lo, s10, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v4, vcc_lo\n\tv_add_co_u32 v8, vcc_lo, s0, v3\n\tv_add_co_ci_u32_e32 v9, vcc_lo, s1, v4, vcc_lo\n\ts_mov_b32 s0, 0\n\ts_cbranch_scc1 .LBB0_3\n; %bb.2:\n\ts_lshl_b32 s1, s12, 1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s2, s1, 3\n\tv_mul_lo_u32 v3, v2, s2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b32_e32 v3, 5, v3\n\tv_lshl_add_u32 v4, s2, 7, v3\n\ts_and_not1_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccz .LBB0_4\n\ts_branch .LBB0_10\n.LBB0_3:\n ; implicit-def: $sgpr2\n ; implicit-def: $vgpr3\n ; implicit-def: $vgpr4\n.LBB0_4:\n\ts_lshl_b32 s0, s12, 1\n\tv_lshlrev_b32_e32 v10, 2, v0\n\ts_add_i32 s2, s0, 3\n\ts_cmp_lt_u32 s12, 4\n\tv_mul_lo_u32 v3, v2, s2\n\ts_mov_b32 s3, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshlrev_b32_e32 v2, 7, v3\n\ts_cbranch_scc1 .LBB0_7\n; %bb.5:\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add3_u32 v4, v2, v10, 0\n\ts_and_b32 s3, s12, 0x7ffffffc\n\ts_lshl_b32 s4, s12, 10\n\ts_mov_b32 s10, 0\n\ts_mov_b32 s11, 0\n.LBB0_6: ; =>This Inner Loop Header: Depth=1\n\tv_add_nc_u32_e32 v11, s10, v1\n\ts_add_i32 s0, s5, s10\n\ts_add_i32 s13, s10, 32\n\tv_mov_b32_e32 v13, s0\n\ts_ashr_i32 s1, s0, 31\n\tv_add_nc_u32_e32 v14, 32, v11\n\tv_cmp_gt_i32_e32 vcc_lo, 0, v11\n\ts_add_i32 s17, s0, 32\n\ts_add_i32 s18, s0, 64\n\tv_dual_mov_b32 v15, s17 :: v_dual_add_nc_u32 v16, 64, v11\n\tv_dual_mov_b32 v17, s18 :: v_dual_add_nc_u32 v18, 0x60, v11\n\tv_cndmask_b32_e64 v12, 0, s1, vcc_lo\n\tv_cndmask_b32_e32 v11, s10, v13, vcc_lo\n\tv_cmp_gt_i32_e32 vcc_lo, 0, v14\n\ts_addk_i32 s0, 0x60\n\ts_ashr_i32 s19, s17, 31\n\ts_ashr_i32 s17, s18, 31\n\tv_lshlrev_b64 v[11:12], 2, v[11:12]\n\ts_ashr_i32 s18, s0, 31\n\tv_mov_b32_e32 v19, s0\n\tv_cmp_gt_i32_e64 s0, 0, v16\n\tv_cmp_gt_i32_e64 s1, 0, v18\n\tv_cndmask_b32_e64 v14, 0, s19, vcc_lo\n\tv_cndmask_b32_e32 v13, s13, v15, vcc_lo\n\ts_add_i32 s15, s10, 64\n\ts_add_i32 s16, s10, 0x60\n\tv_cndmask_b32_e64 v15, s15, v17, s0\n\tv_cndmask_b32_e64 v17, s16, v19, s1\n\tv_add_co_u32 v19, vcc_lo, v6, v11\n\tv_lshlrev_b64 v[13:14], 2, v[13:14]\n\tv_cndmask_b32_e64 v16, 0, s17, s0\n\tv_add_co_ci_u32_e32 v20, vcc_lo, v7, v12, vcc_lo\n\tv_add_co_u32 v11, vcc_lo, v8, v11\n\tv_add_co_ci_u32_e32 v12, vcc_lo, v9, v12, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_4)\n\tv_lshlrev_b64 v[15:16], 2, v[15:16]\n\tglobal_load_b32 v25, v[19:20], off\n\tv_add_co_u32 v19, vcc_lo, v6, v13\n\tv_cndmask_b32_e64 v18, 0, s18, s1\n\tv_add_co_ci_u32_e32 v20, vcc_lo, v7, v14, vcc_lo\n\tv_add_co_u32 v13, vcc_lo, v8, v13\n\tv_add_co_ci_u32_e32 v14, vcc_lo, v9, v14, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_4)\n\tv_lshlrev_b64 v[17:18], 2, v[17:18]\n\tv_add_co_u32 v21, vcc_lo, v6, v15\n\tv_add_co_ci_u32_e32 v22, vcc_lo, v7, v16, vcc_lo\n\tv_add_co_u32 v15, vcc_lo, v8, v15\n\tv_add_co_ci_u32_e32 v16, vcc_lo, v9, v16, vcc_lo\n\tv_add_co_u32 v23, vcc_lo, v6, v17\n\tv_add_co_ci_u32_e32 v24, vcc_lo, v7, v18, vcc_lo\n\tv_add_co_u32 v17, vcc_lo, v8, v17\n\tv_add_co_ci_u32_e32 v18, vcc_lo, v9, v18, vcc_lo\n\ts_clause 0x2\n\tglobal_load_b32 v19, v[19:20], off\n\tglobal_load_b32 v20, v[21:22], off\n\tglobal_load_b32 v21, v[23:24], off\n\ts_clause 0x3\n\tglobal_load_b32 v11, v[11:12], off\n\tglobal_load_b32 v12, v[13:14], off\n\tglobal_load_b32 v13, v[15:16], off\n\tglobal_load_b32 v14, v[17:18], off\n\tv_add_nc_u32_e32 v15, s4, v4\n\ts_add_i32 s11, s11, 4\n\ts_addk_i32 s10, 0x80\n\ts_cmp_eq_u32 s3, s11\n\ts_waitcnt vmcnt(6)\n\tds_store_2addr_b32 v4, v25, v19 offset1:32\n\ts_waitcnt vmcnt(4)\n\tds_store_2addr_b32 v4, v20, v21 offset0:64 offset1:96\n\tv_add_nc_u32_e32 v4, 0x200, v4\n\tv_add_nc_u32_e32 v15, 0x400, v15\n\ts_waitcnt vmcnt(2)\n\tds_store_2addr_b32 v15, v11, v12 offset0:128 offset1:160\n\ts_waitcnt vmcnt(0)\n\tds_store_2addr_b32 v15, v13, v14 offset0:192 offset1:224\n\ts_cbranch_scc0 .LBB0_6\n.LBB0_7:\n\tv_lshlrev_b32_e32 v3, 5, v3\n\ts_and_b32 s0, s12, 3\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\ts_cmp_eq_u32 s0, 0\n\tv_lshl_add_u32 v4, s2, 7, v3\n\ts_cbranch_scc1 .LBB0_10\n; %bb.8:\n\ts_lshl_b32 s1, s12, 10\n\ts_lshl_b32 s4, s3, 7\n\ts_lshl_b32 s3, s3, 5\n\ts_add_i32 s4, s4, s1\n\ts_mul_i32 s1, s14, 0x60\n\tv_add3_u32 v1, s4, v2, v10\n\tv_add3_u32 v2, v0, v3, s3\n\tv_add3_u32 v10, s3, s1, v0\n\ts_lshl_b32 s1, s12, 5\n\ts_add_i32 s4, s5, s3\n\tv_add3_u32 v1, v1, 0, 0x600\n\tv_lshl_add_u32 v2, v2, 2, 0\n\tv_subrev_nc_u32_e32 v10, s1, v10\n\ts_lshl_b32 s10, s0, 5\n\ts_mov_b64 s[0:1], 0\n\ts_set_inst_prefetch_distance 0x1\n\t.p2align\t6\n.LBB0_9: ; =>This Inner Loop Header: Depth=1\n\ts_add_u32 s11, s3, s0\n\ts_addc_u32 s13, 0, s1\n\ts_add_i32 s15, s4, s0\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_ashr_i32 s16, s15, 31\n\tv_dual_mov_b32 v12, s16 :: v_dual_add_nc_u32 v11, s0, v10\n\tv_mov_b32_e32 v13, s15\n\ts_add_u32 s0, s0, 32\n\ts_addc_u32 s1, s1, 0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_cmp_gt_i32_e32 vcc_lo, 0, v11\n\ts_cmp_lg_u32 s10, s0\n\tv_cndmask_b32_e32 v12, s13, v12, vcc_lo\n\tv_cndmask_b32_e32 v11, s11, v13, vcc_lo\n\tv_lshlrev_b64 v[11:12], 2, v[11:12]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v13, vcc_lo, v6, v11\n\tv_add_co_ci_u32_e32 v14, vcc_lo, v7, v12, vcc_lo\n\tv_add_co_u32 v11, vcc_lo, v8, v11\n\tv_add_co_ci_u32_e32 v12, vcc_lo, v9, v12, vcc_lo\n\tglobal_load_b32 v13, v[13:14], off\n\tglobal_load_b32 v11, v[11:12], off\n\ts_waitcnt vmcnt(1)\n\tds_store_b32 v2, v13\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v1, v11\n\tv_add_nc_u32_e32 v2, 0x80, v2\n\tv_add_nc_u32_e32 v1, 0x80, v1\n\ts_cbranch_scc1 .LBB0_9\n.LBB0_10:\n\ts_set_inst_prefetch_distance 0x2\n\ts_cmp_lt_i32 s12, -2\n\ts_cbranch_scc1 .LBB0_13\n; %bb.11:\n\ts_lshl_b32 s0, s12, 5\n\tv_mad_u64_u32 v[1:2], null, 0x60, s14, v[0:1]\n\tv_add3_u32 v10, v0, v4, s0\n\tv_add3_u32 v11, v0, v3, s0\n\ts_mov_b32 s1, s12\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_lshl_add_u32 v2, v10, 2, 0\n\tv_lshl_add_u32 v10, v11, 2, 0\n\t.p2align\t6\n.LBB0_12: ; =>This Inner Loop Header: Depth=1\n\tv_cmp_le_i32_e32 vcc_lo, s5, v1\n\tv_add_nc_u32_e32 v1, 32, v1\n\ts_add_i32 s1, s1, 1\n\tv_cndmask_b32_e64 v11, 0, s5, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_sub_nc_u32_e32 v11, s0, v11\n\ts_add_i32 s0, s0, 32\n\ts_cmp_ge_i32 s1, s2\n\tv_ashrrev_i32_e32 v12, 31, v11\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[11:12], 2, v[11:12]\n\tv_add_co_u32 v13, vcc_lo, v6, v11\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v14, vcc_lo, v7, v12, vcc_lo\n\tv_add_co_u32 v11, vcc_lo, v8, v11\n\tv_add_co_ci_u32_e32 v12, vcc_lo, v9, v12, vcc_lo\n\tglobal_load_b32 v13, v[13:14], off\n\tglobal_load_b32 v11, v[11:12], off\n\ts_waitcnt vmcnt(1)\n\tds_store_b32 v10, v13\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v2, v11\n\tv_add_nc_u32_e32 v2, 0x80, v2\n\tv_add_nc_u32_e32 v10, 0x80, v10\n\ts_cbranch_scc0 .LBB0_12\n.LBB0_13:\n\ts_mulk_i32 s14, 0xc0\n\ts_lshr_b32 s0, s7, 31\n\tv_lshl_add_u32 v1, v0, 1, s14\n\ts_lshl_b32 s1, s5, 1\n\ts_add_i32 s0, s7, s0\n\ts_add_i32 s13, s1, s7\n\ts_ashr_i32 s2, s0, 1\n\ts_add_i32 s13, s13, -2\n\tv_mad_u64_u32 v[6:7], null, v5, s6, v[1:2]\n\ts_cmp_gt_i32 s7, 1\n\ts_mov_b32 s3, exec_lo\n\ts_cselect_b32 s0, -1, 0\n\ts_getpc_b64 s[4:5]\n\ts_add_u32 s4, s4, c_lpr@rel32@lo+4\n\ts_addc_u32 s5, s5, c_lpr@rel32@hi+12\n\ts_getpc_b64 s[14:15]\n\ts_add_u32 s14, s14, c_hpr@rel32@lo+4\n\ts_addc_u32 s15, s15, c_hpr@rel32@hi+12\n\ts_load_b64 s[10:11], s[4:5], 0x0\n\ts_load_b64 s[4:5], s[14:15], 0x0\n\tv_ashrrev_i32_e32 v7, 31, v6\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\tv_lshlrev_b64 v[5:6], 2, v[6:7]\n\tv_or_b32_e32 v7, 1, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v5, vcc_lo, s8, v5\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s9, v6, vcc_lo\n\ts_add_i32 s8, s2, -1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_i32 s9, s8, s6\n\tv_cmpx_gt_i32_e64 s13, v7\n\ts_cbranch_execz .LBB0_26\n; %bb.14:\n\tv_mov_b32_e32 v8, 0\n\tv_mov_b32_e32 v10, 0\n\ts_and_not1_b32 vcc_lo, exec_lo, s0\n\ts_mov_b32 s6, 0\n\ts_cbranch_vccnz .LBB0_22\n; %bb.15:\n\tv_lshl_add_u32 v8, s12, 5, v0\n\ts_cmp_lt_u32 s8, 3\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v9, v8, v3\n\tv_add_nc_u32_e32 v11, v8, v4\n\ts_cbranch_scc1 .LBB0_19\n; %bb.16:\n\tv_add_lshl_u32 v8, v0, v4, 2\n\tv_add_lshl_u32 v10, v0, v3, 2\n\ts_lshl_b32 s0, s12, 7\n\ts_and_b32 s6, s2, 0x3ffffffc\n\ts_add_i32 s0, s0, 0\n\ts_mov_b32 s7, 0\n\tv_add3_u32 v12, s0, v8, -4\n\tv_add3_u32 v13, s0, v10, -4\n\tv_mov_b32_e32 v8, 0\n\tv_mov_b32_e32 v10, 0\n\ts_mov_b64 s[0:1], 0\n\ts_mov_b32 s14, 0\n.LBB0_17: ; =>This Inner Loop Header: Depth=1\n\ts_add_u32 s16, s10, s0\n\ts_addc_u32 s17, s11, s1\n\ts_add_u32 s24, s4, s0\n\ts_addc_u32 s25, s5, s1\n\tds_load_b32 v16, v13\n\tds_load_b32 v17, v12\n\ts_load_b256 s[24:31], s[24:25], 0x0\n\tv_add_nc_u32_e32 v15, s7, v11\n\ts_load_b256 s[16:23], s[16:17], 0x0\n\ts_xor_b32 s15, s14, -3\n\tv_add_nc_u32_e32 v13, -16, v13\n\tv_add_nc_u32_e32 v21, s15, v11\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_2)\n\tv_lshl_add_u32 v21, v21, 2, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_mul_f32_e32 v22, s26, v17\n\tv_lshl_add_u32 v15, v15, 2, 0\n\tv_dual_mul_f32 v17, s27, v17 :: v_dual_fmac_f32 v22, s18, v16\n\tds_load_b32 v15, v15\n\tv_add_nc_u32_e32 v14, s7, v9\n\ts_xor_b32 s7, s14, -2\n\tv_fmac_f32_e32 v17, s19, v16\n\tv_add_nc_u32_e32 v19, s7, v11\n\tv_add_nc_u32_e32 v18, s7, v9\n\tv_lshl_add_u32 v14, v14, 2, 0\n\ts_xor_b32 s7, s14, -4\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_lshl_add_u32 v19, v19, 2, 0\n\tv_lshl_add_u32 v18, v18, 2, 0\n\tds_load_b32 v14, v14\n\ts_waitcnt lgkmcnt(1)\n\tv_dual_mul_f32 v23, s24, v15 :: v_dual_add_nc_u32 v12, -16, v12\n\tv_dual_mul_f32 v15, s25, v15 :: v_dual_add_nc_u32 v20, s15, v9\n\ts_add_i32 s15, s14, 4\n\ts_add_u32 s0, s0, 32\n\ts_addc_u32 s1, s1, 0\n\ts_cmp_eq_u32 s6, s15\n\ts_mov_b32 s14, s15\n\ts_waitcnt lgkmcnt(0)\n\tv_fmac_f32_e32 v23, s16, v14\n\tv_lshl_add_u32 v20, v20, 2, 0\n\tds_load_b32 v19, v19\n\tds_load_b32 v18, v18\n\tds_load_b32 v21, v21\n\tds_load_b32 v20, v20\n\tv_dual_fmac_f32 v15, s17, v14 :: v_dual_add_f32 v10, v10, v23\n\ts_waitcnt lgkmcnt(3)\n\tv_mul_f32_e32 v16, s29, v19\n\ts_waitcnt lgkmcnt(1)\n\tv_dual_mul_f32 v14, s28, v19 :: v_dual_mul_f32 v19, s30, v21\n\tv_dual_add_f32 v8, v8, v15 :: v_dual_mul_f32 v15, s31, v21\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_fmac_f32_e32 v16, s21, v18\n\tv_fmac_f32_e32 v14, s20, v18\n\ts_waitcnt lgkmcnt(0)\n\tv_dual_add_f32 v10, v10, v22 :: v_dual_fmac_f32 v19, s22, v20\n\tv_dual_add_f32 v8, v8, v17 :: v_dual_fmac_f32 v15, s23, v20\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v10, v10, v14\n\tv_add_f32_e32 v8, v8, v16\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v10, v10, v19\n\tv_add_f32_e32 v8, v8, v15\n\ts_cbranch_scc0 .LBB0_17\n; %bb.18:\n\ts_and_b32 s14, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s14, 0\n\ts_cbranch_scc0 .LBB0_20\n\ts_branch .LBB0_22\n.LBB0_19:\n\tv_mov_b32_e32 v8, 0\n\ts_mov_b32 s7, 0\n\ts_and_b32 s14, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s14, 0\n\ts_cbranch_scc1 .LBB0_22\n.LBB0_20:\n\ts_lshl_b32 s0, s6, 1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_lshl_b64 s[16:17], s[0:1], 2\n\ts_or_b32 s15, s16, 4\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s0, s10, s15\n\ts_addc_u32 s1, s11, s17\n\ts_add_u32 s15, s4, s15\n\ts_addc_u32 s16, s5, s17\n\ts_set_inst_prefetch_distance 0x1\n\t.p2align\t6\n.LBB0_21: ; =>This Inner Loop Header: Depth=1\n\tv_add_nc_u32_e32 v12, s7, v11\n\ts_add_u32 s18, s0, -4\n\ts_addc_u32 s19, s1, -1\n\ts_add_u32 s20, s15, -4\n\ts_addc_u32 s21, s16, -1\n\tv_lshl_add_u32 v12, v12, 2, 0\n\ts_load_b64 s[20:21], s[20:21], 0x0\n\ts_load_b64 s[18:19], s[18:19], 0x0\n\ts_add_i32 s17, s6, 1\n\tds_load_b32 v12, v12\n\tv_add_nc_u32_e32 v13, s7, v9\n\ts_not_b32 s7, s6\n\ts_add_u32 s0, s0, 8\n\ts_addc_u32 s1, s1, 0\n\ts_add_u32 s15, s15, 8\n\tv_lshl_add_u32 v13, v13, 2, 0\n\ts_addc_u32 s16, s16, 0\n\ts_add_i32 s14, s14, -1\n\ts_mov_b32 s6, s17\n\ts_cmp_lg_u32 s14, 0\n\tds_load_b32 v13, v13\n\ts_waitcnt lgkmcnt(0)\n\tv_mul_f32_e32 v14, s20, v12\n\tv_mul_f32_e32 v12, s21, v12\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fmac_f32_e32 v14, s18, v13\n\tv_fmac_f32_e32 v12, s19, v13\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v10, v10, v14\n\tv_add_f32_e32 v8, v8, v12\n\ts_cbranch_scc1 .LBB0_21\n.LBB0_22:\n\ts_set_inst_prefetch_distance 0x2\n\tv_cmp_le_i32_e32 vcc_lo, s8, v1\n\tv_cmp_gt_i32_e64 s0, s9, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s1, vcc_lo, s0\n\ts_and_saveexec_b32 s0, s1\n\ts_cbranch_execz .LBB0_24\n; %bb.23:\n\ts_sub_i32 s6, 0, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_ashr_i32 s7, s6, 31\n\ts_lshl_b64 s[6:7], s[6:7], 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_add_co_u32 v11, vcc_lo, v5, s6\n\tv_add_co_ci_u32_e32 v12, vcc_lo, s7, v6, vcc_lo\n\tglobal_store_b32 v[11:12], v10, off offset:4\n.LBB0_24:\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_cmp_le_i32_e32 vcc_lo, s8, v7\n\tv_cmp_gt_i32_e64 s0, s9, v7\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, vcc_lo, s0\n\ts_and_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB0_26\n; %bb.25:\n\ts_sub_i32 s0, 0, s2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_ashr_i32 s1, s0, 31\n\ts_lshl_b64 s[0:1], s[0:1], 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_add_co_u32 v9, vcc_lo, v5, s0\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s1, v6, vcc_lo\n\tglobal_store_b32 v[9:10], v8, off offset:8\n.LBB0_26:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_add_co_u32 v7, vcc_lo, v5, 4\n\tv_add_co_ci_u32_e32 v8, vcc_lo, 0, v6, vcc_lo\n\tv_add_co_u32 v5, vcc_lo, v5, 8\n\tv_add_nc_u32_e32 v9, 0x41, v1\n\tv_add_co_ci_u32_e32 v6, vcc_lo, 0, v6, vcc_lo\n\ts_mov_b32 s14, exec_lo\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_cmpx_gt_i32_e64 s13, v9\n\ts_cbranch_execz .LBB0_39\n; %bb.27:\n\tv_cmp_ne_u32_e32 vcc_lo, 1, v2\n\tv_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0\n\ts_mov_b32 s3, 0\n\ts_cbranch_vccnz .LBB0_35\n; %bb.28:\n\ts_lshl_b32 s0, s12, 5\n\ts_cmp_lt_u32 s8, 3\n\tv_dual_mov_b32 v11, 0 :: v_dual_add_nc_u32 v10, s0, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_nc_u32_e32 v12, v10, v3\n\tv_add_nc_u32_e32 v13, v10, v4\n\ts_cbranch_scc1 .LBB0_32\n; %bb.29:\n\tv_add_lshl_u32 v10, v0, v4, 2\n\tv_add_lshl_u32 v11, v0, v3, 2\n\ts_lshl_b32 s0, s12, 7\n\tv_mov_b32_e32 v16, 0\n\ts_add_i32 s0, s0, 0\n\ts_and_b32 s3, s2, 0x3ffffffc\n\tv_add3_u32 v14, s0, v10, 0x7c\n\tv_add3_u32 v15, s0, v11, 0x7c\n\tv_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v11, 0\n\ts_mov_b32 s15, 0\n\ts_mov_b64 s[0:1], 0\n\ts_add_i32 s6, 0, 0x80\n\ts_mov_b32 s7, 0\n.LBB0_30: ; =>This Inner Loop Header: Depth=1\n\ts_add_u32 s16, s10, s0\n\ts_addc_u32 s17, s11, s1\n\ts_add_u32 s18, s4, s0\n\ts_addc_u32 s19, s5, s1\n\ts_clause 0x3\n\tglobal_load_b128 v[17:20], v16, s[18:19]\n\tglobal_load_b128 v[21:24], v16, s[18:19] offset:16\n\tglobal_load_b128 v[25:28], v16, s[16:17]\n\tglobal_load_b128 v[29:32], v16, s[16:17] offset:16\n\tds_load_b32 v35, v15\n\tds_load_b32 v36, v14\n\tv_add_nc_u32_e32 v33, s15, v12\n\tv_add_nc_u32_e32 v34, s15, v13\n\ts_xor_b32 s15, s7, -2\n\ts_xor_b32 s16, s7, -3\n\tv_add_nc_u32_e32 v37, s15, v13\n\tv_lshl_add_u32 v33, v33, 2, s6\n\tv_add_nc_u32_e32 v39, s16, v12\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshl_add_u32 v39, v39, 2, s6\n\ts_waitcnt vmcnt(3) lgkmcnt(0)\n\tv_mul_f32_e32 v19, v19, v36\n\tv_lshl_add_u32 v34, v34, 2, s6\n\tv_add_nc_u32_e32 v40, s16, v13\n\tv_mul_f32_e32 v20, v36, v20\n\tds_load_b32 v33, v33\n\tds_load_b32 v34, v34\n\ts_waitcnt vmcnt(1)\n\tv_dual_fmac_f32 v19, v27, v35 :: v_dual_add_nc_u32 v38, s15, v12\n\tv_lshl_add_u32 v37, v37, 2, s6\n\tv_lshl_add_u32 v40, v40, 2, s6\n\ts_add_i32 s16, s7, 4\n\ts_xor_b32 s15, s7, -4\n\ts_add_u32 s0, s0, 32\n\ts_addc_u32 s1, s1, 0\n\ts_cmp_lg_u32 s3, s16\n\ts_mov_b32 s7, s16\n\ts_waitcnt lgkmcnt(0)\n\tv_dual_fmac_f32 v20, v35, v28 :: v_dual_mul_f32 v17, v17, v34\n\tv_lshl_add_u32 v38, v38, 2, s6\n\tds_load_b32 v37, v37\n\tds_load_b32 v38, v38\n\tds_load_b32 v40, v40\n\tds_load_b32 v39, v39\n\tv_dual_mul_f32 v18, v34, v18 :: v_dual_fmac_f32 v17, v25, v33\n\tv_add_nc_u32_e32 v14, -16, v14\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_fmac_f32_e32 v18, v33, v26\n\ts_waitcnt lgkmcnt(3)\n\tv_mul_f32_e32 v21, v21, v37\n\ts_waitcnt lgkmcnt(1)\n\tv_dual_mul_f32 v22, v37, v22 :: v_dual_mul_f32 v23, v23, v40\n\tv_dual_add_f32 v11, v11, v17 :: v_dual_add_f32 v10, v10, v18\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_2)\n\tv_dual_mul_f32 v17, v40, v24 :: v_dual_fmac_f32 v22, v38, v30\n\tv_fmac_f32_e32 v21, v29, v38\n\ts_waitcnt lgkmcnt(0)\n\tv_dual_fmac_f32 v23, v31, v39 :: v_dual_add_f32 v10, v10, v20\n\tv_add_f32_e32 v11, v11, v19\n\tv_dual_fmac_f32 v17, v39, v32 :: v_dual_add_f32 v10, v10, v22\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v11, v11, v21\n\tv_dual_add_f32 v10, v10, v17 :: v_dual_add_nc_u32 v15, -16, v15\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_f32_e32 v11, v11, v23\n\ts_cbranch_scc1 .LBB0_30\n; %bb.31:\n\ts_and_b32 s16, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s16, 0\n\ts_cbranch_scc0 .LBB0_33\n\ts_branch .LBB0_35\n.LBB0_32:\n\tv_mov_b32_e32 v10, 0\n\ts_mov_b32 s15, 0\n\ts_and_b32 s16, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s16, 0\n\ts_cbranch_scc1 .LBB0_35\n.LBB0_33:\n\ts_lshl_b32 s0, s3, 1\n\tv_mov_b32_e32 v14, 0\n\ts_lshl_b64 s[6:7], s[0:1], 2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_or_b32 s6, s6, 4\n\ts_add_u32 s0, s10, s6\n\ts_addc_u32 s1, s11, s7\n\ts_add_u32 s6, s4, s6\n\ts_addc_u32 s7, s5, s7\n\ts_add_i32 s17, 0, 0x80\n\t.p2align\t6\n.LBB0_34: ; =>This Inner Loop Header: Depth=1\n\ts_clause 0x1\n\tglobal_load_b64 v[15:16], v14, s[6:7] offset:-4\n\tglobal_load_b64 v[17:18], v14, s[0:1] offset:-4\n\tv_add_nc_u32_e32 v19, s15, v13\n\tv_add_nc_u32_e32 v20, s15, v12\n\ts_add_i32 s18, s3, 1\n\ts_not_b32 s15, s3\n\ts_add_u32 s0, s0, 8\n\tv_lshl_add_u32 v19, v19, 2, s17\n\tv_lshl_add_u32 v20, v20, 2, s17\n\ts_addc_u32 s1, s1, 0\n\ts_add_u32 s6, s6, 8\n\tds_load_b32 v19, v19\n\tds_load_b32 v20, v20\n\ts_addc_u32 s7, s7, 0\n\ts_add_i32 s16, s16, -1\n\ts_mov_b32 s3, s18\n\ts_cmp_lg_u32 s16, 0\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_mul_f32_e32 v15, v15, v19\n\tv_mul_f32_e32 v16, v19, v16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_fmac_f32 v15, v17, v20 :: v_dual_fmac_f32 v16, v20, v18\n\tv_dual_add_f32 v11, v11, v15 :: v_dual_add_f32 v10, v10, v16\n\ts_cbranch_scc1 .LBB0_34\n.LBB0_35:\n\tv_add_nc_u32_e32 v12, 64, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_le_i32_e32 vcc_lo, s8, v12\n\tv_cmp_gt_i32_e64 s0, s9, v12\n\ts_and_b32 s1, vcc_lo, s0\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s0, s1\n\ts_cbranch_execz .LBB0_37\n; %bb.36:\n\ts_ashr_i32 s3, s2, 31\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_lshl_b64 s[6:7], s[2:3], 2\n\tv_sub_co_u32 v12, vcc_lo, v7, s6\n\tv_subrev_co_ci_u32_e32 v13, vcc_lo, s7, v8, vcc_lo\n\tglobal_store_b32 v[12:13], v11, off offset:256\n.LBB0_37:\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_cmp_le_i32_e32 vcc_lo, s8, v9\n\tv_cmp_gt_i32_e64 s0, s9, v9\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, vcc_lo, s0\n\ts_and_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB0_39\n; %bb.38:\n\ts_ashr_i32 s3, s2, 31\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_lshl_b64 s[0:1], s[2:3], 2\n\tv_sub_co_u32 v11, vcc_lo, v5, s0\n\tv_subrev_co_ci_u32_e32 v12, vcc_lo, s1, v6, vcc_lo\n\tglobal_store_b32 v[11:12], v10, off offset:256\n.LBB0_39:\n\ts_or_b32 exec_lo, exec_lo, s14\n\tv_add_nc_u32_e32 v9, 0x81, v1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmp_gt_i32_e32 vcc_lo, s13, v9\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_52\n; %bb.40:\n\tv_cmp_ne_u32_e32 vcc_lo, 1, v2\n\tv_mov_b32_e32 v2, 0\n\tv_mov_b32_e32 v10, 0\n\ts_mov_b32 s3, 0\n\ts_cbranch_vccnz .LBB0_48\n; %bb.41:\n\ts_lshl_b32 s0, s12, 5\n\ts_cmp_lt_u32 s8, 3\n\tv_add_nc_u32_e32 v2, s0, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_dual_mov_b32 v10, 0 :: v_dual_add_nc_u32 v11, v2, v3\n\tv_add_nc_u32_e32 v12, v2, v4\n\ts_cbranch_scc1 .LBB0_45\n; %bb.42:\n\tv_add_lshl_u32 v2, v0, v4, 2\n\tv_add_lshl_u32 v3, v0, v3, 2\n\ts_lshl_b32 s0, s12, 7\n\tv_mov_b32_e32 v4, 0\n\ts_add_i32 s0, s0, 0\n\tv_mov_b32_e32 v10, 0\n\tv_add3_u32 v0, s0, v2, 0xfc\n\tv_add3_u32 v3, s0, v3, 0xfc\n\tv_mov_b32_e32 v2, 0\n\ts_and_b32 s3, s2, 0x3ffffffc\n\ts_mov_b32 s6, 0\n\ts_mov_b64 s[0:1], 0\n\ts_add_i32 s7, 0, 0x100\n\ts_mov_b32 s12, 0\n.LBB0_43: ; =>This Inner Loop Header: Depth=1\n\ts_add_u32 s14, s10, s0\n\ts_addc_u32 s15, s11, s1\n\ts_add_u32 s16, s4, s0\n\ts_addc_u32 s17, s5, s1\n\ts_xor_b32 s13, s12, -3\n\ts_clause 0x3\n\tglobal_load_b128 v[13:16], v4, s[16:17]\n\tglobal_load_b128 v[17:20], v4, s[16:17] offset:16\n\tglobal_load_b128 v[21:24], v4, s[14:15]\n\tglobal_load_b128 v[25:28], v4, s[14:15] offset:16\n\tv_add_nc_u32_e32 v29, s6, v11\n\tv_add_nc_u32_e32 v30, s6, v12\n\tds_load_b32 v31, v3\n\tds_load_b32 v32, v0\n\ts_xor_b32 s6, s12, -2\n\tv_add_nc_u32_e32 v35, s13, v11\n\tv_lshl_add_u32 v29, v29, 2, s7\n\tv_lshl_add_u32 v30, v30, 2, s7\n\tds_load_b32 v29, v29\n\tds_load_b32 v30, v30\n\tv_add_nc_u32_e32 v34, s6, v11\n\tv_add_nc_u32_e32 v3, -16, v3\n\ts_waitcnt vmcnt(3) lgkmcnt(0)\n\tv_mul_f32_e32 v13, v13, v30\n\tv_dual_mul_f32 v14, v30, v14 :: v_dual_add_nc_u32 v33, s6, v12\n\tv_add_nc_u32_e32 v36, s13, v12\n\tv_lshl_add_u32 v34, v34, 2, s7\n\ts_waitcnt vmcnt(1)\n\tv_fmac_f32_e32 v13, v21, v29\n\tv_fmac_f32_e32 v14, v29, v22\n\tv_lshl_add_u32 v33, v33, 2, s7\n\tv_lshl_add_u32 v36, v36, 2, s7\n\tv_mul_f32_e32 v16, v32, v16\n\tv_lshl_add_u32 v35, v35, 2, s7\n\tds_load_b32 v33, v33\n\tds_load_b32 v34, v34\n\tds_load_b32 v36, v36\n\tds_load_b32 v35, v35\n\tv_dual_mul_f32 v15, v15, v32 :: v_dual_add_f32 v10, v10, v13\n\tv_add_f32_e32 v2, v2, v14\n\ts_add_i32 s13, s12, 4\n\ts_xor_b32 s6, s12, -4\n\ts_add_u32 s0, s0, 32\n\ts_addc_u32 s1, s1, 0\n\ts_cmp_lg_u32 s3, s13\n\ts_mov_b32 s12, s13\n\ts_waitcnt lgkmcnt(3)\n\tv_mul_f32_e32 v17, v17, v33\n\ts_waitcnt lgkmcnt(1)\n\tv_dual_mul_f32 v18, v33, v18 :: v_dual_mul_f32 v13, v36, v20\n\tv_dual_fmac_f32 v15, v23, v31 :: v_dual_add_nc_u32 v0, -16, v0\n\tv_mul_f32_e32 v19, v19, v36\n\ts_waitcnt vmcnt(0)\n\tv_dual_fmac_f32 v16, v31, v24 :: v_dual_fmac_f32 v17, v25, v34\n\tv_fmac_f32_e32 v18, v34, v26\n\ts_waitcnt lgkmcnt(0)\n\tv_dual_add_f32 v10, v10, v15 :: v_dual_fmac_f32 v13, v35, v28\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_dual_add_f32 v2, v2, v16 :: v_dual_fmac_f32 v19, v27, v35\n\tv_add_f32_e32 v10, v10, v17\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_f32_e32 v2, v2, v18\n\tv_add_f32_e32 v10, v10, v19\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_f32_e32 v2, v2, v13\n\ts_cbranch_scc1 .LBB0_43\n; %bb.44:\n\ts_and_b32 s7, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s7, 0\n\ts_cbranch_scc0 .LBB0_46\n\ts_branch .LBB0_48\n.LBB0_45:\n\tv_mov_b32_e32 v2, 0\n\ts_mov_b32 s6, 0\n\ts_and_b32 s7, s2, 3\n\ts_mov_b32 s1, 0\n\ts_cmp_eq_u32 s7, 0\n\ts_cbranch_scc1 .LBB0_48\n.LBB0_46:\n\ts_lshl_b32 s0, s3, 1\n\tv_mov_b32_e32 v0, 0\n\ts_lshl_b64 s[12:13], s[0:1], 2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_or_b32 s12, s12, 4\n\ts_add_u32 s0, s10, s12\n\ts_addc_u32 s1, s11, s13\n\ts_add_u32 s4, s4, s12\n\ts_addc_u32 s5, s5, s13\n\ts_add_i32 s10, 0, 0x100\n\t.p2align\t6\n.LBB0_47: ; =>This Inner Loop Header: Depth=1\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v0, s[4:5] offset:-4\n\tglobal_load_b64 v[13:14], v0, s[0:1] offset:-4\n\tv_add_nc_u32_e32 v15, s6, v12\n\tv_add_nc_u32_e32 v16, s6, v11\n\ts_add_i32 s11, s3, 1\n\ts_not_b32 s6, s3\n\ts_add_u32 s0, s0, 8\n\tv_lshl_add_u32 v15, v15, 2, s10\n\tv_lshl_add_u32 v16, v16, 2, s10\n\ts_addc_u32 s1, s1, 0\n\ts_add_u32 s4, s4, 8\n\tds_load_b32 v15, v15\n\tds_load_b32 v16, v16\n\ts_addc_u32 s5, s5, 0\n\ts_add_i32 s7, s7, -1\n\ts_mov_b32 s3, s11\n\ts_cmp_lg_u32 s7, 0\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_mul_f32_e32 v4, v15, v4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_fmac_f32 v4, v16, v14 :: v_dual_mul_f32 v3, v3, v15\n\tv_add_f32_e32 v2, v2, v4\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v3, v13, v16\n\tv_add_f32_e32 v10, v10, v3\n\ts_cbranch_scc1 .LBB0_47\n.LBB0_48:\n\tv_add_nc_u32_e32 v0, 0x80, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_le_i32_e32 vcc_lo, s8, v0\n\tv_cmp_gt_i32_e64 s0, s9, v0\n\ts_and_b32 s1, vcc_lo, s0\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s0, s1\n\ts_cbranch_execz .LBB0_50\n; %bb.49:\n\ts_ashr_i32 s3, s2, 31\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_lshl_b64 s[4:5], s[2:3], 2\n\tv_sub_co_u32 v0, vcc_lo, v7, s4\n\tv_subrev_co_ci_u32_e32 v1, vcc_lo, s5, v8, vcc_lo\n\tglobal_store_b32 v[0:1], v10, off offset:512\n.LBB0_50:\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_cmp_le_i32_e32 vcc_lo, s8, v9\n\tv_cmp_gt_i32_e64 s0, s9, v9\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, vcc_lo, s0\n\ts_and_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB0_52\n; %bb.51:\n\ts_ashr_i32 s3, s2, 31\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_lshl_b64 s[0:1], s[2:3], 2\n\tv_sub_co_u32 v0, vcc_lo, v5, s0\n\tv_subrev_co_ci_u32_e32 v1, vcc_lo, s1, v6, vcc_lo\n\tglobal_store_b32 v[0:1], v2, off offset:512\n.LBB0_52:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z12idwt_per_X_1PfS_S_iiiii\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 44\n\t\t.amdhsa_user_sgpr_count 14\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 1\n\t\t.amdhsa_next_free_vgpr 41\n\t\t.amdhsa_next_free_sgpr 32\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z12idwt_per_X_1PfS_S_iiiii, .Lfunc_end0-_Z12idwt_per_X_1PfS_S_iiiii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 4108\n; NumSgprs: 34\n; NumVgprs: 41\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 5\n; NumSGPRsForWavesPerEU: 34\n; NumVGPRsForWavesPerEU: 41\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 14\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.protected\tc_lpr ; @c_lpr\n\t.type\tc_lpr,@object\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\tc_lpr\n\t.p2align\t3, 0x0\nc_lpr:\n\t.quad\t0\n\t.size\tc_lpr, 8\n\n\t.protected\tc_hpr ; @c_hpr\n\t.type\tc_hpr,@object\n\t.globl\tc_hpr\n\t.p2align\t3, 0x0\nc_hpr:\n\t.quad\t0\n\t.size\tc_hpr, 8\n\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 28\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: by_value\n - .offset: 36\n .size: 4\n .value_kind: by_value\n - .offset: 40\n .size: 4\n .value_kind: by_value\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 44\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z12idwt_per_X_1PfS_S_iiiii\n .private_segment_fixed_size: 0\n .sgpr_count: 34\n .sgpr_spill_count: 0\n .symbol: _Z12idwt_per_X_1PfS_S_iiiii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 41\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":83,"cells":{"id":{"kind":"string","value":"0256d56ad87c484a7e0cecbdee97910f0196cc9c_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z10mineBlocksPyPjS0_j --------------------------\n .section .text._Z10mineBlocksPyPjS0_j,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=39\"\n .align 128\n\n\n\n\n .global _Z10mineBlocksPyPjS0_j\n .type _Z10mineBlocksPyPjS0_j,@function\n .size _Z10mineBlocksPyPjS0_j,(.L_x_19 - _Z10mineBlocksPyPjS0_j)\n .other _Z10mineBlocksPyPjS0_j,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z10mineBlocksPyPjS0_j:\n.text._Z10mineBlocksPyPjS0_j:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ IADD3 R1, R1, -0x30, RZ ;\n /*0020*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0030*/ CS2R R2, SR_CLOCKLO ;\n /*0040*/ S2R R8, SR_CTAID.X ;\n /*0050*/ LOP3.LUT R0, R2, 0xaad26b49, RZ, 0x3c, !PT ;\n /*0060*/ BSSY B0, `(.L_x_0) ;\n /*0070*/ LOP3.LUT R2, R3, 0xf7dcefdd, RZ, 0x3c, !PT ;\n /*0080*/ S2R R9, SR_TID.X ;\n /*0090*/ IMAD R0, R0, 0x4182bed5, RZ ;\n /*00a0*/ IMAD R5, R2, -0x658354e5, RZ ;\n /*00b0*/ IADD3 R7, R0.reuse, 0x75bcd15, RZ ;\n /*00c0*/ IADD3 R6, R0.reuse, 0x64f0c9, R5 ;\n /*00d0*/ IADD3 R3, R5.reuse, 0x1f123bb5, RZ ;\n /*00e0*/ LOP3.LUT R4, R5, 0x5491333, RZ, 0x3c, !PT ;\n /*00f0*/ STL.64 [R1], R6 ;\n /*0100*/ LOP3.LUT R2, R0.reuse, 0x159a55e5, RZ, 0x3c, !PT ;\n /*0110*/ IADD3 R5, R0, 0x583f19, RZ ;\n /*0120*/ STL.64 [R1+0x8], R2 ;\n /*0130*/ STL.64 [R1+0x10], R4 ;\n /*0140*/ IMAD R0, R8, c[0x0][0x0], R9 ;\n /*0150*/ ISETP.NE.AND P0, PT, R0, RZ, PT ;\n /*0160*/ @!P0 BRA `(.L_x_1) ;\n /*0170*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*0180*/ IMAD.MOV.U32 R15, RZ, RZ, R0 ;\n /*0190*/ IMAD.MOV.U32 R16, RZ, RZ, RZ ;\n.L_x_7:\n /*01a0*/ LOP3.LUT P0, RZ, R15, 0x3, RZ, 0xc0, !PT ;\n /*01b0*/ BSSY B1, `(.L_x_2) ;\n /*01c0*/ @!P0 BRA `(.L_x_3) ;\n /*01d0*/ IMAD.MOV.U32 R8, RZ, RZ, RZ ;\n.L_x_6:\n /*01e0*/ IMAD.MOV.U32 R18, RZ, RZ, RZ ;\n /*01f0*/ CS2R R4, SRZ ;\n /*0200*/ CS2R R2, SRZ ;\n /*0210*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n.L_x_5:\n /*0220*/ IMAD R9, R18, 0x4, R1 ;\n /*0230*/ LDL R9, [R9+0x4] ;\n /*0240*/ SHF.R.S32.HI R10, RZ, 0x1f, R14 ;\n /*0250*/ IMAD.MOV.U32 R11, RZ, RZ, 0xc80 ;\n /*0260*/ IMAD.MOV.U32 R17, RZ, RZ, RZ ;\n /*0270*/ IMAD R19, R10, 0xc80, RZ ;\n /*0280*/ IMAD.WIDE.U32 R10, R14, R11, c[0x4][0x0] ;\n /*0290*/ IMAD.IADD R19, R11, 0x1, R19 ;\n.L_x_4:\n /*02a0*/ IMAD.MOV.U32 R12, RZ, RZ, 0x1 ;\n /*02b0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x2 ;\n /*02c0*/ IMAD R13, R18, 0x20, R17 ;\n /*02d0*/ SHF.L.U32 R12, R12, R17, RZ ;\n /*02e0*/ IMAD R21, R13, 0x5, RZ ;\n /*02f0*/ LOP3.LUT P0, RZ, R9, R12, RZ, 0xc0, !PT ;\n /*0300*/ IMAD.MOV.U32 R13, RZ, RZ, R19 ;\n /*0310*/ SHF.L.U32 R12, R20, R17, RZ ;\n /*0320*/ LOP3.LUT P1, RZ, R9, R12, RZ, 0xc0, !PT ;\n /*0330*/ IMAD.MOV.U32 R12, RZ, RZ, R10 ;\n /*0340*/ IMAD.WIDE R12, R21, 0x4, R12 ;\n /*0350*/ @P0 LDG.E R23, [R12.64+0x4] ;\n /*0360*/ @P1 LDG.E R21, [R12.64+0x18] ;\n /*0370*/ @P0 LDG.E R26, [R12.64] ;\n /*0380*/ @P0 LDG.E R25, [R12.64+0xc] ;\n /*0390*/ @P1 LDG.E R20, [R12.64+0x14] ;\n /*03a0*/ @P0 LDG.E R22, [R12.64+0x10] ;\n /*03b0*/ @P0 LDG.E R28, [R12.64+0x8] ;\n /*03c0*/ IMAD.MOV.U32 R30, RZ, RZ, 0x4 ;\n /*03d0*/ @P1 LDG.E R34, [R12.64+0x24] ;\n /*03e0*/ SHF.L.U32 R30, R30, R17, RZ ;\n /*03f0*/ @P1 LDG.E R24, [R12.64+0x1c] ;\n /*0400*/ LOP3.LUT P3, RZ, R9, R30, RZ, 0xc0, !PT ;\n /*0410*/ IMAD.MOV.U32 R30, RZ, RZ, 0x8 ;\n /*0420*/ @P1 LDG.E R29, [R12.64+0x20] ;\n /*0430*/ IMAD.MOV.U32 R32, RZ, RZ, 0x10 ;\n /*0440*/ SHF.L.U32 R30, R30, R17, RZ ;\n /*0450*/ LOP3.LUT P4, RZ, R9.reuse, R30, RZ, 0xc0, !PT ;\n /*0460*/ SHF.L.U32 R32, R32, R17, RZ ;\n /*0470*/ @P3 LDG.E R31, [R12.64+0x2c] ;\n /*0480*/ LOP3.LUT P5, RZ, R9, R32, RZ, 0xc0, !PT ;\n /*0490*/ @P3 LDG.E R36, [R12.64+0x28] ;\n /*04a0*/ @P3 LDG.E R32, [R12.64+0x30] ;\n /*04b0*/ @P5 LDG.E R27, [R12.64+0x54] ;\n /*04c0*/ @P5 LDG.E R30, [R12.64+0x58] ;\n /*04d0*/ @P0 LOP3.LUT R2, R2, R23, RZ, 0x3c, !PT ;\n /*04e0*/ @P4 LDG.E R23, [R12.64+0x40] ;\n /*04f0*/ @P1 LOP3.LUT R2, R2, R21, RZ, 0x3c, !PT ;\n /*0500*/ @P3 LDG.E R21, [R12.64+0x34] ;\n /*0510*/ @P0 LOP3.LUT R7, R7, R26, RZ, 0x3c, !PT ;\n /*0520*/ @P4 LDG.E R26, [R12.64+0x4c] ;\n /*0530*/ @P0 LOP3.LUT R4, R4, R25, RZ, 0x3c, !PT ;\n /*0540*/ @P4 LDG.E R25, [R12.64+0x48] ;\n /*0550*/ @P1 LOP3.LUT R7, R7, R20, RZ, 0x3c, !PT ;\n /*0560*/ @P3 LDG.E R20, [R12.64+0x38] ;\n /*0570*/ @P0 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ;\n /*0580*/ @P4 LDG.E R22, [R12.64+0x3c] ;\n /*0590*/ @P0 LOP3.LUT R3, R3, R28, RZ, 0x3c, !PT ;\n /*05a0*/ @P5 LDG.E R28, [R12.64+0x50] ;\n /*05b0*/ @P1 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ;\n /*05c0*/ IMAD.MOV.U32 R34, RZ, RZ, 0x20 ;\n /*05d0*/ @P1 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT ;\n /*05e0*/ SHF.L.U32 R34, R34, R17, RZ ;\n /*05f0*/ @P4 LDG.E R24, [R12.64+0x44] ;\n /*0600*/ LOP3.LUT P0, RZ, R9, R34, RZ, 0xc0, !PT ;\n /*0610*/ IMAD.MOV.U32 R34, RZ, RZ, 0x40 ;\n /*0620*/ @P1 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ;\n /*0630*/ @P5 LDG.E R29, [R12.64+0x5c] ;\n /*0640*/ SHF.L.U32 R34, R34, R17, RZ ;\n /*0650*/ LOP3.LUT P1, RZ, R9, R34, RZ, 0xc0, !PT ;\n /*0660*/ IMAD.MOV.U32 R34, RZ, RZ, 0x80 ;\n /*0670*/ @P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ;\n /*0680*/ @P0 LDG.E R35, [R12.64+0x70] ;\n /*0690*/ SHF.L.U32 R34, R34, R17, RZ ;\n /*06a0*/ @P0 LDG.E R33, [R12.64+0x74] ;\n /*06b0*/ @P3 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ;\n /*06c0*/ LOP3.LUT P2, RZ, R9, R34, RZ, 0xc0, !PT ;\n /*06d0*/ @P0 LDG.E R32, [R12.64+0x64] ;\n /*06e0*/ @P3 LOP3.LUT R7, R7, R36, RZ, 0x3c, !PT ;\n /*06f0*/ @P5 LDG.E R34, [R12.64+0x60] ;\n /*0700*/ @P1 LDG.E R36, [R12.64+0x78] ;\n /*0710*/ @P1 LDG.E R31, [R12.64+0x7c] ;\n /*0720*/ @P3 LOP3.LUT R4, R4, R21, RZ, 0x3c, !PT ;\n /*0730*/ @P4 LOP3.LUT R2, R2, R23, RZ, 0x3c, !PT ;\n /*0740*/ @P2 LDG.E R21, [R12.64+0x90] ;\n /*0750*/ @P4 LOP3.LUT R4, R4, R25, RZ, 0x3c, !PT ;\n /*0760*/ @P2 LDG.E R23, [R12.64+0x98] ;\n /*0770*/ @P0 LDG.E R25, [R12.64+0x68] ;\n /*0780*/ @P3 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ;\n /*0790*/ @P4 LOP3.LUT R7, R7, R22, RZ, 0x3c, !PT ;\n /*07a0*/ @P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ;\n /*07b0*/ @P0 LDG.E R22, [R12.64+0x6c] ;\n /*07c0*/ @P5 LOP3.LUT R2, R2, R27, RZ, 0x3c, !PT ;\n /*07d0*/ @P1 LDG.E R27, [R12.64+0x84] ;\n /*07e0*/ @P5 LOP3.LUT R7, R7, R28, RZ, 0x3c, !PT ;\n /*07f0*/ @P1 LDG.E R26, [R12.64+0x88] ;\n /*0800*/ @P1 LDG.E R28, [R12.64+0x80] ;\n /*0810*/ IMAD.MOV.U32 R20, RZ, RZ, 0x100 ;\n /*0820*/ SHF.L.U32 R20, R20, R17, RZ ;\n /*0830*/ LOP3.LUT P3, RZ, R9, R20, RZ, 0xc0, !PT ;\n /*0840*/ IMAD.MOV.U32 R20, RZ, RZ, 0x200 ;\n /*0850*/ @P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT ;\n /*0860*/ @P5 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ;\n /*0870*/ @P2 LDG.E R24, [R12.64+0x8c] ;\n /*0880*/ SHF.L.U32 R20, R20, R17, RZ ;\n /*0890*/ LOP3.LUT P4, RZ, R9, R20, RZ, 0xc0, !PT ;\n /*08a0*/ @P2 LDG.E R20, [R12.64+0x94] ;\n /*08b0*/ @P5 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ;\n /*08c0*/ IMAD.MOV.U32 R30, RZ, RZ, 0x400 ;\n /*08d0*/ @P0 LOP3.LUT R7, R7, R32, RZ, 0x3c, !PT ;\n /*08e0*/ @P3 LDG.E R29, [R12.64+0xac] ;\n /*08f0*/ @P5 LOP3.LUT R5, R5, R34, RZ, 0x3c, !PT ;\n /*0900*/ SHF.L.U32 R30, R30, R17, RZ ;\n /*0910*/ @P3 LDG.E R32, [R12.64+0xa8] ;\n /*0920*/ @P0 LOP3.LUT R4, R4, R35, RZ, 0x3c, !PT ;\n /*0930*/ @P0 LOP3.LUT R5, R5, R33, RZ, 0x3c, !PT ;\n /*0940*/ @P3 LDG.E R34, [R12.64+0xa0] ;\n /*0950*/ @P1 LOP3.LUT R7, R7, R36, RZ, 0x3c, !PT ;\n /*0960*/ @P2 LDG.E R36, [R12.64+0x9c] ;\n /*0970*/ LOP3.LUT P5, RZ, R9, R30, RZ, 0xc0, !PT ;\n /*0980*/ @P3 LDG.E R30, [R12.64+0xb0] ;\n /*0990*/ @P5 LDG.E R33, [R12.64+0xd0] ;\n /*09a0*/ @P0 LOP3.LUT R2, R2, R25, RZ, 0x3c, !PT ;\n /*09b0*/ @P4 LDG.E R25, [R12.64+0xc0] ;\n /*09c0*/ @P1 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ;\n /*09d0*/ @P3 LDG.E R31, [R12.64+0xa4] ;\n /*09e0*/ @P0 LOP3.LUT R3, R3, R22, RZ, 0x3c, !PT ;\n /*09f0*/ @P1 LOP3.LUT R4, R4, R27, RZ, 0x3c, !PT ;\n /*0a00*/ @P4 LDG.E R22, [R12.64+0xc4] ;\n /*0a10*/ @P1 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ;\n /*0a20*/ @P4 LDG.E R27, [R12.64+0xb8] ;\n /*0a30*/ @P4 LDG.E R26, [R12.64+0xbc] ;\n /*0a40*/ @P1 LOP3.LUT R3, R3, R28, RZ, 0x3c, !PT ;\n /*0a50*/ @P4 LDG.E R28, [R12.64+0xb4] ;\n /*0a60*/ @P2 LOP3.LUT R3, R3, R20, RZ, 0x3c, !PT ;\n /*0a70*/ IMAD.MOV.U32 R20, RZ, RZ, 0x800 ;\n /*0a80*/ SHF.L.U32 R20, R20, R17, RZ ;\n /*0a90*/ LOP3.LUT P1, RZ, R9, R20, RZ, 0xc0, !PT ;\n /*0aa0*/ IMAD.MOV.U32 R20, RZ, RZ, 0x1000 ;\n /*0ab0*/ SHF.L.U32 R20, R20, R17, RZ ;\n /*0ac0*/ LOP3.LUT P0, RZ, R9, R20, RZ, 0xc0, !PT ;\n /*0ad0*/ @P2 LOP3.LUT R2, R2, R21, RZ, 0x3c, !PT ;\n /*0ae0*/ @P2 LOP3.LUT R4, R4, R23, RZ, 0x3c, !PT ;\n /*0af0*/ @P5 LDG.E R21, [R12.64+0xcc] ;\n /*0b00*/ @P2 LOP3.LUT R7, R7, R24, RZ, 0x3c, !PT ;\n /*0b10*/ @P2 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ;\n /*0b20*/ @P5 LDG.E R24, [R12.64+0xc8] ;\n /*0b30*/ @P3 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ;\n /*0b40*/ @P3 LOP3.LUT R4, R4, R29, RZ, 0x3c, !PT ;\n /*0b50*/ @P5 LDG.E R36, [R12.64+0xd8] ;\n /*0b60*/ @P3 LOP3.LUT R7, R7, R34, RZ, 0x3c, !PT ;\n /*0b70*/ @P1 LDG.E R29, [R12.64+0xe0] ;\n /*0b80*/ @P3 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ;\n /*0b90*/ @P1 LDG.E R32, [R12.64+0xe4] ;\n /*0ba0*/ @P1 LDG.E R34, [R12.64+0xdc] ;\n /*0bb0*/ @P1 LDG.E R30, [R12.64+0xec] ;\n /*0bc0*/ @P0 LDG.E R23, [R12.64+0xfc] ;\n /*0bd0*/ @P0 LDG.E R20, [R12.64+0x100] ;\n /*0be0*/ @P4 LOP3.LUT R4, R4, R25, RZ, 0x3c, !PT ;\n /*0bf0*/ @P0 LDG.E R25, [R12.64+0xf4] ;\n /*0c00*/ @P3 LOP3.LUT R2, R2, R31, RZ, 0x3c, !PT ;\n /*0c10*/ @P5 LDG.E R31, [R12.64+0xd4] ;\n /*0c20*/ @P4 LOP3.LUT R2, R2, R27, RZ, 0x3c, !PT ;\n /*0c30*/ @P1 LDG.E R27, [R12.64+0xe8] ;\n /*0c40*/ @P4 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ;\n /*0c50*/ @P0 LDG.E R26, [R12.64+0xf8] ;\n /*0c60*/ @P4 LOP3.LUT R7, R7, R28, RZ, 0x3c, !PT ;\n /*0c70*/ @P0 LDG.E R28, [R12.64+0xf0] ;\n /*0c80*/ @P4 LOP3.LUT R5, R5, R22, RZ, 0x3c, !PT ;\n /*0c90*/ IMAD.MOV.U32 R22, RZ, RZ, 0x2000 ;\n /*0ca0*/ SHF.L.U32 R22, R22, R17, RZ ;\n /*0cb0*/ LOP3.LUT P4, RZ, R9, R22, RZ, 0xc0, !PT ;\n /*0cc0*/ IMAD.MOV.U32 R22, RZ, RZ, 0x4000 ;\n /*0cd0*/ SHF.L.U32 R22, R22, R17, RZ ;\n /*0ce0*/ LOP3.LUT P3, RZ, R9, R22, RZ, 0xc0, !PT ;\n /*0cf0*/ IMAD.MOV.U32 R22, RZ, RZ, 0x8000 ;\n /*0d00*/ @P5 LOP3.LUT R3, R3, R33, RZ, 0x3c, !PT ;\n /*0d10*/ SHF.L.U32 R22, R22, R17, RZ ;\n /*0d20*/ LOP3.LUT P2, RZ, R9, R22, RZ, 0xc0, !PT ;\n /*0d30*/ @P4 LDG.E R22, [R12.64+0x104] ;\n /*0d40*/ @P5 LOP3.LUT R2, R2, R21, RZ, 0x3c, !PT ;\n /*0d50*/ @P4 LDG.E R21, [R12.64+0x108] ;\n /*0d60*/ @P5 LOP3.LUT R7, R7, R24, RZ, 0x3c, !PT ;\n /*0d70*/ @P4 LDG.E R24, [R12.64+0x10c] ;\n /*0d80*/ @P5 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ;\n /*0d90*/ @P2 LDG.E R36, [R12.64+0x13c] ;\n /*0da0*/ @P1 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ;\n /*0db0*/ @P2 LDG.E R29, [R12.64+0x130] ;\n /*0dc0*/ @P1 LOP3.LUT R3, R3, R32, RZ, 0x3c, !PT ;\n /*0dd0*/ @P2 LDG.E R32, [R12.64+0x12c] ;\n /*0de0*/ @P1 LOP3.LUT R7, R7, R34, RZ, 0x3c, !PT ;\n /*0df0*/ @P2 LDG.E R34, [R12.64+0x134] ;\n /*0e00*/ @P1 LOP3.LUT R5, R5, R30, RZ, 0x3c, !PT ;\n /*0e10*/ @P3 LDG.E R30, [R12.64+0x120] ;\n /*0e20*/ @P0 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ;\n /*0e30*/ @P3 LDG.E R20, [R12.64+0x128] ;\n /*0e40*/ @P0 LOP3.LUT R2, R2, R25, RZ, 0x3c, !PT ;\n /*0e50*/ @P4 LDG.E R25, [R12.64+0x110] ;\n /*0e60*/ @P5 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ;\n /*0e70*/ @P2 LDG.E R31, [R12.64+0x138] ;\n /*0e80*/ @P1 LOP3.LUT R4, R4, R27, RZ, 0x3c, !PT ;\n /*0e90*/ @P3 LDG.E R27, [R12.64+0x124] ;\n /*0ea0*/ @P0 LOP3.LUT R3, R3, R26, RZ, 0x3c, !PT ;\n /*0eb0*/ @P4 LDG.E R26, [R12.64+0x114] ;\n /*0ec0*/ @P0 LOP3.LUT R4, R4, R23, RZ, 0x3c, !PT ;\n /*0ed0*/ @P0 LOP3.LUT R7, R7, R28, RZ, 0x3c, !PT ;\n /*0ee0*/ @P3 LDG.E R23, [R12.64+0x11c] ;\n /*0ef0*/ @P3 LDG.E R28, [R12.64+0x118] ;\n /*0f00*/ IADD3 R17, R17, 0x10, RZ ;\n /*0f10*/ ISETP.GE.U32.AND P0, PT, R17, 0x20, PT ;\n /*0f20*/ @P4 LOP3.LUT R7, R7, R22, RZ, 0x3c, !PT ;\n /*0f30*/ @P4 LOP3.LUT R2, R2, R21, RZ, 0x3c, !PT ;\n /*0f40*/ @P4 LOP3.LUT R3, R3, R24, RZ, 0x3c, !PT ;\n /*0f50*/ @P3 LOP3.LUT R3, R3, R30, RZ, 0x3c, !PT ;\n /*0f60*/ @P2 LOP3.LUT R3, R3, R34, RZ, 0x3c, !PT ;\n /*0f70*/ @P4 LOP3.LUT R4, R4, R25, RZ, 0x3c, !PT ;\n /*0f80*/ @P3 LOP3.LUT R4, R4, R27, RZ, 0x3c, !PT ;\n /*0f90*/ @P4 LOP3.LUT R5, R5, R26, RZ, 0x3c, !PT ;\n /*0fa0*/ @P3 LOP3.LUT R2, R2, R23, RZ, 0x3c, !PT ;\n /*0fb0*/ @P3 LOP3.LUT R5, R5, R20, RZ, 0x3c, !PT ;\n /*0fc0*/ @P3 LOP3.LUT R7, R7, R28, RZ, 0x3c, !PT ;\n /*0fd0*/ @P2 LOP3.LUT R2, R2, R29, RZ, 0x3c, !PT ;\n /*0fe0*/ @P2 LOP3.LUT R7, R7, R32, RZ, 0x3c, !PT ;\n /*0ff0*/ @P2 LOP3.LUT R4, R4, R31, RZ, 0x3c, !PT ;\n /*1000*/ @P2 LOP3.LUT R5, R5, R36, RZ, 0x3c, !PT ;\n /*1010*/ @!P0 BRA `(.L_x_4) ;\n /*1020*/ IADD3 R18, R18, 0x1, RZ ;\n /*1030*/ ISETP.GE.U32.AND P0, PT, R18, 0x5, PT ;\n /*1040*/ @!P0 BRA `(.L_x_5) ;\n /*1050*/ IADD3 R8, R8, 0x1, RZ ;\n /*1060*/ STL [R1+0x4], R7 ;\n /*1070*/ LOP3.LUT R9, R15, 0x3, RZ, 0xc0, !PT ;\n /*1080*/ STL.64 [R1+0x8], R2 ;\n /*1090*/ ISETP.GT.U32.AND P0, PT, R9, R8, PT ;\n /*10a0*/ STL.64 [R1+0x10], R4 ;\n /*10b0*/ ISETP.GT.U32.AND.EX P0, PT, RZ, RZ, PT, P0 ;\n /*10c0*/ @P0 BRA `(.L_x_6) ;\n.L_x_3:\n /*10d0*/ BSYNC B1 ;\n.L_x_2:\n /*10e0*/ SHF.R.U64 R15, R15, 0x2, R16.reuse ;\n /*10f0*/ SHF.R.U32.HI R16, RZ, 0x2, R16 ;\n /*1100*/ ISETP.NE.U32.AND P0, PT, R15, RZ, PT ;\n /*1110*/ IADD3 R14, R14, 0x1, RZ ;\n /*1120*/ ISETP.NE.AND.EX P0, PT, R16, RZ, PT, P0 ;\n /*1130*/ @!P0 CALL.REL.NOINC `(.L_x_1) ;\n /*1140*/ BRA `(.L_x_7) ;\n.L_x_1:\n /*1150*/ BSYNC B0 ;\n.L_x_0:\n /*1160*/ ISETP.GE.U32.AND P0, PT, R0, c[0x0][0x178], PT ;\n /*1170*/ STL.64 [R1+0x18], RZ ;\n /*1180*/ STL [R1+0x20], RZ ;\n /*1190*/ STL.64 [R1+0x28], RZ ;\n /*11a0*/ @P0 EXIT ;\n /*11b0*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x174] ;\n /*11c0*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x170] ;\n /*11d0*/ LDG.E R9, [R8.64] ;\n /*11e0*/ BSSY B0, `(.L_x_8) ;\n /*11f0*/ IMAD.MOV.U32 R14, RZ, RZ, RZ ;\n /*1200*/ IMAD.IADD R11, R0, 0x1, R9 ;\n.L_x_17:\n /*1210*/ SHF.R.U32.HI R8, RZ, 0x2, R7 ;\n /*1220*/ IMAD.SHL.U32 R10, R5, 0x10, RZ ;\n /*1230*/ IMAD.MOV.U32 R15, RZ, RZ, R6 ;\n /*1240*/ LOP3.LUT R8, R8, R7, RZ, 0x3c, !PT ;\n /*1250*/ IMAD.MOV.U32 R13, RZ, RZ, R4 ;\n /*1260*/ IADD3 R6, R6, 0x587c5, RZ ;\n /*1270*/ IMAD.MOV.U32 R12, RZ, RZ, R3 ;\n /*1280*/ IMAD.SHL.U32 R7, R8, 0x2, RZ ;\n /*1290*/ LOP3.LUT R7, R5, R7, R8, 0x96, !PT ;\n /*12a0*/ IMAD.MOV.U32 R8, RZ, RZ, R5 ;\n /*12b0*/ LOP3.LUT R9, R7, R10, RZ, 0x3c, !PT ;\n /*12c0*/ IMAD.IADD R16, R9, 0x1, R6 ;\n /*12d0*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*12e0*/ @!P0 BRA `(.L_x_9) ;\n /*12f0*/ SHF.R.U32.HI R7, RZ, 0x2, R2 ;\n /*1300*/ IMAD.SHL.U32 R8, R9, 0x10, RZ ;\n /*1310*/ LOP3.LUT R2, R7, R2, RZ, 0x3c, !PT ;\n /*1320*/ IMAD.SHL.U32 R6, R2, 0x2, RZ ;\n /*1330*/ LOP3.LUT R17, R9, R6, R2, 0x96, !PT ;\n /*1340*/ IADD3 R6, R15, 0xb0f8a, RZ ;\n /*1350*/ LOP3.LUT R17, R17, R8, RZ, 0x3c, !PT ;\n /*1360*/ IMAD.IADD R16, R17, 0x1, R6 ;\n /*1370*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*1380*/ @!P0 BRA `(.L_x_10) ;\n /*1390*/ SHF.R.U32.HI R2, RZ, 0x2, R3 ;\n /*13a0*/ IMAD.SHL.U32 R8, R17, 0x10, RZ ;\n /*13b0*/ IADD3 R6, R15, 0x10974f, RZ ;\n /*13c0*/ LOP3.LUT R2, R2, R3, RZ, 0x3c, !PT ;\n /*13d0*/ IMAD.SHL.U32 R3, R2, 0x2, RZ ;\n /*13e0*/ LOP3.LUT R3, R17, R3, R2, 0x96, !PT ;\n /*13f0*/ LOP3.LUT R19, R3, R8, RZ, 0x3c, !PT ;\n /*1400*/ IMAD.IADD R16, R19, 0x1, R6 ;\n /*1410*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*1420*/ @!P0 BRA `(.L_x_11) ;\n /*1430*/ SHF.R.U32.HI R3, RZ, 0x2, R4 ;\n /*1440*/ IADD3 R6, R15, 0x161f14, RZ ;\n /*1450*/ LOP3.LUT R2, R3, R4, RZ, 0x3c, !PT ;\n /*1460*/ IMAD.SHL.U32 R4, R19, 0x10, RZ ;\n /*1470*/ IMAD.SHL.U32 R3, R2, 0x2, RZ ;\n /*1480*/ LOP3.LUT R3, R19, R3, R2, 0x96, !PT ;\n /*1490*/ LOP3.LUT R7, R3, R4, RZ, 0x3c, !PT ;\n /*14a0*/ IMAD.IADD R16, R7, 0x1, R6 ;\n /*14b0*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*14c0*/ @!P0 BRA `(.L_x_12) ;\n /*14d0*/ SHF.R.U32.HI R2, RZ, 0x2, R5 ;\n /*14e0*/ IMAD.SHL.U32 R10, R7, 0x10, RZ ;\n /*14f0*/ IADD3 R6, R15, 0x1ba6d9, RZ ;\n /*1500*/ LOP3.LUT R2, R2, R5, RZ, 0x3c, !PT ;\n /*1510*/ IMAD.SHL.U32 R3, R2, 0x2, RZ ;\n /*1520*/ LOP3.LUT R3, R7, R3, R2, 0x96, !PT ;\n /*1530*/ LOP3.LUT R10, R3, R10, RZ, 0x3c, !PT ;\n /*1540*/ IMAD.IADD R16, R10, 0x1, R6 ;\n /*1550*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*1560*/ @!P0 BRA `(.L_x_13) ;\n /*1570*/ SHF.R.U32.HI R2, RZ, 0x2, R9 ;\n /*1580*/ IMAD.SHL.U32 R5, R10, 0x10, RZ ;\n /*1590*/ IADD3 R6, R15, 0x212e9e, RZ ;\n /*15a0*/ LOP3.LUT R3, R2, R9, RZ, 0x3c, !PT ;\n /*15b0*/ IMAD.SHL.U32 R2, R3, 0x2, RZ ;\n /*15c0*/ LOP3.LUT R2, R10, R2, R3, 0x96, !PT ;\n /*15d0*/ LOP3.LUT R3, R2, R5, RZ, 0x3c, !PT ;\n /*15e0*/ IMAD.IADD R16, R3, 0x1, R6 ;\n /*15f0*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*1600*/ @!P0 BRA `(.L_x_14) ;\n /*1610*/ SHF.R.U32.HI R2, RZ, 0x2, R17 ;\n /*1620*/ IMAD.SHL.U32 R5, R3, 0x10, RZ ;\n /*1630*/ IADD3 R6, R15, 0x26b663, RZ ;\n /*1640*/ LOP3.LUT R2, R2, R17, RZ, 0x3c, !PT ;\n /*1650*/ IMAD.SHL.U32 R4, R2, 0x2, RZ ;\n /*1660*/ LOP3.LUT R4, R3, R4, R2, 0x96, !PT ;\n /*1670*/ LOP3.LUT R4, R4, R5, RZ, 0x3c, !PT ;\n /*1680*/ IMAD.IADD R16, R4, 0x1, R6 ;\n /*1690*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*16a0*/ @!P0 BRA `(.L_x_15) ;\n /*16b0*/ SHF.R.U32.HI R2, RZ, 0x2, R19 ;\n /*16c0*/ IMAD.SHL.U32 R5, R4, 0x10, RZ ;\n /*16d0*/ IADD3 R6, R15, 0x2c3e28, RZ ;\n /*16e0*/ LOP3.LUT R19, R2, R19, RZ, 0x3c, !PT ;\n /*16f0*/ IMAD.SHL.U32 R2, R19, 0x2, RZ ;\n /*1700*/ LOP3.LUT R2, R4, R2, R19, 0x96, !PT ;\n /*1710*/ LOP3.LUT R5, R2, R5, RZ, 0x3c, !PT ;\n /*1720*/ IMAD.IADD R16, R5, 0x1, R6 ;\n /*1730*/ ISETP.GE.U32.AND P0, PT, R16, 0x4000, PT ;\n /*1740*/ @!P0 BRA `(.L_x_16) ;\n /*1750*/ IADD3 R14, R14, 0x8, RZ ;\n /*1760*/ IMAD.MOV.U32 R2, RZ, RZ, R10 ;\n /*1770*/ IADD3 R11, R11, 0x8, RZ ;\n /*1780*/ ISETP.GE.U32.AND P0, PT, R14, 0x186a0, PT ;\n /*1790*/ @!P0 BRA `(.L_x_17) ;\n /*17a0*/ IMAD.MOV.U32 R11, RZ, RZ, R3 ;\n /*17b0*/ STL.64 [R1+0x10], R4 ;\n /*17c0*/ STL.64 [R1+0x8], R10 ;\n /*17d0*/ STL.64 [R1], R6 ;\n /*17e0*/ EXIT ;\n.L_x_16:\n /*17f0*/ IADD3 R11, R11, 0x7, RZ ;\n /*1800*/ IMAD.MOV.U32 R8, RZ, RZ, R4 ;\n /*1810*/ IMAD.MOV.U32 R13, RZ, RZ, R3 ;\n /*1820*/ IMAD.MOV.U32 R12, RZ, RZ, R10 ;\n /*1830*/ IMAD.MOV.U32 R2, RZ, RZ, R7 ;\n /*1840*/ IMAD.MOV.U32 R9, RZ, RZ, R5 ;\n /*1850*/ BRA `(.L_x_9) ;\n.L_x_15:\n /*1860*/ IADD3 R11, R11, 0x6, RZ ;\n /*1870*/ IMAD.MOV.U32 R8, RZ, RZ, R3 ;\n /*1880*/ IMAD.MOV.U32 R13, RZ, RZ, R10 ;\n /*1890*/ IMAD.MOV.U32 R12, RZ, RZ, R7 ;\n /*18a0*/ IMAD.MOV.U32 R2, RZ, RZ, R19 ;\n /*18b0*/ IMAD.MOV.U32 R9, RZ, RZ, R4 ;\n /*18c0*/ BRA `(.L_x_9) ;\n.L_x_14:\n /*18d0*/ IADD3 R11, R11, 0x5, RZ ;\n /*18e0*/ IMAD.MOV.U32 R8, RZ, RZ, R10 ;\n /*18f0*/ IMAD.MOV.U32 R13, RZ, RZ, R7 ;\n /*1900*/ IMAD.MOV.U32 R12, RZ, RZ, R19 ;\n /*1910*/ IMAD.MOV.U32 R2, RZ, RZ, R17 ;\n /*1920*/ IMAD.MOV.U32 R9, RZ, RZ, R3 ;\n /*1930*/ BRA `(.L_x_9) ;\n.L_x_13:\n /*1940*/ IMAD.MOV.U32 R2, RZ, RZ, R9 ;\n /*1950*/ IADD3 R11, R11, 0x4, RZ ;\n /*1960*/ IMAD.MOV.U32 R8, RZ, RZ, R7 ;\n /*1970*/ IMAD.MOV.U32 R13, RZ, RZ, R19 ;\n /*1980*/ IMAD.MOV.U32 R12, RZ, RZ, R17 ;\n /*1990*/ IMAD.MOV.U32 R9, RZ, RZ, R10 ;\n /*19a0*/ BRA `(.L_x_9) ;\n.L_x_12:\n /*19b0*/ IMAD.MOV.U32 R12, RZ, RZ, R9 ;\n /*19c0*/ IADD3 R11, R11, 0x3, RZ ;\n /*19d0*/ IMAD.MOV.U32 R8, RZ, RZ, R19 ;\n /*19e0*/ IMAD.MOV.U32 R13, RZ, RZ, R17 ;\n /*19f0*/ IMAD.MOV.U32 R2, RZ, RZ, R5 ;\n /*1a00*/ IMAD.MOV.U32 R9, RZ, RZ, R7 ;\n /*1a10*/ BRA `(.L_x_9) ;\n.L_x_11:\n /*1a20*/ IMAD.MOV.U32 R13, RZ, RZ, R9 ;\n /*1a30*/ IADD3 R11, R11, 0x2, RZ ;\n /*1a40*/ IMAD.MOV.U32 R8, RZ, RZ, R17 ;\n /*1a50*/ IMAD.MOV.U32 R12, RZ, RZ, R5 ;\n /*1a60*/ IMAD.MOV.U32 R2, RZ, RZ, R4 ;\n /*1a70*/ IMAD.MOV.U32 R9, RZ, RZ, R19 ;\n /*1a80*/ BRA `(.L_x_9) ;\n.L_x_10:\n /*1a90*/ IMAD.MOV.U32 R8, RZ, RZ, R9 ;\n /*1aa0*/ IADD3 R11, R11, 0x1, RZ ;\n /*1ab0*/ IMAD.MOV.U32 R13, RZ, RZ, R5 ;\n /*1ac0*/ IMAD.MOV.U32 R12, RZ, RZ, R4 ;\n /*1ad0*/ IMAD.MOV.U32 R2, RZ, RZ, R3 ;\n /*1ae0*/ IMAD.MOV.U32 R9, RZ, RZ, R17 ;\n.L_x_9:\n /*1af0*/ BSYNC B0 ;\n.L_x_8:\n /*1b00*/ IMAD.MOV.U32 R7, RZ, RZ, R2 ;\n /*1b10*/ LEA R4, P0, R0.reuse, c[0x0][0x160], 0x3 ;\n /*1b20*/ STL.64 [R1+0x8], R12 ;\n /*1b30*/ LEA R2, P1, R0, c[0x0][0x168], 0x2 ;\n /*1b40*/ LEA.HI.X R5, R0.reuse, c[0x0][0x164], RZ, 0x3, P0 ;\n /*1b50*/ STL.64 [R1], R6 ;\n /*1b60*/ LEA.HI.X R3, R0, c[0x0][0x16c], RZ, 0x2, P1 ;\n /*1b70*/ STL.64 [R1+0x10], R8 ;\n /*1b80*/ IMAD.MOV.U32 R6, RZ, RZ, R16 ;\n /*1b90*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n /*1ba0*/ STG.E.64 [R4.64], R6 ;\n /*1bb0*/ STG.E [R2.64], R11 ;\n /*1bc0*/ EXIT ;\n.L_x_18:\n /*1bd0*/ BRA `(.L_x_18);\n /*1be0*/ NOP;\n /*1bf0*/ NOP;\n /*1c00*/ NOP;\n /*1c10*/ NOP;\n /*1c20*/ NOP;\n /*1c30*/ NOP;\n /*1c40*/ NOP;\n /*1c50*/ NOP;\n /*1c60*/ NOP;\n /*1c70*/ NOP;\n.L_x_19:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_010837.hip\"\n\t.globl\t_Z25__device_stub__mineBlocksPyPjS0_j # -- Begin function _Z25__device_stub__mineBlocksPyPjS0_j\n\t.p2align\t4, 0x90\n\t.type\t_Z25__device_stub__mineBlocksPyPjS0_j,@function\n_Z25__device_stub__mineBlocksPyPjS0_j: # @_Z25__device_stub__mineBlocksPyPjS0_j\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovq\t%rdx, 56(%rsp)\n\tmovl\t%ecx, 4(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t4(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t40(%rsp), %rdi\n\tleaq\t24(%rsp), %rsi\n\tleaq\t16(%rsp), %rdx\n\tleaq\t8(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t40(%rsp), %rsi\n\tmovl\t48(%rsp), %edx\n\tmovq\t24(%rsp), %rcx\n\tmovl\t32(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z10mineBlocksPyPjS0_j, %edi\n\tpushq\t8(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t24(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z25__device_stub__mineBlocksPyPjS0_j, .Lfunc_end0-_Z25__device_stub__mineBlocksPyPjS0_j\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 32\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 40\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 48\n\tsubq\t$32, %rsp\n\t.cfi_def_cfa_offset 80\n\t.cfi_offset %rbx, -48\n\t.cfi_offset %r12, -40\n\t.cfi_offset %r14, -32\n\t.cfi_offset %r15, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t$8192, %edi # imm = 0x2000\n\tcallq\t_Znam\n\tmovq\t%rax, %r14\n\tmovl\t$4096, %edi # imm = 0x1000\n\tcallq\t_Znam\n\tmovq\t%rax, %rbx\n\tmovl\t$0, 28(%rsp)\n\tmovq\t%rsp, %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_4\n# %bb.1:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n\tmovl\t$43, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.2:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_8\n# %bb.3:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_9\n.LBB1_4:\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$4096, %esi # imm = 0x1000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_10\n# %bb.5:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$44, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.6:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_14\n# %bb.7:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_15\n.LBB1_8:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_9:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tjmp\t.LBB1_29\n.LBB1_10:\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$4, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_16\n# %bb.11:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tmovl\t$42, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.12:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_20\n# %bb.13:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_21\n.LBB1_14:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_15:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t(%rsp), %rdi\n\tjmp\t.LBB1_28\n.LBB1_16:\n\tmovq\t16(%rsp), %rdi\n\tleaq\t28(%rsp), %rsi\n\tmovl\t$4, %edx\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_22\n# %bb.17:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tmovl\t$30, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.18:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_26\n# %bb.19:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_27\n.LBB1_20:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_21:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tjmp\t.LBB1_28\n.LBB1_22:\n\tmovabsq\t$4294967300, %rdi # imm = 0x100000004\n\tleaq\t252(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_24\n# %bb.23:\n\tmovq\t(%rsp), %rdi\n\tmovq\t8(%rsp), %rsi\n\tmovq\t16(%rsp), %rdx\n\tmovl\t$1024, %ecx # imm = 0x400\n\tcallq\t_Z25__device_stub__mineBlocksPyPjS0_j\n.LBB1_24:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_31\n# %bb.25:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$22, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rax, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tjmp\t.LBB1_36\n.LBB1_26:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_27:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n.LBB1_28:\n\tcallq\thipFree\n.LBB1_29:\n\tmovl\t$-1, %eax\n.LBB1_30:\n\taddq\t$32, %rsp\n\t.cfi_def_cfa_offset 48\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 40\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_31:\n\t.cfi_def_cfa_offset 80\n\tmovq\t(%rsp), %rsi\n\tmovl\t$8192, %edx # imm = 0x2000\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_33\n# %bb.32:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$34, %edx\n\tjmp\t.LBB1_35\n.LBB1_33:\n\tmovq\t8(%rsp), %rsi\n\tmovl\t$4096, %edx # imm = 0x1000\n\tmovq\t%rbx, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_37\n# %bb.34:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$35, %edx\n.LBB1_35:\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cerr, %edi\n.LBB1_36:\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t%r14, %rdi\n\tcallq\t_ZdaPv\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZdaPv\n\tjmp\t.LBB1_29\n.LBB1_37:\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\txorl\t%r15d, %r15d\n\tjmp\t.LBB1_39\n.LBB1_38: # in Loop: Header=BB1_39 Depth=1\n\tincq\t%r15\n\tcmpq\t$1024, %r15 # imm = 0x400\n\tje\t.LBB1_41\n.LBB1_39: # =>This Inner Loop Header: Depth=1\n\tcmpq\t$16383, (%r14,%r15,8) # imm = 0x3FFF\n\tja\t.LBB1_38\n# %bb.40: # in Loop: Header=BB1_39 Depth=1\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.7, %esi\n\tmovl\t$6, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tmovq\t%r15, %rsi\n\tcallq\t_ZNSo9_M_insertImEERSoT_\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.8, %esi\n\tmovl\t$19, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t(%r14,%r15,8), %rsi\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo9_M_insertIyEERSoT_\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.9, %esi\n\tmovl\t$12, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t(%rbx,%r15,4), %esi\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo9_M_insertImEERSoT_\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_38\n.LBB1_41:\n\tmovq\t%r14, %rdi\n\tcallq\t_ZdaPv\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZdaPv\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_30\n.LBB1_42:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_010837.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_010837.hip,@function\n_GLOBAL__sub_I_cuda_code_010837.hip: # @_GLOBAL__sub_I_cuda_code_010837.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_010837.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_010837.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z10mineBlocksPyPjS0_j, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z10mineBlocksPyPjS0_j,@object # @_Z10mineBlocksPyPjS0_j\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z10mineBlocksPyPjS0_j\n\t.p2align\t3, 0x0\n_Z10mineBlocksPyPjS0_j:\n\t.quad\t_Z25__device_stub__mineBlocksPyPjS0_j\n\t.size\t_Z10mineBlocksPyPjS0_j, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate device memory for hashes\"\n\t.size\t.L.str, 44\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate device memory for results\"\n\t.size\t.L.str.1, 45\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to allocate device memory for nonce\"\n\t.size\t.L.str.2, 43\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Failed to copy nonce to device\"\n\t.size\t.L.str.3, 31\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.4, 23\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"Failed to copy hashes back to host\"\n\t.size\t.L.str.5, 35\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\"Failed to copy results back to host\"\n\t.size\t.L.str.6, 36\n\n\t.type\t.L.str.7,@object # @.str.7\n.L.str.7:\n\t.asciz\t\"Block \"\n\t.size\t.L.str.7, 7\n\n\t.type\t.L.str.8,@object # @.str.8\n.L.str.8:\n\t.asciz\t\": Found valid hash \"\n\t.size\t.L.str.8, 20\n\n\t.type\t.L.str.9,@object # @.str.9\n.L.str.9:\n\t.asciz\t\" with nonce \"\n\t.size\t.L.str.9, 13\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z10mineBlocksPyPjS0_j\"\n\t.size\t.L__unnamed_1, 23\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_010837.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":84,"cells":{"id":{"kind":"string","value":"46a01c397fb701584e2c899b13e5876ee1e402c2_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z23insertIntoPriorityQueuePiS_ --------------------------\n .section .text._Z23insertIntoPriorityQueuePiS_,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=18\"\n .align 128\n\n\n\n\n .global _Z23insertIntoPriorityQueuePiS_\n .type _Z23insertIntoPriorityQueuePiS_,@function\n .size _Z23insertIntoPriorityQueuePiS_,(.L_x_7 - _Z23insertIntoPriorityQueuePiS_)\n .other _Z23insertIntoPriorityQueuePiS_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z23insertIntoPriorityQueuePiS_:\n.text._Z23insertIntoPriorityQueuePiS_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R10, c[0x0][0x118] ;\n /*0020*/ MOV R11, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R7, R2 ;\n /*0060*/ MOV R8, R3 ;\n /*0070*/ MOV R7, R7 ;\n /*0080*/ MOV R8, R8 ;\n /*0090*/ MOV R2, 0x8 ;\n /*00a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00b0*/ MOV R12, R2 ;\n /*00c0*/ MOV R13, R3 ;\n /*00d0*/ MOV R12, R12 ;\n /*00e0*/ MOV R13, R13 ;\n /*00f0*/ MOV R3, c[0x0][0x0] ;\n /*0100*/ S2R R0, SR_CTAID.X ;\n /*0110*/ MOV R0, R0 ;\n /*0120*/ S2R R2, SR_TID.X ;\n /*0130*/ MOV R2, R2 ;\n /*0140*/ IMAD R4, R0, R3, R2 ;\n /*0150*/ ISETP.GT.AND P0, PT, R4, 0x1fff, PT ;\n /*0160*/ SHF.L.U32 R2, R2, 0x2, RZ ;\n /*0170*/ MOV R5, RZ ;\n /*0180*/ IADD3 R6, R5, R2, RZ ;\n /*0190*/ MOV R0, R7 ;\n /*01a0*/ MOV R2, R8 ;\n /*01b0*/ MOV R12, R12 ;\n /*01c0*/ MOV R13, R13 ;\n /*01d0*/ MOV R3, R3 ;\n /*01e0*/ MOV R4, R4 ;\n /*01f0*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*0200*/ MOV R5, R5 ;\n /*0210*/ MOV R6, R6 ;\n /*0220*/ @P0 BRA `(.L_x_0) ;\n /*0230*/ MOV R12, R12 ;\n /*0240*/ MOV R13, R13 ;\n /*0250*/ IMAD.WIDE R8, R4, 0x4, RZ ;\n /*0260*/ MOV R7, R8 ;\n /*0270*/ MOV R9, R9 ;\n /*0280*/ IADD3 R8, P1, R12, R7, RZ ;\n /*0290*/ IADD3.X R9, R13, R9, RZ, P1, !PT ;\n /*02a0*/ MOV R8, R8 ;\n /*02b0*/ MOV R9, R9 ;\n /*02c0*/ MOV R8, R8 ;\n /*02d0*/ MOV R9, R9 ;\n /*02e0*/ R2UR UR4, R10 ;\n /*02f0*/ R2UR UR5, R11 ;\n /*0300*/ LDG.E R8, [R8.64] ;\n /*0310*/ MOV R6, R6 ;\n /*0320*/ STS [R6], R8 ;\n.L_x_0:\n /*0330*/ WARPSYNC 0xffffffff ;\n /*0340*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0350*/ ISETP.LT.U32.AND P1, PT, R3, 0x2, PT ;\n /*0360*/ @P1 BRA `(.L_x_1) ;\n /*0370*/ MOV R7, 0x1 ;\n /*0380*/ MOV R7, R7 ;\n.L_x_4:\n /*0390*/ SHF.L.U32 R8, R7, 0x2, RZ ;\n /*03a0*/ IADD3 R8, R5, R8, RZ ;\n /*03b0*/ MOV R8, R8 ;\n /*03c0*/ LDS R8, [R8] ;\n /*03d0*/ MOV R7, R7 ;\n /*03e0*/ MOV R8, R8 ;\n /*03f0*/ MOV R9, R7 ;\n.L_x_3:\n /*0400*/ IADD3 R12, R9, -0x1, RZ ;\n /*0410*/ SHF.L.U32 R13, R9, 0x2, RZ ;\n /*0420*/ IADD3 R13, R5, R13, RZ ;\n /*0430*/ IADD3 R14, R13, -0x4, RZ ;\n /*0440*/ IADD3 R15, R13, -0x4, RZ ;\n /*0450*/ MOV R15, R15 ;\n /*0460*/ LDS R15, [R15] ;\n /*0470*/ ISETP.GE.AND P1, PT, R15, R8, PT ;\n /*0480*/ MOV R12, R12 ;\n /*0490*/ MOV R13, R13 ;\n /*04a0*/ MOV R14, R14 ;\n /*04b0*/ MOV R15, R15 ;\n /*04c0*/ @P1 BRA `(.L_x_2) ;\n /*04d0*/ IADD3 R13, R13, -0x4, RZ ;\n /*04e0*/ IADD3 R13, R13, 0x4, RZ ;\n /*04f0*/ MOV R13, R13 ;\n /*0500*/ STS [R13], R15 ;\n /*0510*/ ISETP.GT.AND P1, PT, R9, 0x1, PT ;\n /*0520*/ MOV R12, R12 ;\n /*0530*/ MOV R14, R14 ;\n /*0540*/ MOV R9, R12 ;\n /*0550*/ MOV R13, R14 ;\n /*0560*/ @P1 BRA `(.L_x_3) ;\n.L_x_2:\n /*0570*/ MOV R13, R13 ;\n /*0580*/ STS [R13], R8 ;\n /*0590*/ IADD3 R7, R7, 0x1, RZ ;\n /*05a0*/ ISETP.LT.U32.AND P1, PT, R7, R3, PT ;\n /*05b0*/ MOV R7, R7 ;\n /*05c0*/ @P1 BRA `(.L_x_4) ;\n.L_x_1:\n /*05d0*/ WARPSYNC 0xffffffff ;\n /*05e0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*05f0*/ @P0 BRA `(.L_x_5) ;\n /*0600*/ MOV R6, R6 ;\n /*0610*/ LDS R6, [R6] ;\n /*0620*/ MOV R0, R0 ;\n /*0630*/ MOV R7, R2 ;\n /*0640*/ IMAD.WIDE R4, R4, 0x4, RZ ;\n /*0650*/ MOV R2, R4 ;\n /*0660*/ MOV R3, R5 ;\n /*0670*/ IADD3 R2, P0, R0, R2, RZ ;\n /*0680*/ IADD3.X R3, R7, R3, RZ, P0, !PT ;\n /*0690*/ MOV R2, R2 ;\n /*06a0*/ MOV R3, R3 ;\n /*06b0*/ MOV R2, R2 ;\n /*06c0*/ MOV R3, R3 ;\n /*06d0*/ R2UR UR4, R10 ;\n /*06e0*/ R2UR UR5, R11 ;\n /*06f0*/ STG.E [R2.64], R6 ;\n.L_x_5:\n /*0700*/ EXIT ;\n.L_x_6:\n /*0710*/ BRA `(.L_x_6);\n /*0720*/ NOP;\n /*0730*/ NOP;\n /*0740*/ NOP;\n /*0750*/ NOP;\n /*0760*/ NOP;\n /*0770*/ NOP;\n /*0780*/ NOP;\n /*0790*/ NOP;\n /*07a0*/ NOP;\n /*07b0*/ NOP;\n /*07c0*/ NOP;\n /*07d0*/ NOP;\n /*07e0*/ NOP;\n /*07f0*/ NOP;\n.L_x_7:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z23insertIntoPriorityQueuePiS_ ; -- Begin function _Z23insertIntoPriorityQueuePiS_\n\t.globl\t_Z23insertIntoPriorityQueuePiS_\n\t.p2align\t8\n\t.type\t_Z23insertIntoPriorityQueuePiS_,@function\n_Z23insertIntoPriorityQueuePiS_: ; @_Z23insertIntoPriorityQueuePiS_\n; %bb.0:\n\ts_load_b32 s2, s[0:1], 0x1c\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s3, s2, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[1:2], null, s15, s3, v[0:1]\n\tv_cmp_gt_i32_e64 s2, 0x2000, v1\n\tv_ashrrev_i32_e32 v2, 31, v1\n\ts_delay_alu instid0(VALU_DEP_2)\n\ts_and_saveexec_b32 s4, s2\n\ts_cbranch_execz .LBB0_2\n; %bb.1:\n\ts_load_b64 s[6:7], s[0:1], 0x8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], 2, v[1:2]\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, s6, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v4, vcc_lo\n\tglobal_load_b32 v3, v[3:4], off\n\tv_lshl_add_u32 v4, v0, 2, 0\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v4, v3\n.LBB0_2:\n\ts_or_b32 exec_lo, exec_lo, s4\n\ts_cmp_lt_u32 s3, 2\n\ts_mov_b32 s4, 2\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_cbranch_scc1 .LBB0_11\n; %bb.3:\n\ts_mov_b32 s5, 1\n\ts_mov_b32 s6, 0\n\ts_set_inst_prefetch_distance 0x1\n\ts_branch .LBB0_5\n\t.p2align\t6\n.LBB0_4: ; in Loop: Header=BB0_5 Depth=1\n\ts_lshl_b32 s7, s10, 2\n\ts_add_i32 s5, s5, 1\n\ts_add_i32 s7, s7, 0\n\ts_add_i32 s4, s4, 1\n\tv_mov_b32_e32 v4, s7\n\ts_add_i32 s6, s6, 4\n\ts_cmp_eq_u32 s5, s3\n\tds_store_b32 v4, v3\n\ts_cbranch_scc1 .LBB0_11\n.LBB0_5: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_7 Depth 2\n\ts_lshl_b32 s7, s5, 2\n\ts_mov_b32 s9, s4\n\ts_add_i32 s7, s7, 0\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_mov_b32_e32 v3, s7\n\ts_mov_b32 s7, s6\n\tds_load_b32 v3, v3\n\ts_branch .LBB0_7\n\t.p2align\t6\n.LBB0_6: ; in Loop: Header=BB0_7 Depth=2\n\ts_and_not1_b32 vcc_lo, exec_lo, s12\n\ts_cbranch_vccz .LBB0_9\n.LBB0_7: ; Parent Loop BB0_5 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_mov_b32_e32 v4, s7\n\ts_mov_b32 s8, s9\n\ts_mov_b32 s11, -1\n\ts_mov_b32 s12, -1\n ; implicit-def: $sgpr9\n ; implicit-def: $sgpr10\n\tds_load_b32 v4, v4\n\ts_waitcnt lgkmcnt(0)\n\tv_cmp_ge_i32_e32 vcc_lo, v4, v3\n\ts_cbranch_vccnz .LBB0_6\n; %bb.8: ; in Loop: Header=BB0_7 Depth=2\n\ts_add_i32 s9, s8, -1\n\tv_mov_b32_e32 v5, s7\n\ts_add_i32 s7, s7, -4\n\ts_cmp_lt_i32 s9, 2\n\ts_mov_b32 s10, 0\n\ts_mov_b32 s11, 0\n\ts_cselect_b32 s12, -1, 0\n\tds_store_b32 v5, v4 offset:4\n\ts_branch .LBB0_6\n.LBB0_9: ; in Loop: Header=BB0_5 Depth=1\n\ts_and_b32 vcc_lo, exec_lo, s11\n\ts_cbranch_vccz .LBB0_4\n; %bb.10: ; in Loop: Header=BB0_5 Depth=1\n\ts_add_i32 s10, s8, -1\n\ts_branch .LBB0_4\n.LBB0_11:\n\ts_set_inst_prefetch_distance 0x2\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_13\n; %bb.12:\n\ts_load_b64 s[0:1], s[0:1], 0x0\n\tv_lshl_add_u32 v0, v0, 2, 0\n\tds_load_b32 v3, v0\n\tv_lshlrev_b64 v[0:1], 2, v[1:2]\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, s0, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo\n\tglobal_store_b32 v[0:1], v3, off\n.LBB0_13:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z23insertIntoPriorityQueuePiS_\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 272\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 6\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z23insertIntoPriorityQueuePiS_, .Lfunc_end0-_Z23insertIntoPriorityQueuePiS_\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 452\n; NumSgprs: 18\n; NumVgprs: 6\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 0\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 6\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 20\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 28\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 30\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 32\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 34\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 36\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 38\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 56\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 80\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 136\n .size: 4\n .value_kind: hidden_dynamic_lds_size\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 272\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z23insertIntoPriorityQueuePiS_\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z23insertIntoPriorityQueuePiS_.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 6\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":85,"cells":{"id":{"kind":"string","value":"2ee92fa1ae56a694a97b9451951925e11d7c93ca_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z26homomorphic_encrypt_kernelPiS_i --------------------------\n .section .text._Z26homomorphic_encrypt_kernelPiS_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=10\"\n .align 128\n\n\n\n\n .global _Z26homomorphic_encrypt_kernelPiS_i\n .type _Z26homomorphic_encrypt_kernelPiS_i,@function\n .size _Z26homomorphic_encrypt_kernelPiS_i,(.L_x_1 - _Z26homomorphic_encrypt_kernelPiS_i)\n .other _Z26homomorphic_encrypt_kernelPiS_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z26homomorphic_encrypt_kernelPiS_i:\n.text._Z26homomorphic_encrypt_kernelPiS_i:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R4, SR_CTAID.X ;\n /*0020*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0030*/ S2R R3, SR_TID.X ;\n /*0040*/ IMAD R4, R4, c[0x0][0x0], R3 ;\n /*0050*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x170], PT ;\n /*0060*/ @P0 EXIT ;\n /*0070*/ MOV R5, 0x4 ;\n /*0080*/ IMAD.WIDE R2, R4, R5, c[0x0][0x160] ;\n /*0090*/ LDG.E R2, [R2.64] ;\n /*00a0*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ;\n /*00b0*/ IADD3 R7, R2, 0x1, RZ ;\n /*00c0*/ STG.E [R4.64], R7 ;\n /*00d0*/ EXIT ;\n.L_x_0:\n /*00e0*/ BRA `(.L_x_0);\n /*00f0*/ NOP;\n /*0100*/ NOP;\n /*0110*/ NOP;\n /*0120*/ NOP;\n /*0130*/ NOP;\n /*0140*/ NOP;\n /*0150*/ NOP;\n /*0160*/ NOP;\n /*0170*/ NOP;\n.L_x_1:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.weak\t__cxa_pure_virtual ; -- Begin function __cxa_pure_virtual\n\t.p2align\t2\n\t.type\t__cxa_pure_virtual,@function\n__cxa_pure_virtual: ; @__cxa_pure_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB0_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB0_1\n.Lfunc_end0:\n\t.size\t__cxa_pure_virtual, .Lfunc_end0-__cxa_pure_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.weak\t__cxa_deleted_virtual ; -- Begin function __cxa_deleted_virtual\n\t.p2align\t2\n\t.type\t__cxa_deleted_virtual,@function\n__cxa_deleted_virtual: ; @__cxa_deleted_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB1_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB1_1\n.Lfunc_end1:\n\t.size\t__cxa_deleted_virtual, .Lfunc_end1-__cxa_deleted_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hsa_signal_add\n\t.type\t__ockl_hsa_signal_add,@function\n__ockl_hsa_signal_add: ; @__ockl_hsa_signal_add\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v4, s32 offset:36 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s32 offset:32 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v2\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v1, s32 offset:28 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[3:4], s32 offset:20 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tscratch_store_b64 off, v[3:4], s32 offset:12 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s32 offset:4 ; 8-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 3\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s1, 0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 1\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_3\n; %bb.2:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 4\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s1, 2\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_17\n\ts_branch .LBB2_4\n.LBB2_3:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 1\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 0\n\tv_writelane_b32 v6, s2, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 5\n\tv_writelane_b32 v6, s1, 6\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 7\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_13\n\ts_branch .LBB2_6\n.LBB2_4:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 9\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_15\n\ts_branch .LBB2_18\n.LBB2_5:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 10\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 11\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 0\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_3\n.LBB2_6:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 12\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_7\n\ts_branch .LBB2_14\n.LBB2_7:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 13\n\tv_writelane_b32 v6, s1, 14\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 15\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_9\n; %bb.8:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 4\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_lt_i32_e64 s2, v0, s0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 13\n\tv_writelane_b32 v6, s0, 14\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_9:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s3, v6, 15\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_readlane_b32 s1, v6, 4\n\tv_readlane_b32 s2, v6, 13\n\tv_readlane_b32 s0, v6, 14\n\ts_and_b32 s0, s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 5\n\tv_writelane_b32 v6, s0, 6\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_13\n.LBB2_10:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 16\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 17\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_11:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v6, 17\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 19\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_19\n; %bb.12:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_19\n.LBB2_13:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v6, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s0, v6, 5\n\tv_readlane_b32 s1, v6, 6\n\tv_writelane_b32 v6, s1, 16\n\tv_writelane_b32 v6, s1, 17\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 18\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_11\n\ts_branch .LBB2_10\n.LBB2_14:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_branch .LBB2_7\n.LBB2_15:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 9\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 8\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_17\n.LBB2_16:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_5\n.LBB2_17:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v6, 2\n\tv_writelane_b32 v6, s1, 11\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 10\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_5\n\ts_branch .LBB2_16\n.LBB2_18:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 0\n\ts_xor_b32 s0, exec_lo, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_15\n.LBB2_19:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[0:1], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s1, v[0:1], s[0:1]\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 20\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_21\n; %bb.20:\n\tscratch_load_b64 v[1:2], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[3:4], off offset:24\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[1:2], v[3:4], off\n\tv_readfirstlane_b32 s0, v0\n\ts_mov_b32 s1, 0xff\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB2_21:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 20\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:48 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end2:\n\t.size\t__ockl_hsa_signal_add, .Lfunc_end2-__ockl_hsa_signal_add\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 1952\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 56\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_internal\n\t.type\t__ockl_hostcall_internal,@function\n__ockl_hostcall_internal: ; @__ockl_hostcall_internal\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s18, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v24, s33 offset:308 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v25, s33 offset:312 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v26, s33 offset:316 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x150\n\tv_writelane_b32 v24, s30, 0\n\tv_writelane_b32 v24, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:132 ; 4-byte Folded Spill\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s6, 0\n\tv_writelane_b32 v26, s7, 1\n\tscratch_store_b32 off, v18, s33 offset:128 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v16\n\tscratch_load_b32 v16, off, s33 offset:128 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:124 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v14\n\tscratch_load_b32 v14, off, s33 offset:124 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v12\n\tscratch_load_b32 v12, off, s33 offset:120 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:116 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v10\n\tscratch_load_b32 v10, off, s33 offset:116 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:112 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v8\n\tscratch_load_b32 v8, off, s33 offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v6\n\tscratch_load_b32 v6, off, s33 offset:108 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:104 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v4\n\tscratch_load_b32 v4, off, s33 offset:104 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v2\n\tscratch_load_b32 v2, off, s33 offset:100 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:96 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v1, s33 offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s33 offset:92 ; 4-byte Folded Reload\n\tv_writelane_b32 v26, s15, 2\n\tv_writelane_b32 v26, s14, 3\n\tv_writelane_b32 v26, s13, 4\n\tv_writelane_b32 v26, s12, 5\n\tv_writelane_b32 v26, s10, 6\n\tv_writelane_b32 v26, s11, 7\n\tv_writelane_b32 v26, s8, 8\n\tv_writelane_b32 v26, s9, 9\n\tv_writelane_b32 v26, s4, 10\n\tv_writelane_b32 v26, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\ts_waitcnt vmcnt(8)\n\tv_mov_b32_e32 v18, v16\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec\n\ts_waitcnt vmcnt(7)\n\tv_mov_b32_e32 v16, v14\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\ts_waitcnt vmcnt(6)\n\tv_mov_b32_e32 v14, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\ts_waitcnt vmcnt(5)\n\tv_mov_b32_e32 v12, v10\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\ts_waitcnt vmcnt(4)\n\tv_mov_b32_e32 v10, v8\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\ts_waitcnt vmcnt(3)\n\tv_mov_b32_e32 v8, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[17:18], s33 offset:84 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[15:16], s33 offset:76 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[13:14], s33 offset:68 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[11:12], s33 offset:60 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[9:10], s33 offset:52 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[7:8], s33 offset:44 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[5:6], s33 offset:36 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:28 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s0, -1\n\tv_mbcnt_lo_u32_b32 v0, s0, s1\n\tv_mbcnt_hi_u32_b32 v0, s0, v0\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b32 off, v3, s33 offset:24 ; 4-byte Folded Spill\n\tv_readfirstlane_b32 s0, v0\n\tscratch_store_b64 off, v[1:2], s33 offset:16 ; 8-byte Folded Spill\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, s1\n\tv_writelane_b32 v26, s0, 12\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v0, 0\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 13\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_6\n; %bb.1:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_mov_b64 s[2:3], 24\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:160 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b64 s[2:3], 40\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:152 ; 8-byte Folded Spill\n\tglobal_load_b64 v[5:6], v[0:1], off\n\tglobal_load_b64 v[10:11], v[0:1], off offset:40\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s1, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s1, v4, s1, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s0, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 15\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_5\n.LBB3_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 14\n\tscratch_load_b64 v[2:3], off, s33 offset:144 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:160 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:152 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[4:5], off\n\tglobal_load_b64 v[10:11], v[7:8], off\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s2, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s2, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s2, v4, s2, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e64 s0, v[0:1], v[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:168 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 16\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_2\n; %bb.3:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 16\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.4:\n\tscratch_load_b64 v[0:1], off, s33 offset:168 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n.LBB3_5:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:136 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n.LBB3_6:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[4:5], s0, v[4:5]\n\tv_mov_b32_e32 v2, v4\n\tv_readfirstlane_b32 s4, v3\n\tv_readfirstlane_b32 s2, v2\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr3\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s5\n\ts_lshl_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s0, 0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s0\n\ts_or_b64 s[2:3], s[2:3], s[4:5]\n\tv_writelane_b32 v26, s2, 17\n\tv_writelane_b32 v26, s3, 18\n\tglobal_load_b64 v[2:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:200 ; 8-byte Folded Spill\n\ts_mov_b64 s[6:7], 40\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s7\n\tv_add_co_u32 v2, s4, v2, s4\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tglobal_load_b64 v[3:4], v[0:1], off offset:40\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v4\n\tv_and_b32_e64 v2, s0, v2\n\ts_mov_b32 s0, s2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_and_b32_e64 v3, s0, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tscratch_store_b64 off, v[5:6], s33 offset:184 ; 8-byte Folded Spill\n\tglobal_load_b64 v[1:2], v[0:1], off offset:8\n\ts_mov_b32 s0, 12\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], exec\n\tv_writelane_b32 v26, s2, 19\n\tv_writelane_b32 v26, s3, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 21\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_8\n; %bb.7:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 19\n\tv_readlane_b32 s1, v26, 20\n\tscratch_load_b32 v2, off, s33 offset:96 ; 4-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v0\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[3:4], s2, v5, s3, 0\n\tv_mov_b32_e32 v9, v4\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s2\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v5\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[0:1], s2, v[0:1]\n\tv_mov_b32_e32 v5, v0\n\tv_mad_u64_u32 v[0:1], s3, v5, s3, v[9:10]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_lshlrev_b64 v[9:10], s2, v[0:1]\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v4, v3\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n\tv_mov_b32_e32 v3, v9\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v5, v1, v3\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s2, v0, v4\n\tv_add_co_ci_u32_e64 v3, s2, v1, v3, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tglobal_store_b32 v[0:1], v2, off offset:16\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tglobal_store_b64 v[0:1], v[2:3], off offset:8\n\tv_mov_b32_e32 v2, 1\n\tglobal_store_b32 v[0:1], v2, off offset:20\n.LBB3_8:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[2:3], off, s33 offset:84 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:76 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:68 ; 8-byte Folded Reload\n\tscratch_load_b64 v[8:9], off, s33 offset:60 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:52 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[14:15], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[16:17], off, s33 offset:28 ; 8-byte Folded Reload\n\tscratch_load_b64 v[22:23], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:24 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v18, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\ts_mov_b32 s0, 6\n\ts_waitcnt vmcnt(0)\n\tv_lshlrev_b64 v[20:21], s0, v[0:1]\n\tv_mov_b32_e32 v0, v22\n\tv_mov_b32_e32 v19, v20\n\tv_mov_b32_e32 v1, v23\n\tv_mov_b32_e32 v18, v21\n\tv_add_co_u32 v0, s0, v0, v19\n\tv_add_co_ci_u32_e64 v18, s0, v1, v18, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\tscratch_store_b64 off, v[0:1], s33 offset:216 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_mov_b64 s[4:5], 8\n\tv_mov_b32_e32 v16, v0\n\ts_mov_b32 s2, s4\n\tv_mov_b32_e32 v17, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v16, s2, v16, s2\n\tv_add_co_ci_u32_e64 v18, s0, v17, s0, s2\n ; kill: def $vgpr16 killed $vgpr16 def $vgpr16_vgpr17 killed $exec\n\tv_mov_b32_e32 v17, v18\n\tscratch_store_b64 off, v[16:17], s33 offset:208 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[14:15], off offset:8\n\tglobal_store_b64 v[0:1], v[12:13], off offset:16\n\tglobal_store_b64 v[0:1], v[10:11], off offset:24\n\tglobal_store_b64 v[0:1], v[8:9], off offset:32\n\tglobal_store_b64 v[0:1], v[6:7], off offset:40\n\tglobal_store_b64 v[0:1], v[4:5], off offset:48\n\tglobal_store_b64 v[0:1], v[2:3], off offset:56\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 22\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_13\n; %bb.9:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[5:6], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_mov_b64 s[4:5], 32\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:240 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:32 glc\n\ts_waitcnt vmcnt(1)\n\tglobal_load_b64 v[7:8], v[7:8], off\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v8\n\tv_and_b32_e64 v4, v4, s0\n\ts_mov_b32 s1, s2\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n\tv_and_b32_e64 v7, v7, s1\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v4, v7\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[9:10], s2, v4, s3, 0\n\tv_mov_b32_e32 v11, v10\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[7:8], s3, v4, s3, v[11:12]\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s3\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_lshlrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v11, v8\n ; kill: def $vgpr9 killed $vgpr9 killed $vgpr9_vgpr10 killed $exec\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v4, v10\n\tv_or_b32_e64 v4, v4, v11\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v7, v9\n\tv_or_b32_e64 v8, v7, v8\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v8\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v9\n\tv_add_co_u32 v4, s2, v4, v7\n\tv_add_co_ci_u32_e64 v6, s2, v5, v6, s2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:232 ; 8-byte Folded Spill\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v10, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 23\n\tv_writelane_b32 v26, s0, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 25\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_14\n.LBB3_10: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 24\n\tv_readlane_b32 s1, v26, 23\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[2:3], off, s33 offset:224 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:240 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:232 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s1, s3\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v10, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v26, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 26\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_10\n; %bb.11:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_branch .LBB3_14\n.LBB3_13:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB3_15\n.LBB3_14:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s15, v26, 2\n\tv_readlane_b32 s14, v26, 3\n\tv_readlane_b32 s13, v26, 4\n\tv_readlane_b32 s12, v26, 5\n\tv_readlane_b32 s10, v26, 6\n\tv_readlane_b32 s11, v26, 7\n\tv_readlane_b32 s8, v26, 8\n\tv_readlane_b32 s9, v26, 9\n\tv_readlane_b32 s6, v26, 0\n\tv_readlane_b32 s7, v26, 1\n\tv_readlane_b32 s4, v26, 10\n\tv_readlane_b32 s5, v26, 11\n\tscratch_load_b32 v31, off, s33 offset:132 ; 4-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hsa_signal_add@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hsa_signal_add@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v3, 0\n\tv_mov_b32_e32 v4, 3\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_branch .LBB3_13\n.LBB3_15:\n\tscratch_load_b64 v[6:7], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[3:4], s0, v2, s1, 0\n\tv_mov_b32_e32 v8, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[0:1]\n\tv_mov_b32_e32 v2, v0\n\tv_mad_u64_u32 v[0:1], s1, v2, s1, v[8:9]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\tv_mov_b32_e32 v5, v2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_mov_b32_e32 v0, v4\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v1, v3\n\tv_or_b32_e64 v4, v1, v2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v1, s0, v1, v3\n\tv_add_co_ci_u32_e64 v0, s0, v0, v2, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[2:3], 20\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:248 ; 8-byte Folded Spill\n.LBB3_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 27\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_18\n; %bb.17: ; in Loop: Header=BB3_16 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:248 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 1\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n.LBB3_18: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s33 offset:256 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s1, v0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0\n\ts_cmp_eq_u32 s1, s2\n\tv_writelane_b32 v26, s0, 28\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_cbranch_scc1 .LBB3_20\n; %bb.19: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_sleep 1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v26, s0, 28\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n.LBB3_20: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 28\n\tv_cndmask_b32_e64 v0, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v0, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccnz .LBB3_16\n; %bb.21:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:208 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:216 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:268 ; 8-byte Folded Spill\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:260 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 29\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_27\n; %bb.22:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[11:12], v[2:3], off\n\ts_mov_b64 s[4:5], 1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v11\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v12\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v4, v2\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v3\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_eq_u64_e64 s0, v[4:5], s[0:1]\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v5\n\tv_cndmask_b32_e64 v10, v6, v7, s0\n\tv_mov_b32_e32 v3, v2\n\tv_mov_b32_e32 v2, v4\n\tv_cndmask_b32_e64 v4, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v2, v8\n\tv_mov_b32_e32 v3, v9\n\tscratch_store_b64 off, v[2:3], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 24\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v5, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v5\n\tscratch_store_b64 off, v[2:3], s33 offset:292 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\tglobal_load_b64 v[6:7], v[0:1], off\n\tv_mov_b32_e32 v5, v9\n\tv_mov_b32_e32 v13, v12\n\tv_and_b32_e64 v5, v5, v13\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v11\n\tv_and_b32_e64 v8, v8, v9\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[11:12], s0, v5, s1, 0\n\tv_mov_b32_e32 v13, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\tv_mov_b32_e32 v14, v5\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v5, v8\n\tv_mad_u64_u32 v[8:9], s1, v5, s1, v[13:14]\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s1\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_lshlrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v13, v9\n ; kill: def $vgpr11 killed $vgpr11 killed $vgpr11_vgpr12 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\tv_mov_b32_e32 v5, v12\n\tv_or_b32_e64 v5, v5, v13\n\tv_mov_b32_e32 v9, v8\n\tv_mov_b32_e32 v8, v11\n\tv_or_b32_e64 v11, v8, v9\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v8, v11\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v7, v12\n\tv_add_co_u32 v5, s0, v5, v8\n\tv_add_co_ci_u32_e64 v7, s0, v6, v7, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[5:6], s33 offset:284 ; 8-byte Folded Spill\n\tglobal_store_b64 v[5:6], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 30\n\tv_writelane_b32 v26, s0, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s0, 0\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_26\n.LBB3_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v25, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v25, 31\n\tv_readlane_b32 s1, v25, 30\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[2:3], off, s33 offset:276 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:300 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:284 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[6:7], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v10, v5\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v25, s1, 30\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v25, s1, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v25, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_23\n; %bb.24:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.25:\n.LBB3_26:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 0\n\ts_or_b32 exec_lo, exec_lo, s0\n.LBB3_27:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[3:4], off, s33 offset:260 ; 8-byte Folded Reload\n\tscratch_load_b64 v[1:2], off, s33 offset:268 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v4\n\tv_readlane_b32 s30, v24, 0\n\tv_readlane_b32 s31, v24, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v24, off, s33 offset:308 ; 4-byte Folded Reload\n\tscratch_load_b32 v25, off, s33 offset:312 ; 4-byte Folded Reload\n\tscratch_load_b32 v26, off, s33 offset:316 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffeb0\n\ts_mov_b32 s33, s18\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end3:\n\t.size\t__ockl_hostcall_internal, .Lfunc_end3-__ockl_hostcall_internal\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 5344\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 392\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_preview\n\t.type\t__ockl_hostcall_preview,@function\n__ockl_hostcall_preview: ; @__ockl_hostcall_preview\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v27, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_writelane_b32 v27, s33, 0\n\tv_writelane_b32 v27, s30, 1\n\tv_writelane_b32 v27, s31, 2\n\tv_mov_b32_e32 v18, v16\n\tv_mov_b32_e32 v17, v15\n\tv_mov_b32_e32 v16, v14\n\tv_mov_b32_e32 v15, v13\n\tv_mov_b32_e32 v14, v12\n\tv_mov_b32_e32 v13, v11\n\tv_mov_b32_e32 v12, v10\n\tv_mov_b32_e32 v11, v9\n\tv_mov_b32_e32 v10, v8\n\tv_mov_b32_e32 v9, v7\n\tv_mov_b32_e32 v8, v6\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s0, s[0:1], 0x0\n\ts_mov_b32 s1, 0x1f4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s0, s1\n\ts_mov_b32 s1, 0x50\n\ts_mov_b32 s0, 24\n\ts_cselect_b32 s0, s0, s1\n\ts_load_b64 s[0:1], s[8:9], s0 offset:0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_internal@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_internal@rel32@hi+12\n\tv_mov_b32_e32 v0, s3\n\tv_mov_b32_e32 v1, s2\n\tv_readlane_b32 s30, v27, 1\n\tv_readlane_b32 s31, v27, 2\n\tv_readlane_b32 s33, v27, 0\n\ts_xor_saveexec_b32 s2, -1\n\tscratch_load_b32 v27, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s2\n\ts_setpc_b64 s[0:1]\n.Lfunc_end4:\n\t.size\t__ockl_hostcall_preview, .Lfunc_end4-__ockl_hostcall_preview\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 272\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 400\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_stderr_begin\n\t.type\t__ockl_fprintf_stderr_begin,@function\n__ockl_fprintf_stderr_begin: ; @__ockl_fprintf_stderr_begin\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v1, 33\n\tv_mov_b32_e32 v3, 1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v2, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end5:\n\t.size\t__ockl_fprintf_stderr_begin, .Lfunc_end5-__ockl_fprintf_stderr_begin\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 228\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 416\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_string_n\n\t.type\t__ockl_fprintf_append_string_n,@function\n__ockl_fprintf_append_string_n: ; @__ockl_fprintf_append_string_n\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s20, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v32, s33 offset:704 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v33, s33 offset:708 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v34, s33 offset:712 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x2d0\n\tv_writelane_b32 v32, s30, 0\n\tv_writelane_b32 v32, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:68 ; 4-byte Folded Spill\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s6, 0\n\tv_writelane_b32 v34, s7, 1\n\tscratch_store_b32 off, v6, s33 offset:60 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v5, s33 offset:56 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v4, s33 offset:64 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v6, v3\n\tscratch_load_b32 v3, off, s33 offset:64 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v2\n\tscratch_load_b32 v2, off, s33 offset:60 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v4, s33 offset:52 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v7, v1\n\tscratch_load_b32 v1, off, s33 offset:56 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v5, v0\n\tscratch_load_b32 v0, off, s33 offset:52 ; 4-byte Folded Reload\n\tv_writelane_b32 v34, s15, 2\n\tv_writelane_b32 v34, s14, 3\n\tv_writelane_b32 v34, s13, 4\n\tv_writelane_b32 v34, s12, 5\n\tv_writelane_b32 v34, s10, 6\n\tv_writelane_b32 v34, s11, 7\n\tv_writelane_b32 v34, s8, 8\n\tv_writelane_b32 v34, s9, 9\n\tv_writelane_b32 v34, s4, 10\n\tv_writelane_b32 v34, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[3:4], s33 offset:44 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b64 off, v[3:4], s33 offset:36 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\tv_cmp_eq_u32_e64 s0, v2, s0\n\tv_mov_b32_e32 v4, v6\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v2, v4, s1\n\tv_mov_b32_e32 v3, v5\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v5, v3, s1\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v2, v6\n\tv_cndmask_b32_e64 v4, v2, v4, s0\n\tv_mov_b32_e32 v2, v5\n\tv_cndmask_b32_e64 v2, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:28 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s0, v[0:1], s[0:1]\n ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr7\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tv_mov_b32_e32 v2, s6\n\tv_mov_b32_e32 v3, s7\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_3\n\ts_branch .LBB6_2\n.LBB6_1:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v34, 2\n\tv_readlane_b32 s14, v34, 3\n\tv_readlane_b32 s13, v34, 4\n\tv_readlane_b32 s12, v34, 5\n\tv_readlane_b32 s10, v34, 6\n\tv_readlane_b32 s11, v34, 7\n\tv_readlane_b32 s8, v34, 8\n\tv_readlane_b32 s9, v34, 9\n\tv_readlane_b32 s6, v34, 0\n\tv_readlane_b32 s7, v34, 1\n\tv_readlane_b32 s4, v34, 10\n\tv_readlane_b32 s5, v34, 11\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v3\n\tv_and_b32_e64 v4, v0, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v1\n\ts_mov_b64 s[0:1], 32\n\ts_mov_b32 s2, s1\n\tv_or_b32_e64 v4, v4, s2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_or_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v16, 0\n\tscratch_store_b32 off, v16, s33 offset:88 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_mov_b32_e32 v6, v1\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v4, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v2, v5\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_branch .LBB6_63\n.LBB6_2:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b64 v[4:5], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b64 s[0:1], 2\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v8, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v2, v0, s0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v8\n\tscratch_store_b64 off, v[2:3], s33 offset:124 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], -3\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v2, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v10, v1\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\ts_mov_b64 s[2:3], 0\n\ts_mov_b32 s0, s3\n\ts_mov_b32 s1, s2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v9, s1\n\tv_mov_b32_e32 v8, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v2, v9\n\tv_mov_b32_e32 v3, v8\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v34, s0, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:92 ; 16-byte Folded Spill\n\ts_branch .LBB6_4\n.LBB6_3:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b128 v[0:3], off, s33 offset:12 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 14\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_63\n\ts_branch .LBB6_1\n.LBB6_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_group_id\n\t.type\t__ockl_get_group_id,@function\n__ockl_get_group_id: ; @__ockl_get_group_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s14, 0\n\tv_writelane_b32 v2, s13, 1\n\tv_writelane_b32 v2, s12, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n; %bb.1:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n\ts_branch .LBB10_9\n.LBB10_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 6\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 7\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_12\n; %bb.6:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB10_12\n.LBB10_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 8\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_11\n; %bb.8:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB10_11\n.LBB10_9:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n.LBB10_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB10_7\n.LBB10_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB10_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_group_id, .Lfunc_end10-__ockl_get_group_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 988\n; NumSgprs: 33\n; NumVgprs: 3\n; ScratchSize: 40\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_size\n\t.type\t__ockl_get_local_size,@function\n__ockl_get_local_size: ; @__ockl_get_local_size\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s32 offset:104 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr4 : SGPR spill to VGPR lane\n\tv_writelane_b32 v4, s14, 0\n\tv_writelane_b32 v4, s13, 1\n\tv_writelane_b32 v4, s12, 2\n\tv_writelane_b32 v4, s8, 3\n\tv_writelane_b32 v4, s9, 4\n\tv_writelane_b32 v4, s4, 5\n\tv_writelane_b32 v4, s5, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_10\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_20\n\ts_branch .LBB11_15\n.LBB11_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 7\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 10\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 11\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_24\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 12\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_9\n.LBB11_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 12\n\tscratch_load_b64 v[0:1], off, s32 offset:48 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_23\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 2\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_load_b32 s0, s[2:3], 0xc\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_branch .LBB11_23\n.LBB11_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 2\n\ts_load_b32 s3, s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 18\n\ts_mov_b32 s2, 12\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_7\n.LBB11_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 8\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_22\n; %bb.11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_14\n.LBB11_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 14\n\tscratch_load_b64 v[0:1], off, s32 offset:72 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_21\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 1\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_load_b32 s0, s[2:3], 0x10\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_branch .LBB11_21\n.LBB11_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 1\n\ts_load_b32 s3, s[0:1], 0x4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 20\n\ts_mov_b32 s2, 14\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_12\n.LBB11_15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 15\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB11_18\n.LBB11_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 15\n\tscratch_load_b64 v[0:1], off, s32 offset:88 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB11_19\n; %bb.17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 0\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_load_b32 s0, s[2:3], 0x14\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_branch .LBB11_19\n.LBB11_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 0\n\ts_load_b32 s3, s[0:1], 0x8\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 22\n\ts_mov_b32 s2, 16\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 15\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB11_16\n.LBB11_19:\n\tscratch_load_b64 v[0:1], off, s32 offset:96 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n.LBB11_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 9\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:24 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_branch .LBB11_10\n.LBB11_21:\n\tscratch_load_b64 v[0:1], off, s32 offset:80 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n.LBB11_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:64 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_branch .LBB11_4\n.LBB11_23:\n\tscratch_load_b64 v[0:1], off, s32 offset:56 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n.LBB11_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:40 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n.LBB11_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[2:3], off, s32 offset:32 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s32 offset:104 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end11:\n\t.size\t__ockl_get_local_size, .Lfunc_end11-__ockl_get_local_size\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2384\n; NumSgprs: 35\n; NumVgprs: 5\n; ScratchSize: 112\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_10\n\ts_branch .LBB12_9\n.LBB12_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB12_12\n.LBB12_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB12_11\n.LBB12_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB12_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB12_7\n.LBB12_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB12_4\n.LBB12_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB12_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end12:\n\t.size\t__ockl_get_local_id, .Lfunc_end12-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.section\t.text._Z15homomorphic_addii,\"axG\",@progbits,_Z15homomorphic_addii,comdat\n\t.hidden\t_Z15homomorphic_addii ; -- Begin function _Z15homomorphic_addii\n\t.weak\t_Z15homomorphic_addii\n\t.p2align\t2\n\t.type\t_Z15homomorphic_addii,@function\n_Z15homomorphic_addii: ; @_Z15homomorphic_addii\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s4, s0\n\ts_add_i32 s0, s32, 4\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s4\n\ts_add_i32 s1, s32, 8\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v3\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v0, v0, v1\n\ts_setpc_b64 s[30:31]\n.Lfunc_end13:\n\t.size\t_Z15homomorphic_addii, .Lfunc_end13-_Z15homomorphic_addii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 132\n; NumSgprs: 33\n; NumVgprs: 4\n; ScratchSize: 16\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z26homomorphic_encrypt_kernelPiS_i ; -- Begin function _Z26homomorphic_encrypt_kernelPiS_i\n\t.globl\t_Z26homomorphic_encrypt_kernelPiS_i\n\t.p2align\t8\n\t.type\t_Z26homomorphic_encrypt_kernelPiS_i,@function\n_Z26homomorphic_encrypt_kernelPiS_i: ; @_Z26homomorphic_encrypt_kernelPiS_i\n; %bb.0:\n\ts_mov_b32 s32, 0x60\n ; implicit-def: $vgpr40 : SGPR spill to VGPR lane\n\tv_writelane_b32 v40, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v40, 0\n\tv_writelane_b32 v40, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v40, 1\n\tv_writelane_b32 v40, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v40, s10, 3\n\tv_writelane_b32 v40, s11, 4\n\tv_writelane_b32 v40, s2, 5\n\tv_writelane_b32 v40, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tv_writelane_b32 v40, s4, 7\n\tv_writelane_b32 v40, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:88 ; 4-byte Folded Spill\n\ts_load_b64 s[24:25], s[0:1], 0x0\n\ts_load_b64 s[20:21], s[0:1], 0x8\n\ts_load_b32 s2, s[0:1], 0x10\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s22, 32\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s18, 40\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b32 s16, 48\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v40, s6, 9\n\tv_writelane_b32 v40, s7, 10\n\ts_mov_b32 s8, 56\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v40, s6, 11\n\tv_writelane_b32 v40, s7, 12\n\ts_mov_b32 s6, 64\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\tv_writelane_b32 v40, s6, 13\n\tv_writelane_b32 v40, s7, 14\n\ts_mov_b32 s26, 0x44\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v40, s26, 15\n\tv_writelane_b32 v40, s27, 16\n\tv_writelane_b32 v40, s26, 17\n\tv_writelane_b32 v40, s27, 18\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v40, s8, 19\n\tv_writelane_b32 v40, s9, 20\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, off offset:84 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:88 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s8, v40, 19\n\tv_readlane_b32 s9, v40, 20\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:84 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:92 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v1, off offset:76 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:88 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s8, v40, 19\n\tv_readlane_b32 s9, v40, 20\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:84 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:80 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:80 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:76 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v40, 15\n\tv_readlane_b32 s3, v40, 16\n\tv_readlane_b32 s0, v40, 13\n\tv_readlane_b32 s1, v40, 14\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr5\n\tv_mov_b32_e32 v0, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[0:1], s4, v2, v3, v[4:5]\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v40, s0, 21\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v40, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB14_2\n; %bb.1:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v40, 17\n\tv_readlane_b32 s3, v40, 18\n\tv_readlane_b32 s14, v40, 0\n\tv_readlane_b32 s13, v40, 1\n\tv_readlane_b32 s12, v40, 2\n\tv_readlane_b32 s10, v40, 3\n\tv_readlane_b32 s11, v40, 4\n\tv_readlane_b32 s4, v40, 7\n\tv_readlane_b32 s5, v40, 8\n\tv_readlane_b32 s0, v40, 5\n\tv_readlane_b32 s1, v40, 6\n\tv_readlane_b32 s6, v40, 9\n\tv_readlane_b32 s7, v40, 10\n\tscratch_load_b32 v31, off, off offset:88 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s2, 2\n\tv_writelane_b32 v40, s2, 22\n\ts_or_saveexec_b32 s33, -1\n\tscratch_store_b32 off, v40, off offset:72 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s33\n\tv_lshlrev_b64 v[4:5], s2, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s2, v0, v3\n\tv_add_co_ci_u32_e64 v2, s2, v1, v2, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, _Z15homomorphic_addii@rel32@lo+4\n\ts_addc_u32 s1, s1, _Z15homomorphic_addii@rel32@hi+12\n\tv_mov_b32_e32 v1, 1\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s4, v40, 11\n\tv_readlane_b32 s5, v40, 12\n\tv_readlane_b32 s2, v40, 17\n\tv_readlane_b32 s3, v40, 18\n\tv_readlane_b32 s0, v40, 22\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[7:8], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tv_lshlrev_b64 v[5:6], s0, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s0, v0, v4\n\tv_add_co_ci_u32_e64 v3, s0, v1, v3, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n.LBB14_2:\n\ts_or_saveexec_b32 s33, -1\n\tscratch_load_b32 v40, off, off offset:72 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s33\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v40, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z26homomorphic_encrypt_kernelPiS_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 208\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 1\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 41\n\t\t.amdhsa_next_free_sgpr 34\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end14:\n\t.size\t_Z26homomorphic_encrypt_kernelPiS_i, .Lfunc_end14-_Z26homomorphic_encrypt_kernelPiS_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1524\n; NumSgprs: 36\n; NumVgprs: 41\n; ScratchSize: 208\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 5\n; NumSGPRsForWavesPerEU: 36\n; NumVGPRsForWavesPerEU: 41\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tblockIdx\n\t.protected\tblockDim\n\t.protected\tthreadIdx\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tblockIdx\n\t.weak\tblockDim\n\t.weak\tthreadIdx\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 104\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 112\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 120\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 128\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 224\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z26homomorphic_encrypt_kernelPiS_i\n .private_segment_fixed_size: 208\n .sgpr_count: 36\n .sgpr_spill_count: 23\n .symbol: _Z26homomorphic_encrypt_kernelPiS_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: true\n .vgpr_count: 41\n .vgpr_spill_count: 7\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":86,"cells":{"id":{"kind":"string","value":"29eb84f0bf29ce37d1dc6c7f694587fdb6556ee9_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18heatEquationKernelPfS_S_fi --------------------------\n .section .text._Z18heatEquationKernelPfS_S_fi,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=12\"\n .align 128\n\n\n\n\n .global _Z18heatEquationKernelPfS_S_fi\n .type _Z18heatEquationKernelPfS_S_fi,@function\n .size _Z18heatEquationKernelPfS_S_fi,(.L_x_3 - _Z18heatEquationKernelPfS_S_fi)\n .other _Z18heatEquationKernelPfS_S_fi,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18heatEquationKernelPfS_S_fi:\n.text._Z18heatEquationKernelPfS_S_fi:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R0, SR_CTAID.X ;\n /*0020*/ MOV R3, 0x4 ;\n /*0030*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0040*/ BSSY B0, `(.L_x_0) ;\n /*0050*/ S2R R8, SR_TID.X ;\n /*0060*/ IMAD R0, R0, c[0x0][0x0], R8 ;\n /*0070*/ IMAD.SHL.U32 R4, R8, 0x4, RZ ;\n /*0080*/ IMAD.WIDE R2, R0.reuse, R3, c[0x0][0x168] ;\n /*0090*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x17c], PT ;\n /*00a0*/ SHF.R.S32.HI R9, RZ, 0x1f, R0 ;\n /*00b0*/ @P0 BRA `(.L_x_1) ;\n /*00c0*/ MOV R7, c[0x0][0x0] ;\n /*00d0*/ IADD3 R5, R7, -0x1, RZ ;\n /*00e0*/ ISETP.GE.U32.AND P0, PT, R8, R5, PT ;\n /*00f0*/ LDG.E R5, [R2.64] ;\n /*0100*/ @!P0 LDG.E R6, [R2.64+0x4] ;\n /*0110*/ @!P0 IMAD R7, R7, 0x4, R4 ;\n /*0120*/ STS [R8.X4], R5 ;\n /*0130*/ @!P0 STS [R7], R6 ;\n.L_x_1:\n /*0140*/ BSYNC B0 ;\n.L_x_0:\n /*0150*/ ULDC UR4, c[0x0][0x17c] ;\n /*0160*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0170*/ UIADD3 UR4, UR4, -0x1, URZ ;\n /*0180*/ ISETP.GE.AND P0, PT, R0, UR4, PT ;\n /*0190*/ ISETP.LT.OR P0, PT, R0, 0x1, P0 ;\n /*01a0*/ @P0 EXIT ;\n /*01b0*/ LDG.E R2, [R2.64] ;\n /*01c0*/ LDS R4, [R8.X4] ;\n /*01d0*/ LDS R5, [R8.X4+0x4] ;\n /*01e0*/ LDS R7, [R8.X4+-0x4] ;\n /*01f0*/ FADD R4, R4, R4 ;\n /*0200*/ FADD R4, R5, -R4 ;\n /*0210*/ FADD R7, R4, R7 ;\n /*0220*/ LEA R4, P0, R0, c[0x0][0x160], 0x2 ;\n /*0230*/ LEA.HI.X R5, R0, c[0x0][0x164], R9, 0x2, P0 ;\n /*0240*/ FFMA R7, R7, c[0x0][0x178], R2 ;\n /*0250*/ STG.E [R4.64], R7 ;\n /*0260*/ EXIT ;\n.L_x_2:\n /*0270*/ BRA `(.L_x_2);\n /*0280*/ NOP;\n /*0290*/ NOP;\n /*02a0*/ NOP;\n /*02b0*/ NOP;\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n.L_x_3:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_060762.hip\"\n\t.globl\t_Z33__device_stub__heatEquationKernelPfS_S_fi # -- Begin function _Z33__device_stub__heatEquationKernelPfS_S_fi\n\t.p2align\t4, 0x90\n\t.type\t_Z33__device_stub__heatEquationKernelPfS_S_fi,@function\n_Z33__device_stub__heatEquationKernelPfS_S_fi: # @_Z33__device_stub__heatEquationKernelPfS_S_fi\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovq\t%rdx, 56(%rsp)\n\tmovss\t%xmm0, 4(%rsp)\n\tmovl\t%ecx, (%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t4(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tmovq\t%rsp, %rax\n\tmovq\t%rax, 112(%rsp)\n\tleaq\t40(%rsp), %rdi\n\tleaq\t24(%rsp), %rsi\n\tleaq\t16(%rsp), %rdx\n\tleaq\t8(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t40(%rsp), %rsi\n\tmovl\t48(%rsp), %edx\n\tmovq\t24(%rsp), %rcx\n\tmovl\t32(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z18heatEquationKernelPfS_S_fi, %edi\n\tpushq\t8(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t24(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z33__device_stub__heatEquationKernelPfS_S_fi, .Lfunc_end0-_Z33__device_stub__heatEquationKernelPfS_S_fi\n\t.cfi_endproc\n # -- End function\n\t.section\t.rodata.cst4,\"aM\",@progbits,4\n\t.p2align\t2, 0x0 # -- Begin function main\n.LCPI1_0:\n\t.long\t0x3a83126f # float 0.00100000005\n\t.text\n\t.globl\tmain\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 32\n\tpushq\t%r13\n\t.cfi_def_cfa_offset 40\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 48\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 56\n\tsubq\t$24, %rsp\n\t.cfi_def_cfa_offset 80\n\t.cfi_offset %rbx, -56\n\t.cfi_offset %r12, -48\n\t.cfi_offset %r13, -40\n\t.cfi_offset %r14, -32\n\t.cfi_offset %r15, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t$1, %edi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\tcalloc@PLT\n\tmovq\t%rax, %rbx\n\tmovl\t$8192, %edi # imm = 0x2000\n\tcallq\tmalloc\n\tmovq\t%rax, %r14\n\tmovl\t$1065353216, 4096(%rbx) # imm = 0x3F800000\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_4\n# %bb.1:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n\tmovl\t$44, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_40\n# %bb.2:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_8\n# %bb.3:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_9\n.LBB1_4:\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_10\n# %bb.5:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$44, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_40\n# %bb.6:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_14\n# %bb.7:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_15\n.LBB1_8:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_9:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tjmp\t.LBB1_31\n.LBB1_10:\n\tmovq\t8(%rsp), %rdi\n\tmovl\t$8192, %edx # imm = 0x2000\n\tmovq\t%rbx, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_16\n# %bb.11:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tmovl\t$51, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_40\n# %bb.12:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_27\n.LBB1_13:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_28\n.LBB1_14:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_15:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t8(%rsp), %rdi\n\tjmp\t.LBB1_30\n.LBB1_16:\n\tmovabsq\t$4294967312, %rdx # imm = 0x100000010\n\tleaq\t112(%rdx), %rdi\n\tmovl\t$72, %r8d\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_18\n# %bb.17:\n\tmovq\t16(%rsp), %rdi\n\tmovq\t8(%rsp), %rsi\n\tmovss\t.LCPI1_0(%rip), %xmm0 # xmm0 = mem[0],zero,zero,zero\n\txorl\t%edx, %edx\n\tmovl\t$2048, %ecx # imm = 0x800\n\tcallq\t_Z33__device_stub__heatEquationKernelPfS_S_fi\n.LBB1_18:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_21\n# %bb.19:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tmovl\t$22, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_23\n# %bb.20:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_24\n.LBB1_21:\n\tmovq\t16(%rsp), %rsi\n\tmovl\t$8192, %edx # imm = 0x2000\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_33\n# %bb.22:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$51, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_29\n.LBB1_23:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_24:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_40\n# %bb.25:\n\tcmpb\t$0, 56(%rbx)\n\tjne\t.LBB1_13\n.LBB1_27:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_28:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n.LBB1_29:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n.LBB1_30:\n\tcallq\thipFree\n.LBB1_31:\n\tmovl\t$-1, %eax\n.LBB1_32:\n\taddq\t$24, %rsp\n\t.cfi_def_cfa_offset 56\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 48\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 40\n\tpopq\t%r13\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_33:\n\t.cfi_def_cfa_offset 80\n\txorl\t%r15d, %r15d\n\tjmp\t.LBB1_36\n.LBB1_34: # in Loop: Header=BB1_36 Depth=1\n\tmovq\t%r12, %rdi\n\tmovq\t%rax, %r13\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%r12), %rax\n\tmovq\t%r12, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n\tmovl\t%eax, %ecx\n\tmovq\t%r13, %rax\n.LBB1_35: # in Loop: Header=BB1_36 Depth=1\n\tmovsbl\t%cl, %esi\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tincq\t%r15\n\tcmpq\t$10, %r15\n\tje\t.LBB1_39\n.LBB1_36: # =>This Inner Loop Header: Depth=1\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$6, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t%r15d, %esi\n\tcallq\t_ZNSolsEi\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$4, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovss\t(%r14,%r15,4), %xmm0 # xmm0 = mem[0],zero,zero,zero\n\tcvtss2sd\t%xmm0, %xmm0\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo9_M_insertIdEERSoT_\n\tmovq\t(%rax), %rcx\n\tmovq\t-24(%rcx), %rcx\n\tmovq\t240(%rax,%rcx), %r12\n\ttestq\t%r12, %r12\n\tje\t.LBB1_40\n# %bb.37: # in Loop: Header=BB1_36 Depth=1\n\tcmpb\t$0, 56(%r12)\n\tje\t.LBB1_34\n# %bb.38: # in Loop: Header=BB1_36 Depth=1\n\tmovzbl\t67(%r12), %ecx\n\tjmp\t.LBB1_35\n.LBB1_39:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t%rbx, %rdi\n\tcallq\tfree\n\tmovq\t%r14, %rdi\n\tcallq\tfree\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_32\n.LBB1_40:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_060762.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_060762.hip,@function\n_GLOBAL__sub_I_cuda_code_060762.hip: # @_GLOBAL__sub_I_cuda_code_060762.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_060762.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_060762.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z18heatEquationKernelPfS_S_fi, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z18heatEquationKernelPfS_S_fi,@object # @_Z18heatEquationKernelPfS_S_fi\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z18heatEquationKernelPfS_S_fi\n\t.p2align\t3, 0x0\n_Z18heatEquationKernelPfS_S_fi:\n\t.quad\t_Z33__device_stub__heatEquationKernelPfS_S_fi\n\t.size\t_Z18heatEquationKernelPfS_S_fi, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate device memory for d_u_old\"\n\t.size\t.L.str, 45\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate device memory for d_u_new\"\n\t.size\t.L.str.1, 45\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to copy data from host to device for d_u_old\"\n\t.size\t.L.str.2, 52\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.3, 23\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Failed to copy data from device to host for d_u_new\"\n\t.size\t.L.str.4, 52\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"u_new[\"\n\t.size\t.L.str.5, 7\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\"] = \"\n\t.size\t.L.str.6, 5\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z18heatEquationKernelPfS_S_fi\"\n\t.size\t.L__unnamed_1, 31\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_060762.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":87,"cells":{"id":{"kind":"string","value":"a20ef370ddc399efec92815c94a85fa5d02afd65_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_ --------------------------\n .section .text._Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=35\"\n .align 128\n\n\n\n\n .global _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n .type _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,@function\n .size _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,(.L_x_23 - _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_)\n .other _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_:\n.text._Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R16, c[0x0][0x118] ;\n /*0020*/ MOV R17, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R0, R2 ;\n /*0060*/ MOV R2, R3 ;\n /*0070*/ MOV R3, R0 ;\n /*0080*/ MOV R0, R2 ;\n /*0090*/ MOV R4, 0x8 ;\n /*00a0*/ LDC.64 R4, c[0x0][R4+0x160] ;\n /*00b0*/ MOV R2, R4 ;\n /*00c0*/ MOV R5, R5 ;\n /*00d0*/ MOV R4, R2 ;\n /*00e0*/ MOV R2, R5 ;\n /*00f0*/ MOV R6, 0x10 ;\n /*0100*/ LDC.64 R6, c[0x0][R6+0x160] ;\n /*0110*/ MOV R5, R6 ;\n /*0120*/ MOV R7, R7 ;\n /*0130*/ MOV R6, R5 ;\n /*0140*/ MOV R5, R7 ;\n /*0150*/ MOV R8, 0x18 ;\n /*0160*/ LDC.64 R8, c[0x0][R8+0x160] ;\n /*0170*/ MOV R7, R8 ;\n /*0180*/ MOV R9, R9 ;\n /*0190*/ MOV R8, R7 ;\n /*01a0*/ MOV R7, R9 ;\n /*01b0*/ MOV R10, 0x20 ;\n /*01c0*/ LDC.64 R10, c[0x0][R10+0x160] ;\n /*01d0*/ MOV R9, R10 ;\n /*01e0*/ MOV R11, R11 ;\n /*01f0*/ MOV R10, R9 ;\n /*0200*/ MOV R9, R11 ;\n /*0210*/ MOV R11, 0x28 ;\n /*0220*/ LDC R11, c[0x0][R11+0x160] ;\n /*0230*/ MOV R11, R11 ;\n /*0240*/ MOV R12, 0x2c ;\n /*0250*/ LDC R12, c[0x0][R12+0x160] ;\n /*0260*/ MOV R12, R12 ;\n /*0270*/ MOV R13, 0x34 ;\n /*0280*/ LDC R13, c[0x0][R13+0x160] ;\n /*0290*/ MOV R13, R13 ;\n /*02a0*/ MOV R14, 0x38 ;\n /*02b0*/ LDC.64 R14, c[0x0][R14+0x160] ;\n /*02c0*/ MOV R18, R14 ;\n /*02d0*/ MOV R15, R15 ;\n /*02e0*/ MOV R14, R18 ;\n /*02f0*/ MOV R15, R15 ;\n /*0300*/ S2R R21, SR_CTAID.X ;\n /*0310*/ MOV R21, R21 ;\n /*0320*/ MOV R18, c[0x0][0x0] ;\n /*0330*/ S2R R19, SR_TID.X ;\n /*0340*/ MOV R19, R19 ;\n /*0350*/ IMAD R21, R21, R18, R19 ;\n /*0360*/ MOV R18, c[0x0][0x4] ;\n /*0370*/ S2R R19, SR_CTAID.Y ;\n /*0380*/ MOV R19, R19 ;\n /*0390*/ S2R R20, SR_TID.Y ;\n /*03a0*/ MOV R20, R20 ;\n /*03b0*/ IMAD R22, R19, R18, R20 ;\n /*03c0*/ ISETP.GE.AND P0, PT, R21, R12, PT ;\n /*03d0*/ ISETP.GE.AND P1, PT, R22, R13, PT ;\n /*03e0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*03f0*/ MOV R3, R3 ;\n /*0400*/ MOV R20, R0 ;\n /*0410*/ MOV R18, R4 ;\n /*0420*/ MOV R19, R2 ;\n /*0430*/ MOV R0, R6 ;\n /*0440*/ MOV R4, R5 ;\n /*0450*/ MOV R5, R8 ;\n /*0460*/ MOV R6, R7 ;\n /*0470*/ MOV R7, R10 ;\n /*0480*/ MOV R8, R9 ;\n /*0490*/ MOV R9, R11 ;\n /*04a0*/ MOV R10, R12 ;\n /*04b0*/ MOV R11, R13 ;\n /*04c0*/ MOV R12, R14 ;\n /*04d0*/ MOV R15, R15 ;\n /*04e0*/ MOV R14, R21 ;\n /*04f0*/ MOV R13, R22 ;\n /*0500*/ @P0 BRA `(.L_x_0) ;\n /*0510*/ S2R R21, SR_TID.Z ;\n /*0520*/ MOV R21, R21 ;\n /*0530*/ S2R R2, SR_CTAID.Z ;\n /*0540*/ MOV R2, R2 ;\n /*0550*/ MOV R22, c[0x0][0x8] ;\n /*0560*/ IMAD R21, R2, R22, R21 ;\n /*0570*/ MOV R22, R3 ;\n /*0580*/ MOV R23, R20 ;\n /*0590*/ IMAD R20, R21, R10, RZ ;\n /*05a0*/ IADD3 R2, R20, R14, RZ ;\n /*05b0*/ IMAD.WIDE R2, R2, 0x4, RZ ;\n /*05c0*/ MOV R24, R2 ;\n /*05d0*/ MOV R25, R3 ;\n /*05e0*/ IADD3 R24, P0, R22, R24, RZ ;\n /*05f0*/ IADD3.X R25, R23, R25, RZ, P0, !PT ;\n /*0600*/ MOV R18, R18 ;\n /*0610*/ MOV R19, R19 ;\n /*0620*/ IMAD.WIDE R2, R14, 0x4, RZ ;\n /*0630*/ MOV R22, R2 ;\n /*0640*/ MOV R23, R3 ;\n /*0650*/ IADD3 R2, P0, R18, R22, RZ ;\n /*0660*/ IADD3.X R3, R19, R23, RZ, P0, !PT ;\n /*0670*/ MOV R2, R2 ;\n /*0680*/ MOV R3, R3 ;\n /*0690*/ MOV R2, R2 ;\n /*06a0*/ MOV R3, R3 ;\n /*06b0*/ R2UR UR4, R16 ;\n /*06c0*/ R2UR UR5, R17 ;\n /*06d0*/ LDG.E R18, [R2.64] ;\n /*06e0*/ MOV R2, R24 ;\n /*06f0*/ MOV R3, R25 ;\n /*0700*/ MOV R2, R2 ;\n /*0710*/ MOV R3, R3 ;\n /*0720*/ R2UR UR4, R16 ;\n /*0730*/ R2UR UR5, R17 ;\n /*0740*/ LDG.E R2, [R2.64] ;\n /*0750*/ MOV R2, R2 ;\n /*0760*/ MOV R3, R18 ;\n /*0770*/ MOV R2, R2 ;\n /*0780*/ MOV R25, R3 ;\n /*0790*/ MOV R3, R3 ;\n /*07a0*/ MUFU.RCP R18, R3 ;\n /*07b0*/ FADD R19, -RZ, -R3 ;\n /*07c0*/ MOV R19, R19 ;\n /*07d0*/ MOV R24, 0x3f800000 ;\n /*07e0*/ FFMA R24, R19, R18, R24 ;\n /*07f0*/ FCHK P0, R2, R25 ;\n /*0800*/ FFMA R24, R18, R24, R18 ;\n /*0810*/ MOV R18, RZ ;\n /*0820*/ MOV R2, R2 ;\n /*0830*/ FFMA R18, R2, R24, R18 ;\n /*0840*/ FFMA R19, R19, R18, R2 ;\n /*0850*/ FFMA R19, R19, R24, R18 ;\n /*0860*/ MOV R24, R19 ;\n /*0870*/ MOV R18, R21 ;\n /*0880*/ MOV R19, R20 ;\n /*0890*/ MOV R20, R22 ;\n /*08a0*/ MOV R21, R23 ;\n /*08b0*/ MOV R2, R2 ;\n /*08c0*/ MOV R3, R3 ;\n /*08d0*/ MOV R24, R24 ;\n /*08e0*/ BSSY B0, `(.L_x_1) ;\n /*08f0*/ @P0 BRA `(.L_x_2) ;\n /*0900*/ BRA `(.L_x_3) ;\n.L_x_2:\n /*0910*/ MOV R2, R2 ;\n /*0920*/ MOV R3, R3 ;\n /*0930*/ MOV R24, R2 ;\n /*0940*/ MOV R3, R3 ;\n /*0950*/ MOV R2, 0x970 ;\n /*0960*/ CALL.REL.NOINC `($__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath) ;\n /*0970*/ MOV R2, R22 ;\n /*0980*/ MOV R2, R2 ;\n /*0990*/ MOV R24, R2 ;\n.L_x_3:\n /*09a0*/ BSYNC B0 ;\n.L_x_1:\n /*09b0*/ MOV R2, R24 ;\n /*09c0*/ IMAD R18, R18, 0x3, RZ ;\n /*09d0*/ IMAD R18, R18, R11, R13 ;\n /*09e0*/ MOV R24, R0 ;\n /*09f0*/ MOV R4, R4 ;\n /*0a00*/ IMAD.WIDE R22, R18, 0x4, RZ ;\n /*0a10*/ MOV R0, R22 ;\n /*0a20*/ MOV R3, R23 ;\n /*0a30*/ IADD3 R22, P0, R24, R0, RZ ;\n /*0a40*/ IADD3.X R23, R4, R3, RZ, P0, !PT ;\n /*0a50*/ MOV R22, R22 ;\n /*0a60*/ MOV R23, R23 ;\n /*0a70*/ MOV R22, R22 ;\n /*0a80*/ MOV R23, R23 ;\n /*0a90*/ R2UR UR4, R16 ;\n /*0aa0*/ R2UR UR5, R17 ;\n /*0ab0*/ LDG.E R22, [R22.64] ;\n /*0ac0*/ FMUL R9, R22, R9 ;\n /*0ad0*/ MOV R5, R5 ;\n /*0ae0*/ MOV R6, R6 ;\n /*0af0*/ IADD3 R20, P0, R5, R20, RZ ;\n /*0b00*/ IADD3.X R21, R6, R21, RZ, P0, !PT ;\n /*0b10*/ MOV R4, R7 ;\n /*0b20*/ MOV R5, R8 ;\n /*0b30*/ IADD3 R4, P0, R4, R0, RZ ;\n /*0b40*/ IADD3.X R5, R5, R3, RZ, P0, !PT ;\n /*0b50*/ MOV R4, R4 ;\n /*0b60*/ MOV R5, R5 ;\n /*0b70*/ MOV R4, R4 ;\n /*0b80*/ MOV R5, R5 ;\n /*0b90*/ R2UR UR4, R16 ;\n /*0ba0*/ R2UR UR5, R17 ;\n /*0bb0*/ LDG.E R0, [R4.64] ;\n /*0bc0*/ MOV R4, R20 ;\n /*0bd0*/ MOV R5, R21 ;\n /*0be0*/ MOV R4, R4 ;\n /*0bf0*/ MOV R5, R5 ;\n /*0c00*/ R2UR UR4, R16 ;\n /*0c10*/ R2UR UR5, R17 ;\n /*0c20*/ LDG.E R4, [R4.64] ;\n /*0c30*/ FMUL R0, R4, R0 ;\n /*0c40*/ FADD R0, R9, -R0 ;\n /*0c50*/ FMUL R0, R2, R0 ;\n /*0c60*/ IMAD R10, R13, R10, R14 ;\n /*0c70*/ IMAD R2, R19, R11, R10 ;\n /*0c80*/ MOV R12, R12 ;\n /*0c90*/ MOV R15, R15 ;\n /*0ca0*/ IMAD.WIDE R2, R2, 0x4, RZ ;\n /*0cb0*/ MOV R4, R2 ;\n /*0cc0*/ MOV R3, R3 ;\n /*0cd0*/ IADD3 R2, P0, R12, R4, RZ ;\n /*0ce0*/ IADD3.X R3, R15, R3, RZ, P0, !PT ;\n /*0cf0*/ MOV R2, R2 ;\n /*0d00*/ MOV R3, R3 ;\n /*0d10*/ MOV R2, R2 ;\n /*0d20*/ MOV R3, R3 ;\n /*0d30*/ R2UR UR4, R16 ;\n /*0d40*/ R2UR UR5, R17 ;\n /*0d50*/ STG.E [R2.64], R0 ;\n.L_x_0:\n /*0d60*/ EXIT ;\n\n\n\n\n .weak $__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath\n .type $__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath,@function\n .size $__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath,(.L_x_23 - $__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath)\n$__internal_0_$__cuda_sm3x_div_rn_noftz_f32_slowpath:\n /*0d70*/ MOV R24, R24 ;\n /*0d80*/ MOV R23, R3 ;\n /*0d90*/ MOV R3, R24 ;\n /*0da0*/ MOV R22, R23 ;\n /*0db0*/ MOV R3, R3 ;\n /*0dc0*/ SHF.R.U32.HI R25, RZ, 0x17, R3 ;\n /*0dd0*/ LOP3.LUT R25, R25, 0xff, RZ, 0xc0, !PT ;\n /*0de0*/ IADD3 R27, R25, -0x1, RZ ;\n /*0df0*/ MOV R26, R22 ;\n /*0e00*/ SHF.R.U32.HI R22, RZ, 0x17, R26 ;\n /*0e10*/ LOP3.LUT R28, R22, 0xff, RZ, 0xc0, !PT ;\n /*0e20*/ IADD3 R29, R28, -0x1, RZ ;\n /*0e30*/ ISETP.GT.U32.AND P0, PT, R27, 0xfd, PT ;\n /*0e40*/ ISETP.GT.U32.AND P1, PT, R29, 0xfd, PT ;\n /*0e50*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*0e60*/ MOV R24, R24 ;\n /*0e70*/ MOV R23, R23 ;\n /*0e80*/ MOV R22, R3 ;\n /*0e90*/ MOV R25, R25 ;\n /*0ea0*/ MOV R27, R27 ;\n /*0eb0*/ MOV R26, R26 ;\n /*0ec0*/ MOV R3, R28 ;\n /*0ed0*/ MOV R28, R29 ;\n /*0ee0*/ BSSY B1, `(.L_x_4) ;\n /*0ef0*/ @P0 BRA `(.L_x_5) ;\n /*0f00*/ MOV R24, RZ ;\n /*0f10*/ MOV R24, R24 ;\n /*0f20*/ BRA `(.L_x_6) ;\n.L_x_5:\n /*0f30*/ MOV R24, R24 ;\n /*0f40*/ FADD.FTZ R29, -RZ, |R24| ;\n /*0f50*/ MOV R30, 0x7f800000 ;\n /*0f60*/ MOV R30, R30 ;\n /*0f70*/ FSETP.GTU.FTZ.AND P0, PT, R29, R30, PT ;\n /*0f80*/ MOV R29, R29 ;\n /*0f90*/ MOV R30, R30 ;\n /*0fa0*/ @P0 BRA `(.L_x_7) ;\n /*0fb0*/ MOV R23, R23 ;\n /*0fc0*/ FADD.FTZ R31, -RZ, |R23| ;\n /*0fd0*/ FSETP.GTU.FTZ.AND P0, PT, R31, R30, PT ;\n /*0fe0*/ MOV R31, R31 ;\n /*0ff0*/ @P0 BRA `(.L_x_7) ;\n /*1000*/ LOP3.LUT R32, R26, R22, RZ, 0xfc, !PT ;\n /*1010*/ LOP3.LUT R32, R32, 0x7fffffff, RZ, 0xc0, !PT ;\n /*1020*/ ISETP.EQ.AND P0, PT, R32, RZ, PT ;\n /*1030*/ @P0 BRA `(.L_x_8) ;\n /*1040*/ FSETP.EQ.FTZ.AND P0, PT, R29, R30, PT ;\n /*1050*/ FSETP.EQ.FTZ.AND P1, PT, R31, R30, PT ;\n /*1060*/ PLOP3.LUT P2, PT, P0, P1, PT, 0x80, 0x0 ;\n /*1070*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x80, 0x0 ;\n /*1080*/ PLOP3.LUT P1, PT, P1, PT, PT, 0x80, 0x0 ;\n /*1090*/ @P2 BRA `(.L_x_8) ;\n /*10a0*/ LOP3.LUT R29, R22, 0x7fffffff, RZ, 0xc0, !PT ;\n /*10b0*/ ISETP.EQ.AND P2, PT, R29, RZ, PT ;\n /*10c0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0xa8, 0x0 ;\n /*10d0*/ @P1 BRA `(.L_x_9) ;\n /*10e0*/ LOP3.LUT R29, R26, 0x7fffffff, RZ, 0xc0, !PT ;\n /*10f0*/ ISETP.EQ.AND P1, PT, R29, RZ, PT ;\n /*1100*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*1110*/ @P0 BRA `(.L_x_10) ;\n /*1120*/ ISETP.LT.AND P0, PT, R27, RZ, PT ;\n /*1130*/ BSSY B2, `(.L_x_11) ;\n /*1140*/ @P0 BRA `(.L_x_12) ;\n /*1150*/ MOV R24, RZ ;\n /*1160*/ MOV R24, R24 ;\n /*1170*/ BRA `(.L_x_13) ;\n.L_x_12:\n /*1180*/ MOV R22, RZ ;\n /*1190*/ MOV R27, 0x5f800000 ;\n /*11a0*/ MOV R24, R24 ;\n /*11b0*/ FFMA R22, R24, R27, R22 ;\n /*11c0*/ MOV R22, R22 ;\n /*11d0*/ MOV R24, 0xffffffc0 ;\n /*11e0*/ MOV R22, R22 ;\n /*11f0*/ MOV R24, R24 ;\n.L_x_13:\n /*1200*/ BSYNC B2 ;\n.L_x_11:\n /*1210*/ ISETP.LT.AND P0, PT, R28, RZ, PT ;\n /*1220*/ BSSY B2, `(.L_x_6) ;\n /*1230*/ @P0 BRA `(.L_x_14) ;\n /*1240*/ BRA `(.L_x_15) ;\n.L_x_14:\n /*1250*/ MOV R26, RZ ;\n /*1260*/ MOV R27, 0x5f800000 ;\n /*1270*/ MOV R23, R23 ;\n /*1280*/ FFMA R23, R23, R27, R26 ;\n /*1290*/ MOV R23, R23 ;\n /*12a0*/ IADD3 R24, R24, 0x40, RZ ;\n /*12b0*/ MOV R26, R23 ;\n /*12c0*/ MOV R24, R24 ;\n.L_x_15:\n /*12d0*/ BSYNC B2 ;\n.L_x_6:\n /*12e0*/ IADD3 R25, R25, -0x7f, RZ ;\n /*12f0*/ SHF.L.U32 R23, R25, 0x17, RZ ;\n /*1300*/ IADD3 R22, R22, -R23, RZ ;\n /*1310*/ MOV R22, R22 ;\n /*1320*/ SHF.L.U32 R23, R3, 0x17, RZ ;\n /*1330*/ IADD3 R23, R23, -0x3f800000, RZ ;\n /*1340*/ IADD3 R23, R26, -R23, RZ ;\n /*1350*/ MOV R23, R23 ;\n /*1360*/ MUFU.RCP R26, R23 ;\n /*1370*/ FADD.FTZ R27, -RZ, -R23 ;\n /*1380*/ MOV R23, 0x3f800000 ;\n /*1390*/ FFMA R23, R27, R26, R23 ;\n /*13a0*/ FFMA R23, R26, R23, R26 ;\n /*13b0*/ MOV R26, RZ ;\n /*13c0*/ FFMA R26, R22, R23, R26 ;\n /*13d0*/ FFMA R28, R27, R26, R22 ;\n /*13e0*/ FFMA R26, R28, R23, R26 ;\n /*13f0*/ FFMA R22, R27, R26, R22 ;\n /*1400*/ FFMA R27, R22, R23, R26 ;\n /*1410*/ MOV R27, R27 ;\n /*1420*/ SHF.R.U32.HI R28, RZ, 0x17, R27 ;\n /*1430*/ LOP3.LUT R28, R28, 0xff, RZ, 0xc0, !PT ;\n /*1440*/ MOV R29, 0x7f ;\n /*1450*/ IADD3 R29, R29, -R3, RZ ;\n /*1460*/ IADD3 R29, R29, R25, RZ ;\n /*1470*/ IADD3 R29, R29, R24, RZ ;\n /*1480*/ IADD3 R28, R29, R28, RZ ;\n /*1490*/ IADD3 R3, R28, -0x1, RZ ;\n /*14a0*/ ISETP.LT.U32.AND P0, PT, R3, 0xfe, PT ;\n /*14b0*/ MOV R23, R23 ;\n /*14c0*/ MOV R26, R26 ;\n /*14d0*/ MOV R24, R22 ;\n /*14e0*/ MOV R3, R27 ;\n /*14f0*/ MOV R29, R29 ;\n /*1500*/ MOV R22, R28 ;\n /*1510*/ BSSY B2, `(.L_x_16) ;\n /*1520*/ @P0 BRA `(.L_x_17) ;\n /*1530*/ ISETP.GT.AND P0, PT, R22, 0xfe, PT ;\n /*1540*/ @P0 BRA `(.L_x_18) ;\n /*1550*/ ISETP.LT.AND P0, PT, R22, 0x1, PT ;\n /*1560*/ @P0 BRA `(.L_x_19) ;\n /*1570*/ BRA `(.L_x_20) ;\n.L_x_19:\n /*1580*/ ISETP.LT.AND P0, PT, R22, -0x18, PT ;\n /*1590*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ;\n /*15a0*/ MOV R3, R3 ;\n /*15b0*/ @P0 BRA `(.L_x_20) ;\n /*15c0*/ FFMA.RP R25, R24, R23, R26 ;\n /*15d0*/ FFMA.RM R27, R24, R23, R26 ;\n /*15e0*/ FSETP.NEU.FTZ.AND P0, PT, R25, R27, PT ;\n /*15f0*/ FFMA.RZ R23, R24, R23, R26 ;\n /*1600*/ MOV R23, R23 ;\n /*1610*/ LOP3.LUT R23, R23, 0x7fffff, RZ, 0xc0, !PT ;\n /*1620*/ LOP3.LUT R23, R23, 0x800000, RZ, 0xfc, !PT ;\n /*1630*/ IADD3 R24, R22, 0x20, RZ ;\n /*1640*/ SHF.L.U32 R24, R23, R24, RZ ;\n /*1650*/ ISETP.NE.AND P1, PT, R24, RZ, PT ;\n /*1660*/ ISETP.EQ.AND P2, PT, R22, RZ, PT ;\n /*1670*/ IADD3 R24, RZ, -R22, RZ ;\n /*1680*/ MOV R24, R24 ;\n /*1690*/ MOV R24, R24 ;\n /*16a0*/ SEL R24, RZ, R24, P2 ;\n /*16b0*/ SHF.R.U32.HI R24, RZ, R24, R23 ;\n /*16c0*/ ISETP.NE.AND P2, PT, R22, RZ, PT ;\n /*16d0*/ PLOP3.LUT P1, PT, P1, P2, PT, 0x80, 0x0 ;\n /*16e0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*16f0*/ SEL R22, RZ, 0x1, !P0 ;\n /*1700*/ SHF.R.U32.HI R23, RZ, 0x1, R24 ;\n /*1710*/ LOP3.LUT R25, R23, 0x1, RZ, 0xc0, !PT ;\n /*1720*/ LOP3.LUT R22, R22, R25, RZ, 0xfc, !PT ;\n /*1730*/ LOP3.LUT R22, R22, R24, RZ, 0xc0, !PT ;\n /*1740*/ IADD3 R22, R22, R23, RZ ;\n /*1750*/ LOP3.LUT R3, R22, R3, RZ, 0xfc, !PT ;\n /*1760*/ MOV R3, R3 ;\n /*1770*/ BRA `(.L_x_20) ;\n.L_x_18:\n /*1780*/ LOP3.LUT R3, R3, 0x80000000, RZ, 0xc0, !PT ;\n /*1790*/ LOP3.LUT R3, R3, 0x7f800000, RZ, 0xfc, !PT ;\n /*17a0*/ MOV R3, R3 ;\n /*17b0*/ BRA `(.L_x_20) ;\n.L_x_17:\n /*17c0*/ SHF.L.U32 R29, R29, 0x17, RZ ;\n /*17d0*/ IADD3 R3, R29, R3, RZ ;\n /*17e0*/ MOV R3, R3 ;\n /*17f0*/ BRA `(.L_x_20) ;\n.L_x_20:\n /*1800*/ BSYNC B2 ;\n.L_x_16:\n /*1810*/ MOV R3, R3 ;\n /*1820*/ MOV R3, R3 ;\n /*1830*/ MOV R3, R3 ;\n /*1840*/ BRA `(.L_x_21) ;\n.L_x_10:\n /*1850*/ LOP3.LUT R22, R26, R22, RZ, 0x3c, !PT ;\n /*1860*/ LOP3.LUT R22, R22, 0x80000000, RZ, 0xc0, !PT ;\n /*1870*/ LOP3.LUT R22, R22, 0x7f800000, RZ, 0xfc, !PT ;\n /*1880*/ MOV R22, R22 ;\n /*1890*/ MOV R22, R22 ;\n /*18a0*/ MOV R3, R22 ;\n /*18b0*/ BRA `(.L_x_21) ;\n.L_x_9:\n /*18c0*/ LOP3.LUT R22, R26, R22, RZ, 0x3c, !PT ;\n /*18d0*/ LOP3.LUT R22, R22, 0x80000000, RZ, 0xc0, !PT ;\n /*18e0*/ MOV R22, R22 ;\n /*18f0*/ MOV R22, R22 ;\n /*1900*/ MOV R3, R22 ;\n /*1910*/ BRA `(.L_x_21) ;\n.L_x_8:\n /*1920*/ MOV R3, 0xffc00000 ;\n /*1930*/ MOV R3, R3 ;\n /*1940*/ MUFU.RSQ R3, R3 ;\n /*1950*/ MOV R3, R3 ;\n /*1960*/ MOV R3, R3 ;\n /*1970*/ BRA `(.L_x_21) ;\n.L_x_7:\n /*1980*/ MOV R24, R24 ;\n /*1990*/ MOV R23, R23 ;\n /*19a0*/ FADD.FTZ R23, R24, R23 ;\n /*19b0*/ MOV R23, R23 ;\n /*19c0*/ MOV R3, R23 ;\n /*19d0*/ BRA `(.L_x_21) ;\n.L_x_21:\n /*19e0*/ BSYNC B1 ;\n.L_x_4:\n /*19f0*/ MOV R22, R3 ;\n /*1a00*/ MOV R2, R2 ;\n /*1a10*/ MOV R3, 0x0 ;\n /*1a20*/ RET.REL.NODEC R2 `(_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_) ;\n.L_x_22:\n /*1a30*/ BRA `(.L_x_22);\n /*1a40*/ NOP;\n /*1a50*/ NOP;\n /*1a60*/ NOP;\n /*1a70*/ NOP;\n /*1a80*/ NOP;\n /*1a90*/ NOP;\n /*1aa0*/ NOP;\n /*1ab0*/ NOP;\n /*1ac0*/ NOP;\n /*1ad0*/ NOP;\n /*1ae0*/ NOP;\n /*1af0*/ NOP;\n.L_x_23:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_ ; -- Begin function _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n\t.globl\t_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n\t.p2align\t8\n\t.type\t_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,@function\n_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_: ; @_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n; %bb.0:\n\ts_clause 0x2\n\ts_load_b32 s2, s[0:1], 0x4c\n\ts_load_b32 s3, s[0:1], 0x2c\n\ts_load_b32 s12, s[0:1], 0x34\n\tv_and_b32_e32 v3, 0x3ff, v0\n\tv_bfe_u32 v5, v0, 10, 10\n\ts_add_u32 s4, s0, 64\n\ts_addc_u32 s5, s1, 0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s6, s2, 0xffff\n\ts_lshr_b32 s2, s2, 16\n\tv_mad_u64_u32 v[1:2], null, s13, s6, v[3:4]\n\tv_mad_u64_u32 v[3:4], null, s14, s2, v[5:6]\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cmp_gt_i32_e32 vcc_lo, s3, v1\n\tv_cmp_gt_i32_e64 s2, s12, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s2, vcc_lo, s2\n\ts_and_saveexec_b32 s6, s2\n\ts_cbranch_execz .LBB0_2\n; %bb.1:\n\ts_load_b32 s2, s[4:5], 0x10\n\tv_bfe_u32 v0, v0, 20, 10\n\ts_load_b256 s[4:11], s[0:1], 0x0\n\tv_ashrrev_i32_e32 v2, 31, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[7:8], 2, v[1:2]\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s2, s2, 0xffff\n\tv_add_co_u32 v9, vcc_lo, s6, v7\n\tv_mad_u64_u32 v[4:5], null, s15, s2, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s7, v8, vcc_lo\n\ts_mul_i32 s2, s12, 3\n\tv_mul_lo_u32 v0, v4, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v5, v0, v1\n\tv_mul_lo_u32 v0, v0, s12\n\tv_ashrrev_i32_e32 v6, 31, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[5:6], 2, v[5:6]\n\tv_add_co_u32 v5, vcc_lo, s4, v5\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s5, v6, vcc_lo\n\ts_load_b64 s[4:5], s[0:1], 0x20\n\tglobal_load_b32 v2, v[9:10], off\n\tglobal_load_b32 v10, v[5:6], off\n\tv_mad_u64_u32 v[5:6], null, s2, v4, v[3:4]\n\ts_clause 0x1\n\ts_load_b32 s2, s[0:1], 0x28\n\ts_load_b64 s[0:1], s[0:1], 0x38\n\tv_mul_lo_u32 v3, v3, s3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_ashrrev_i32_e32 v6, 31, v5\n\tv_add3_u32 v0, v3, v1, v0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_4)\n\tv_lshlrev_b64 v[4:5], 2, v[5:6]\n\tv_add_co_u32 v6, vcc_lo, s10, v7\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v8, vcc_lo\n\tv_ashrrev_i32_e32 v1, 31, v0\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_4)\n\tv_add_co_u32 v8, vcc_lo, s4, v4\n\tv_add_co_ci_u32_e32 v9, vcc_lo, s5, v5, vcc_lo\n\tv_add_co_u32 v4, vcc_lo, s8, v4\n\tglobal_load_b32 v6, v[6:7], off\n\tglobal_load_b32 v7, v[8:9], off\n\tv_add_co_ci_u32_e32 v5, vcc_lo, s9, v5, vcc_lo\n\tv_lshlrev_b64 v[0:1], 2, v[0:1]\n\tglobal_load_b32 v4, v[4:5], off\n\ts_waitcnt vmcnt(3)\n\tv_div_scale_f32 v5, null, v2, v2, v10\n\tv_div_scale_f32 v11, vcc_lo, v10, v2, v10\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_rcp_f32_e32 v8, v5\n\ts_waitcnt_depctr 0xfff\n\tv_fma_f32 v9, -v5, v8, 1.0\n\ts_waitcnt vmcnt(1)\n\tv_dual_fmac_f32 v8, v9, v8 :: v_dual_mul_f32 v3, v6, v7\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_fma_f32 v3, v4, s2, -v3\n\tv_mul_f32_e32 v9, v11, v8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v12, -v5, v9, v11\n\tv_fmac_f32_e32 v9, v12, v8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fma_f32 v5, -v5, v9, v11\n\tv_div_fmas_f32 v5, v5, v8, v9\n\tv_add_co_u32 v0, vcc_lo, s0, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_div_fixup_f32 v2, v5, v2, v10\n\tv_mul_f32_e32 v2, v2, v3\n\tglobal_store_b32 v[0:1], v2, off\n.LBB0_2:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 320\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 13\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_, .Lfunc_end0-_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 576\n; NumSgprs: 18\n; NumVgprs: 13\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 1\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 13\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 24\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 32\n .size: 8\n .value_kind: global_buffer\n - .offset: 40\n .size: 4\n .value_kind: by_value\n - .offset: 44\n .size: 4\n .value_kind: by_value\n - .offset: 48\n .size: 4\n .value_kind: by_value\n - .offset: 52\n .size: 4\n .value_kind: by_value\n - .address_space: global\n .offset: 56\n .size: 8\n .value_kind: global_buffer\n - .offset: 64\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 68\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 72\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 76\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 78\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 80\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 82\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 84\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 86\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 104\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 112\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 120\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 128\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 320\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 13\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":88,"cells":{"id":{"kind":"string","value":"77740195c32415f155e3b5d3a01c8ebe02bd404b_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z13kernel_smoothPhiiS_ --------------------------\n .section .text._Z13kernel_smoothPhiiS_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=26\"\n .align 128\n\n\n\n\n .global _Z13kernel_smoothPhiiS_\n .type _Z13kernel_smoothPhiiS_,@function\n .size _Z13kernel_smoothPhiiS_,(.L_x_2 - _Z13kernel_smoothPhiiS_)\n .other _Z13kernel_smoothPhiiS_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z13kernel_smoothPhiiS_:\n.text._Z13kernel_smoothPhiiS_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R14, c[0x0][0x118] ;\n /*0020*/ MOV R15, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R10, R2 ;\n /*0060*/ MOV R11, R3 ;\n /*0070*/ MOV R10, R10 ;\n /*0080*/ MOV R11, R11 ;\n /*0090*/ MOV R0, 0x8 ;\n /*00a0*/ LDC R0, c[0x0][R0+0x160] ;\n /*00b0*/ MOV R0, R0 ;\n /*00c0*/ MOV R2, 0xc ;\n /*00d0*/ LDC R2, c[0x0][R2+0x160] ;\n /*00e0*/ MOV R4, R2 ;\n /*00f0*/ MOV R2, 0x10 ;\n /*0100*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0110*/ MOV R8, R2 ;\n /*0120*/ MOV R9, R3 ;\n /*0130*/ MOV R8, R8 ;\n /*0140*/ MOV R9, R9 ;\n /*0150*/ S2R R2, SR_CTAID.X ;\n /*0160*/ MOV R2, R2 ;\n /*0170*/ MOV R3, c[0x0][0x0] ;\n /*0180*/ S2R R5, SR_TID.X ;\n /*0190*/ MOV R5, R5 ;\n /*01a0*/ IMAD R2, R3, R2, R5 ;\n /*01b0*/ S2R R3, SR_CTAID.Y ;\n /*01c0*/ MOV R3, R3 ;\n /*01d0*/ MOV R5, c[0x0][0x4] ;\n /*01e0*/ S2R R6, SR_TID.Y ;\n /*01f0*/ MOV R6, R6 ;\n /*0200*/ IMAD R3, R5, R3, R6 ;\n /*0210*/ IADD3 R5, R2, -0x1, RZ ;\n /*0220*/ IADD3 R6, R0, -0x1, RZ ;\n /*0230*/ ISETP.GE.U32.AND P0, PT, R5, R6, PT ;\n /*0240*/ IADD3 R6, R3, -0x1, RZ ;\n /*0250*/ IADD3 R4, R4, -0x3, RZ ;\n /*0260*/ ISETP.GE.U32.AND P1, PT, R6, R4, PT ;\n /*0270*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*0280*/ MOV R10, R10 ;\n /*0290*/ MOV R11, R11 ;\n /*02a0*/ MOV R7, R0 ;\n /*02b0*/ MOV R4, R8 ;\n /*02c0*/ MOV R0, R9 ;\n /*02d0*/ MOV R2, R2 ;\n /*02e0*/ MOV R3, R3 ;\n /*02f0*/ MOV R8, R5 ;\n /*0300*/ MOV R9, R6 ;\n /*0310*/ @P0 BRA `(.L_x_0) ;\n /*0320*/ MOV R4, R4 ;\n /*0330*/ MOV R0, R0 ;\n /*0340*/ MOV R6, R10 ;\n /*0350*/ MOV R5, R11 ;\n /*0360*/ IADD3 R20, R2, 0x1, RZ ;\n /*0370*/ IMAD R18, R9, R7, RZ ;\n /*0380*/ IADD3 R16, R18, R8, RZ ;\n /*0390*/ IMAD R3, R3, R7, RZ ;\n /*03a0*/ IADD3 R13, R3, R8, RZ ;\n /*03b0*/ IADD3 R10, R3, R7, RZ ;\n /*03c0*/ IADD3 R7, R10, R8, RZ ;\n /*03d0*/ IADD3 R8, R18, R2, RZ ;\n /*03e0*/ IADD3 R9, R3, R2, RZ ;\n /*03f0*/ IADD3 R12, R10, R2, RZ ;\n /*0400*/ IADD3 R18, R18, R20, RZ ;\n /*0410*/ IADD3 R17, R3, R20, RZ ;\n /*0420*/ IADD3 R20, R10, R20, RZ ;\n /*0430*/ IMAD R16, R16, 0x3, RZ ;\n /*0440*/ MOV R2, R16 ;\n /*0450*/ MOV R2, R2 ;\n /*0460*/ MOV R3, RZ ;\n /*0470*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0480*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0490*/ MOV R2, R2 ;\n /*04a0*/ MOV R3, R3 ;\n /*04b0*/ MOV R2, R2 ;\n /*04c0*/ MOV R3, R3 ;\n /*04d0*/ R2UR UR4, R14 ;\n /*04e0*/ R2UR UR5, R15 ;\n /*04f0*/ LDG.E.U8 R2, [R2.64] ;\n /*0500*/ PRMT R2, R2, 0x7770, RZ ;\n /*0510*/ MOV R10, R2 ;\n /*0520*/ IMAD R13, R13, 0x3, RZ ;\n /*0530*/ MOV R2, R13 ;\n /*0540*/ MOV R2, R2 ;\n /*0550*/ MOV R3, RZ ;\n /*0560*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0570*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0580*/ MOV R2, R2 ;\n /*0590*/ MOV R3, R3 ;\n /*05a0*/ MOV R2, R2 ;\n /*05b0*/ MOV R3, R3 ;\n /*05c0*/ R2UR UR4, R14 ;\n /*05d0*/ R2UR UR5, R15 ;\n /*05e0*/ LDG.E.U8 R2, [R2.64] ;\n /*05f0*/ PRMT R2, R2, 0x7770, RZ ;\n /*0600*/ MOV R2, R2 ;\n /*0610*/ IADD3 R10, R2, R10, RZ ;\n /*0620*/ IMAD R7, R7, 0x3, RZ ;\n /*0630*/ MOV R2, R7 ;\n /*0640*/ MOV R2, R2 ;\n /*0650*/ MOV R3, RZ ;\n /*0660*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0670*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0680*/ MOV R2, R2 ;\n /*0690*/ MOV R3, R3 ;\n /*06a0*/ MOV R2, R2 ;\n /*06b0*/ MOV R3, R3 ;\n /*06c0*/ R2UR UR4, R14 ;\n /*06d0*/ R2UR UR5, R15 ;\n /*06e0*/ LDG.E.U8 R2, [R2.64] ;\n /*06f0*/ PRMT R2, R2, 0x7770, RZ ;\n /*0700*/ MOV R2, R2 ;\n /*0710*/ IADD3 R10, R10, R2, RZ ;\n /*0720*/ IMAD R8, R8, 0x3, RZ ;\n /*0730*/ MOV R2, R8 ;\n /*0740*/ MOV R2, R2 ;\n /*0750*/ MOV R3, RZ ;\n /*0760*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0770*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0780*/ MOV R2, R2 ;\n /*0790*/ MOV R3, R3 ;\n /*07a0*/ MOV R2, R2 ;\n /*07b0*/ MOV R3, R3 ;\n /*07c0*/ R2UR UR4, R14 ;\n /*07d0*/ R2UR UR5, R15 ;\n /*07e0*/ LDG.E.U8 R2, [R2.64] ;\n /*07f0*/ PRMT R2, R2, 0x7770, RZ ;\n /*0800*/ MOV R2, R2 ;\n /*0810*/ IADD3 R19, R10, R2, RZ ;\n /*0820*/ IMAD R9, R9, 0x3, RZ ;\n /*0830*/ MOV R10, R9 ;\n /*0840*/ MOV R10, R10 ;\n /*0850*/ MOV R11, RZ ;\n /*0860*/ IADD3 R2, P0, R6, R10, RZ ;\n /*0870*/ IADD3.X R3, R5, R11, RZ, P0, !PT ;\n /*0880*/ MOV R2, R2 ;\n /*0890*/ MOV R3, R3 ;\n /*08a0*/ MOV R2, R2 ;\n /*08b0*/ MOV R3, R3 ;\n /*08c0*/ R2UR UR4, R14 ;\n /*08d0*/ R2UR UR5, R15 ;\n /*08e0*/ LDG.E.U8 R2, [R2.64] ;\n /*08f0*/ PRMT R2, R2, 0x7770, RZ ;\n /*0900*/ PRMT R2, R2, 0x7710, RZ ;\n /*0910*/ MOV R3, 0x2 ;\n /*0920*/ PRMT R3, R3, 0x7710, RZ ;\n /*0930*/ MOV R3, R3 ;\n /*0940*/ PRMT R2, R2, 0x7710, RZ ;\n /*0950*/ MOV R2, R2 ;\n /*0960*/ IMAD.U32 R2, R2, R3, RZ ;\n /*0970*/ IADD3 R19, R19, R2, RZ ;\n /*0980*/ IMAD R12, R12, 0x3, RZ ;\n /*0990*/ MOV R2, R12 ;\n /*09a0*/ MOV R2, R2 ;\n /*09b0*/ MOV R3, RZ ;\n /*09c0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*09d0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*09e0*/ MOV R2, R2 ;\n /*09f0*/ MOV R3, R3 ;\n /*0a00*/ MOV R2, R2 ;\n /*0a10*/ MOV R3, R3 ;\n /*0a20*/ R2UR UR4, R14 ;\n /*0a30*/ R2UR UR5, R15 ;\n /*0a40*/ LDG.E.U8 R2, [R2.64] ;\n /*0a50*/ PRMT R2, R2, 0x7770, RZ ;\n /*0a60*/ MOV R2, R2 ;\n /*0a70*/ IADD3 R19, R19, R2, RZ ;\n /*0a80*/ IMAD R18, R18, 0x3, RZ ;\n /*0a90*/ MOV R2, R18 ;\n /*0aa0*/ MOV R2, R2 ;\n /*0ab0*/ MOV R3, RZ ;\n /*0ac0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0ad0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0ae0*/ MOV R2, R2 ;\n /*0af0*/ MOV R3, R3 ;\n /*0b00*/ MOV R2, R2 ;\n /*0b10*/ MOV R3, R3 ;\n /*0b20*/ R2UR UR4, R14 ;\n /*0b30*/ R2UR UR5, R15 ;\n /*0b40*/ LDG.E.U8 R2, [R2.64] ;\n /*0b50*/ PRMT R2, R2, 0x7770, RZ ;\n /*0b60*/ MOV R2, R2 ;\n /*0b70*/ IADD3 R19, R19, R2, RZ ;\n /*0b80*/ IMAD R17, R17, 0x3, RZ ;\n /*0b90*/ MOV R2, R17 ;\n /*0ba0*/ MOV R2, R2 ;\n /*0bb0*/ MOV R3, RZ ;\n /*0bc0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0bd0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0be0*/ MOV R2, R2 ;\n /*0bf0*/ MOV R3, R3 ;\n /*0c00*/ MOV R2, R2 ;\n /*0c10*/ MOV R3, R3 ;\n /*0c20*/ R2UR UR4, R14 ;\n /*0c30*/ R2UR UR5, R15 ;\n /*0c40*/ LDG.E.U8 R2, [R2.64] ;\n /*0c50*/ PRMT R2, R2, 0x7770, RZ ;\n /*0c60*/ MOV R2, R2 ;\n /*0c70*/ IADD3 R19, R19, R2, RZ ;\n /*0c80*/ IMAD R20, R20, 0x3, RZ ;\n /*0c90*/ MOV R2, R20 ;\n /*0ca0*/ MOV R2, R2 ;\n /*0cb0*/ MOV R3, RZ ;\n /*0cc0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0cd0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0ce0*/ MOV R2, R2 ;\n /*0cf0*/ MOV R3, R3 ;\n /*0d00*/ MOV R2, R2 ;\n /*0d10*/ MOV R3, R3 ;\n /*0d20*/ R2UR UR4, R14 ;\n /*0d30*/ R2UR UR5, R15 ;\n /*0d40*/ LDG.E.U8 R2, [R2.64] ;\n /*0d50*/ PRMT R2, R2, 0x7770, RZ ;\n /*0d60*/ MOV R2, R2 ;\n /*0d70*/ IADD3 R2, R19, R2, RZ ;\n /*0d80*/ IMAD.HI R2, R2, 0x66666667, RZ ;\n /*0d90*/ SHF.R.U32.HI R19, RZ, 0x1f, R2 ;\n /*0da0*/ SHF.R.U32.HI R2, RZ, 0x2, R2 ;\n /*0db0*/ IADD3 R19, R2, R19, RZ ;\n /*0dc0*/ IADD3 R2, R16, 0x1, RZ ;\n /*0dd0*/ MOV R2, R2 ;\n /*0de0*/ MOV R2, R2 ;\n /*0df0*/ MOV R3, RZ ;\n /*0e00*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0e10*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0e20*/ MOV R2, R2 ;\n /*0e30*/ MOV R3, R3 ;\n /*0e40*/ MOV R2, R2 ;\n /*0e50*/ MOV R3, R3 ;\n /*0e60*/ R2UR UR4, R14 ;\n /*0e70*/ R2UR UR5, R15 ;\n /*0e80*/ LDG.E.U8 R2, [R2.64] ;\n /*0e90*/ PRMT R2, R2, 0x7770, RZ ;\n /*0ea0*/ MOV R21, R2 ;\n /*0eb0*/ IADD3 R2, R13, 0x1, RZ ;\n /*0ec0*/ MOV R2, R2 ;\n /*0ed0*/ MOV R2, R2 ;\n /*0ee0*/ MOV R3, RZ ;\n /*0ef0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*0f00*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0f10*/ MOV R2, R2 ;\n /*0f20*/ MOV R3, R3 ;\n /*0f30*/ MOV R2, R2 ;\n /*0f40*/ MOV R3, R3 ;\n /*0f50*/ R2UR UR4, R14 ;\n /*0f60*/ R2UR UR5, R15 ;\n /*0f70*/ LDG.E.U8 R2, [R2.64] ;\n /*0f80*/ PRMT R2, R2, 0x7770, RZ ;\n /*0f90*/ MOV R2, R2 ;\n /*0fa0*/ IADD3 R21, R2, R21, RZ ;\n /*0fb0*/ IADD3 R2, R7, 0x1, RZ ;\n /*0fc0*/ MOV R2, R2 ;\n /*0fd0*/ MOV R2, R2 ;\n /*0fe0*/ MOV R3, RZ ;\n /*0ff0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1000*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1010*/ MOV R2, R2 ;\n /*1020*/ MOV R3, R3 ;\n /*1030*/ MOV R2, R2 ;\n /*1040*/ MOV R3, R3 ;\n /*1050*/ R2UR UR4, R14 ;\n /*1060*/ R2UR UR5, R15 ;\n /*1070*/ LDG.E.U8 R2, [R2.64] ;\n /*1080*/ PRMT R2, R2, 0x7770, RZ ;\n /*1090*/ MOV R2, R2 ;\n /*10a0*/ IADD3 R21, R21, R2, RZ ;\n /*10b0*/ IADD3 R2, R8, 0x1, RZ ;\n /*10c0*/ MOV R2, R2 ;\n /*10d0*/ MOV R2, R2 ;\n /*10e0*/ MOV R3, RZ ;\n /*10f0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1100*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1110*/ MOV R2, R2 ;\n /*1120*/ MOV R3, R3 ;\n /*1130*/ MOV R2, R2 ;\n /*1140*/ MOV R3, R3 ;\n /*1150*/ R2UR UR4, R14 ;\n /*1160*/ R2UR UR5, R15 ;\n /*1170*/ LDG.E.U8 R2, [R2.64] ;\n /*1180*/ PRMT R2, R2, 0x7770, RZ ;\n /*1190*/ MOV R23, R2 ;\n /*11a0*/ IADD3 R23, R21, R23, RZ ;\n /*11b0*/ IADD3 R2, R9, 0x1, RZ ;\n /*11c0*/ MOV R2, R2 ;\n /*11d0*/ MOV R22, R2 ;\n /*11e0*/ MOV R21, RZ ;\n /*11f0*/ IADD3 R2, P0, R6, R22, RZ ;\n /*1200*/ IADD3.X R3, R5, R21, RZ, P0, !PT ;\n /*1210*/ MOV R2, R2 ;\n /*1220*/ MOV R3, R3 ;\n /*1230*/ MOV R2, R2 ;\n /*1240*/ MOV R3, R3 ;\n /*1250*/ R2UR UR4, R14 ;\n /*1260*/ R2UR UR5, R15 ;\n /*1270*/ LDG.E.U8 R2, [R2.64] ;\n /*1280*/ PRMT R2, R2, 0x7770, RZ ;\n /*1290*/ PRMT R2, R2, 0x7710, RZ ;\n /*12a0*/ MOV R3, 0x2 ;\n /*12b0*/ PRMT R3, R3, 0x7710, RZ ;\n /*12c0*/ MOV R3, R3 ;\n /*12d0*/ PRMT R2, R2, 0x7710, RZ ;\n /*12e0*/ MOV R2, R2 ;\n /*12f0*/ IMAD.U32 R2, R2, R3, RZ ;\n /*1300*/ IADD3 R23, R23, R2, RZ ;\n /*1310*/ IADD3 R2, R12, 0x1, RZ ;\n /*1320*/ MOV R2, R2 ;\n /*1330*/ MOV R2, R2 ;\n /*1340*/ MOV R3, RZ ;\n /*1350*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1360*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1370*/ MOV R2, R2 ;\n /*1380*/ MOV R3, R3 ;\n /*1390*/ MOV R2, R2 ;\n /*13a0*/ MOV R3, R3 ;\n /*13b0*/ R2UR UR4, R14 ;\n /*13c0*/ R2UR UR5, R15 ;\n /*13d0*/ LDG.E.U8 R2, [R2.64] ;\n /*13e0*/ PRMT R2, R2, 0x7770, RZ ;\n /*13f0*/ MOV R2, R2 ;\n /*1400*/ IADD3 R23, R23, R2, RZ ;\n /*1410*/ IADD3 R2, R18, 0x1, RZ ;\n /*1420*/ MOV R2, R2 ;\n /*1430*/ MOV R2, R2 ;\n /*1440*/ MOV R3, RZ ;\n /*1450*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1460*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1470*/ MOV R2, R2 ;\n /*1480*/ MOV R3, R3 ;\n /*1490*/ MOV R2, R2 ;\n /*14a0*/ MOV R3, R3 ;\n /*14b0*/ R2UR UR4, R14 ;\n /*14c0*/ R2UR UR5, R15 ;\n /*14d0*/ LDG.E.U8 R2, [R2.64] ;\n /*14e0*/ PRMT R2, R2, 0x7770, RZ ;\n /*14f0*/ MOV R2, R2 ;\n /*1500*/ IADD3 R23, R23, R2, RZ ;\n /*1510*/ IADD3 R2, R17, 0x1, RZ ;\n /*1520*/ MOV R2, R2 ;\n /*1530*/ MOV R2, R2 ;\n /*1540*/ MOV R3, RZ ;\n /*1550*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1560*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1570*/ MOV R2, R2 ;\n /*1580*/ MOV R3, R3 ;\n /*1590*/ MOV R2, R2 ;\n /*15a0*/ MOV R3, R3 ;\n /*15b0*/ R2UR UR4, R14 ;\n /*15c0*/ R2UR UR5, R15 ;\n /*15d0*/ LDG.E.U8 R2, [R2.64] ;\n /*15e0*/ PRMT R2, R2, 0x7770, RZ ;\n /*15f0*/ MOV R2, R2 ;\n /*1600*/ IADD3 R23, R23, R2, RZ ;\n /*1610*/ IADD3 R2, R20, 0x1, RZ ;\n /*1620*/ MOV R2, R2 ;\n /*1630*/ MOV R2, R2 ;\n /*1640*/ MOV R3, RZ ;\n /*1650*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1660*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1670*/ MOV R2, R2 ;\n /*1680*/ MOV R3, R3 ;\n /*1690*/ MOV R2, R2 ;\n /*16a0*/ MOV R3, R3 ;\n /*16b0*/ R2UR UR4, R14 ;\n /*16c0*/ R2UR UR5, R15 ;\n /*16d0*/ LDG.E.U8 R2, [R2.64] ;\n /*16e0*/ PRMT R2, R2, 0x7770, RZ ;\n /*16f0*/ MOV R2, R2 ;\n /*1700*/ IADD3 R2, R23, R2, RZ ;\n /*1710*/ IMAD.HI R2, R2, 0x66666667, RZ ;\n /*1720*/ SHF.R.U32.HI R23, RZ, 0x1f, R2 ;\n /*1730*/ SHF.R.U32.HI R2, RZ, 0x2, R2 ;\n /*1740*/ IADD3 R23, R2, R23, RZ ;\n /*1750*/ IADD3 R16, R16, 0x2, RZ ;\n /*1760*/ MOV R16, R16 ;\n /*1770*/ MOV R2, R16 ;\n /*1780*/ MOV R3, RZ ;\n /*1790*/ IADD3 R2, P0, R6, R2, RZ ;\n /*17a0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*17b0*/ MOV R2, R2 ;\n /*17c0*/ MOV R3, R3 ;\n /*17d0*/ MOV R2, R2 ;\n /*17e0*/ MOV R3, R3 ;\n /*17f0*/ R2UR UR4, R14 ;\n /*1800*/ R2UR UR5, R15 ;\n /*1810*/ LDG.E.U8 R2, [R2.64] ;\n /*1820*/ PRMT R2, R2, 0x7770, RZ ;\n /*1830*/ MOV R16, R2 ;\n /*1840*/ IADD3 R13, R13, 0x2, RZ ;\n /*1850*/ MOV R13, R13 ;\n /*1860*/ MOV R2, R13 ;\n /*1870*/ MOV R3, RZ ;\n /*1880*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1890*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*18a0*/ MOV R2, R2 ;\n /*18b0*/ MOV R3, R3 ;\n /*18c0*/ MOV R2, R2 ;\n /*18d0*/ MOV R3, R3 ;\n /*18e0*/ R2UR UR4, R14 ;\n /*18f0*/ R2UR UR5, R15 ;\n /*1900*/ LDG.E.U8 R2, [R2.64] ;\n /*1910*/ PRMT R2, R2, 0x7770, RZ ;\n /*1920*/ MOV R2, R2 ;\n /*1930*/ IADD3 R16, R2, R16, RZ ;\n /*1940*/ IADD3 R7, R7, 0x2, RZ ;\n /*1950*/ MOV R7, R7 ;\n /*1960*/ MOV R2, R7 ;\n /*1970*/ MOV R3, RZ ;\n /*1980*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1990*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*19a0*/ MOV R2, R2 ;\n /*19b0*/ MOV R3, R3 ;\n /*19c0*/ MOV R2, R2 ;\n /*19d0*/ MOV R3, R3 ;\n /*19e0*/ R2UR UR4, R14 ;\n /*19f0*/ R2UR UR5, R15 ;\n /*1a00*/ LDG.E.U8 R2, [R2.64] ;\n /*1a10*/ PRMT R2, R2, 0x7770, RZ ;\n /*1a20*/ MOV R2, R2 ;\n /*1a30*/ IADD3 R16, R16, R2, RZ ;\n /*1a40*/ IADD3 R8, R8, 0x2, RZ ;\n /*1a50*/ MOV R8, R8 ;\n /*1a60*/ MOV R2, R8 ;\n /*1a70*/ MOV R3, RZ ;\n /*1a80*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1a90*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1aa0*/ MOV R2, R2 ;\n /*1ab0*/ MOV R3, R3 ;\n /*1ac0*/ MOV R2, R2 ;\n /*1ad0*/ MOV R3, R3 ;\n /*1ae0*/ R2UR UR4, R14 ;\n /*1af0*/ R2UR UR5, R15 ;\n /*1b00*/ LDG.E.U8 R2, [R2.64] ;\n /*1b10*/ PRMT R2, R2, 0x7770, RZ ;\n /*1b20*/ MOV R2, R2 ;\n /*1b30*/ IADD3 R16, R16, R2, RZ ;\n /*1b40*/ IADD3 R9, R9, 0x2, RZ ;\n /*1b50*/ MOV R8, R9 ;\n /*1b60*/ MOV R8, R8 ;\n /*1b70*/ MOV R7, RZ ;\n /*1b80*/ IADD3 R2, P0, R6, R8, RZ ;\n /*1b90*/ IADD3.X R3, R5, R7, RZ, P0, !PT ;\n /*1ba0*/ MOV R2, R2 ;\n /*1bb0*/ MOV R3, R3 ;\n /*1bc0*/ MOV R2, R2 ;\n /*1bd0*/ MOV R3, R3 ;\n /*1be0*/ R2UR UR4, R14 ;\n /*1bf0*/ R2UR UR5, R15 ;\n /*1c00*/ LDG.E.U8 R2, [R2.64] ;\n /*1c10*/ PRMT R2, R2, 0x7770, RZ ;\n /*1c20*/ PRMT R2, R2, 0x7710, RZ ;\n /*1c30*/ MOV R3, 0x2 ;\n /*1c40*/ PRMT R3, R3, 0x7710, RZ ;\n /*1c50*/ MOV R3, R3 ;\n /*1c60*/ PRMT R2, R2, 0x7710, RZ ;\n /*1c70*/ MOV R2, R2 ;\n /*1c80*/ IMAD.U32 R2, R2, R3, RZ ;\n /*1c90*/ IADD3 R16, R16, R2, RZ ;\n /*1ca0*/ IADD3 R12, R12, 0x2, RZ ;\n /*1cb0*/ MOV R12, R12 ;\n /*1cc0*/ MOV R2, R12 ;\n /*1cd0*/ MOV R3, RZ ;\n /*1ce0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1cf0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1d00*/ MOV R2, R2 ;\n /*1d10*/ MOV R3, R3 ;\n /*1d20*/ MOV R2, R2 ;\n /*1d30*/ MOV R3, R3 ;\n /*1d40*/ R2UR UR4, R14 ;\n /*1d50*/ R2UR UR5, R15 ;\n /*1d60*/ LDG.E.U8 R2, [R2.64] ;\n /*1d70*/ PRMT R2, R2, 0x7770, RZ ;\n /*1d80*/ MOV R2, R2 ;\n /*1d90*/ IADD3 R16, R16, R2, RZ ;\n /*1da0*/ IADD3 R18, R18, 0x2, RZ ;\n /*1db0*/ MOV R18, R18 ;\n /*1dc0*/ MOV R2, R18 ;\n /*1dd0*/ MOV R3, RZ ;\n /*1de0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1df0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1e00*/ MOV R2, R2 ;\n /*1e10*/ MOV R3, R3 ;\n /*1e20*/ MOV R2, R2 ;\n /*1e30*/ MOV R3, R3 ;\n /*1e40*/ R2UR UR4, R14 ;\n /*1e50*/ R2UR UR5, R15 ;\n /*1e60*/ LDG.E.U8 R2, [R2.64] ;\n /*1e70*/ PRMT R2, R2, 0x7770, RZ ;\n /*1e80*/ MOV R2, R2 ;\n /*1e90*/ IADD3 R16, R16, R2, RZ ;\n /*1ea0*/ IADD3 R17, R17, 0x2, RZ ;\n /*1eb0*/ MOV R17, R17 ;\n /*1ec0*/ MOV R2, R17 ;\n /*1ed0*/ MOV R3, RZ ;\n /*1ee0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1ef0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*1f00*/ MOV R2, R2 ;\n /*1f10*/ MOV R3, R3 ;\n /*1f20*/ MOV R2, R2 ;\n /*1f30*/ MOV R3, R3 ;\n /*1f40*/ R2UR UR4, R14 ;\n /*1f50*/ R2UR UR5, R15 ;\n /*1f60*/ LDG.E.U8 R2, [R2.64] ;\n /*1f70*/ PRMT R2, R2, 0x7770, RZ ;\n /*1f80*/ MOV R2, R2 ;\n /*1f90*/ IADD3 R16, R16, R2, RZ ;\n /*1fa0*/ IADD3 R20, R20, 0x2, RZ ;\n /*1fb0*/ MOV R20, R20 ;\n /*1fc0*/ MOV R2, R20 ;\n /*1fd0*/ MOV R3, RZ ;\n /*1fe0*/ IADD3 R2, P0, R6, R2, RZ ;\n /*1ff0*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*2000*/ MOV R2, R2 ;\n /*2010*/ MOV R3, R3 ;\n /*2020*/ MOV R2, R2 ;\n /*2030*/ MOV R3, R3 ;\n /*2040*/ R2UR UR4, R14 ;\n /*2050*/ R2UR UR5, R15 ;\n /*2060*/ LDG.E.U8 R2, [R2.64] ;\n /*2070*/ PRMT R2, R2, 0x7770, RZ ;\n /*2080*/ MOV R2, R2 ;\n /*2090*/ IADD3 R2, R16, R2, RZ ;\n /*20a0*/ IMAD.HI R2, R2, 0x66666667, RZ ;\n /*20b0*/ SHF.R.U32.HI R3, RZ, 0x1f, R2 ;\n /*20c0*/ SHF.R.U32.HI R2, RZ, 0x2, R2 ;\n /*20d0*/ IADD3 R5, R2, R3, RZ ;\n /*20e0*/ IADD3 R2, P0, R4, R10, RZ ;\n /*20f0*/ IADD3.X R3, R0, R11, RZ, P0, !PT ;\n /*2100*/ MOV R2, R2 ;\n /*2110*/ MOV R3, R3 ;\n /*2120*/ MOV R19, R19 ;\n /*2130*/ MOV R2, R2 ;\n /*2140*/ MOV R3, R3 ;\n /*2150*/ R2UR UR4, R14 ;\n /*2160*/ R2UR UR5, R15 ;\n /*2170*/ STG.E.U8 [R2.64], R19 ;\n /*2180*/ IADD3 R2, P0, R4, R22, RZ ;\n /*2190*/ IADD3.X R3, R0, R21, RZ, P0, !PT ;\n /*21a0*/ MOV R2, R2 ;\n /*21b0*/ MOV R3, R3 ;\n /*21c0*/ MOV R23, R23 ;\n /*21d0*/ MOV R2, R2 ;\n /*21e0*/ MOV R3, R3 ;\n /*21f0*/ R2UR UR4, R14 ;\n /*2200*/ R2UR UR5, R15 ;\n /*2210*/ STG.E.U8 [R2.64], R23 ;\n /*2220*/ IADD3 R2, P0, R4, R8, RZ ;\n /*2230*/ IADD3.X R3, R0, R7, RZ, P0, !PT ;\n /*2240*/ MOV R2, R2 ;\n /*2250*/ MOV R3, R3 ;\n /*2260*/ MOV R5, R5 ;\n /*2270*/ MOV R2, R2 ;\n /*2280*/ MOV R3, R3 ;\n /*2290*/ R2UR UR4, R14 ;\n /*22a0*/ R2UR UR5, R15 ;\n /*22b0*/ STG.E.U8 [R2.64], R5 ;\n.L_x_0:\n /*22c0*/ EXIT ;\n.L_x_1:\n /*22d0*/ BRA `(.L_x_1);\n /*22e0*/ NOP;\n /*22f0*/ NOP;\n /*2300*/ NOP;\n /*2310*/ NOP;\n /*2320*/ NOP;\n /*2330*/ NOP;\n /*2340*/ NOP;\n /*2350*/ NOP;\n /*2360*/ NOP;\n /*2370*/ NOP;\n.L_x_2:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"kernel_smooth.hip\"\n\t.globl\t_Z28__device_stub__kernel_smoothPhiiS_ # -- Begin function _Z28__device_stub__kernel_smoothPhiiS_\n\t.p2align\t4, 0x90\n\t.type\t_Z28__device_stub__kernel_smoothPhiiS_,@function\n_Z28__device_stub__kernel_smoothPhiiS_: # @_Z28__device_stub__kernel_smoothPhiiS_\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovq\t%rdi, 72(%rsp)\n\tmovl\t%esi, 12(%rsp)\n\tmovl\t%edx, 8(%rsp)\n\tmovq\t%rcx, 64(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t12(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t8(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t48(%rsp), %rdi\n\tleaq\t32(%rsp), %rsi\n\tleaq\t24(%rsp), %rdx\n\tleaq\t16(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t48(%rsp), %rsi\n\tmovl\t56(%rsp), %edx\n\tmovq\t32(%rsp), %rcx\n\tmovl\t40(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z13kernel_smoothPhiiS_, %edi\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z28__device_stub__kernel_smoothPhiiS_, .Lfunc_end0-_Z28__device_stub__kernel_smoothPhiiS_\n\t.cfi_endproc\n # -- End function\n\t.globl\tsmooth # -- Begin function smooth\n\t.p2align\t4, 0x90\n\t.type\tsmooth,@function\nsmooth: # @smooth\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 32\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 40\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 160\n\t.cfi_offset %rbx, -40\n\t.cfi_offset %r12, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %r15, -16\n\tmovq\t%rcx, %rbx\n\tmovl\t%edx, %r14d\n\tmovl\t%esi, %r15d\n\tleal\t15(%r15), %ecx\n\ttestl\t%esi, %esi\n\tcmovnsl\t%esi, %ecx\n\tsarl\t$4, %ecx\n\tleal\t15(%r14), %eax\n\ttestl\t%edx, %edx\n\tcmovnsl\t%edx, %eax\n\tmovq\t%rdi, %r12\n\tsarl\t$4, %eax\n\tshlq\t$32, %rax\n\torq\t%rcx, %rax\n\tmovabsq\t$68719476752, %rdx # imm = 0x1000000010\n\tmovq\t%rax, %rdi\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_2\n# %bb.1:\n\tmovq\t%r12, 72(%rsp)\n\tmovl\t%r15d, 12(%rsp)\n\tmovl\t%r14d, 8(%rsp)\n\tmovq\t%rbx, 64(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t12(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t8(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t48(%rsp), %rdi\n\tleaq\t32(%rsp), %rsi\n\tleaq\t24(%rsp), %rdx\n\tleaq\t16(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t48(%rsp), %rsi\n\tmovl\t56(%rsp), %edx\n\tmovq\t32(%rsp), %rcx\n\tmovl\t40(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z13kernel_smoothPhiiS_, %edi\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$16, %rsp\n\t.cfi_adjust_cfa_offset -16\n.LBB1_2:\n\tcallq\thipDeviceSynchronize\n\taddq\t$120, %rsp\n\t.cfi_def_cfa_offset 40\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 8\n\tretq\n.Lfunc_end1:\n\t.size\tsmooth, .Lfunc_end1-smooth\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB2_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB2_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z13kernel_smoothPhiiS_, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end2:\n\t.size\t__hip_module_ctor, .Lfunc_end2-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB3_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB3_2:\n\tretq\n.Lfunc_end3:\n\t.size\t__hip_module_dtor, .Lfunc_end3-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_Z13kernel_smoothPhiiS_,@object # @_Z13kernel_smoothPhiiS_\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z13kernel_smoothPhiiS_\n\t.p2align\t3, 0x0\n_Z13kernel_smoothPhiiS_:\n\t.quad\t_Z28__device_stub__kernel_smoothPhiiS_\n\t.size\t_Z13kernel_smoothPhiiS_, 8\n\n\t.type\t.L__unnamed_1,@object # @0\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L__unnamed_1:\n\t.asciz\t\"_Z13kernel_smoothPhiiS_\"\n\t.size\t.L__unnamed_1, 24\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":89,"cells":{"id":{"kind":"string","value":"b7474467a34795a1537608534bba153798aef2a2_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z8vect_addPfS_i --------------------------\n .section .text._Z8vect_addPfS_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=10\"\n .align 128\n\n\n\n\n .global _Z8vect_addPfS_i\n .type _Z8vect_addPfS_i,@function\n .size _Z8vect_addPfS_i,(.L_x_1 - _Z8vect_addPfS_i)\n .other _Z8vect_addPfS_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z8vect_addPfS_i:\n.text._Z8vect_addPfS_i:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R2, SR_TID.X ;\n /*0020*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x170], PT ;\n /*0030*/ @P0 EXIT ;\n /*0040*/ MOV R3, 0x4 ;\n /*0050*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0060*/ IMAD.WIDE R4, R2, R3, c[0x0][0x168] ;\n /*0070*/ IMAD.WIDE R2, R2, R3, c[0x0][0x160] ;\n /*0080*/ LDG.E R4, [R4.64] ;\n /*0090*/ LDG.E R7, [R2.64] ;\n /*00a0*/ FADD R7, R4, R7 ;\n /*00b0*/ STG.E [R2.64], R7 ;\n /*00c0*/ EXIT ;\n.L_x_0:\n /*00d0*/ BRA `(.L_x_0);\n /*00e0*/ NOP;\n /*00f0*/ NOP;\n /*0100*/ NOP;\n /*0110*/ NOP;\n /*0120*/ NOP;\n /*0130*/ NOP;\n /*0140*/ NOP;\n /*0150*/ NOP;\n /*0160*/ NOP;\n /*0170*/ NOP;\n.L_x_1:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.weak\t__cxa_pure_virtual ; -- Begin function __cxa_pure_virtual\n\t.p2align\t2\n\t.type\t__cxa_pure_virtual,@function\n__cxa_pure_virtual: ; @__cxa_pure_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB0_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB0_1\n.Lfunc_end0:\n\t.size\t__cxa_pure_virtual, .Lfunc_end0-__cxa_pure_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.weak\t__cxa_deleted_virtual ; -- Begin function __cxa_deleted_virtual\n\t.p2align\t2\n\t.type\t__cxa_deleted_virtual,@function\n__cxa_deleted_virtual: ; @__cxa_deleted_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB1_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB1_1\n.Lfunc_end1:\n\t.size\t__cxa_deleted_virtual, .Lfunc_end1-__cxa_deleted_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hsa_signal_add\n\t.type\t__ockl_hsa_signal_add,@function\n__ockl_hsa_signal_add: ; @__ockl_hsa_signal_add\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v4, s32 offset:36 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s32 offset:32 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v2\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v1, s32 offset:28 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[3:4], s32 offset:20 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tscratch_store_b64 off, v[3:4], s32 offset:12 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s32 offset:4 ; 8-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 3\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s1, 0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 1\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_3\n; %bb.2:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 4\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s1, 2\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_17\n\ts_branch .LBB2_4\n.LBB2_3:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 1\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 0\n\tv_writelane_b32 v6, s2, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 5\n\tv_writelane_b32 v6, s1, 6\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 7\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_13\n\ts_branch .LBB2_6\n.LBB2_4:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 9\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_15\n\ts_branch .LBB2_18\n.LBB2_5:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 10\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 11\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 0\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_3\n.LBB2_6:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 12\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_7\n\ts_branch .LBB2_14\n.LBB2_7:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 13\n\tv_writelane_b32 v6, s1, 14\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 15\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_9\n; %bb.8:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 4\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_lt_i32_e64 s2, v0, s0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 13\n\tv_writelane_b32 v6, s0, 14\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_9:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s3, v6, 15\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_readlane_b32 s1, v6, 4\n\tv_readlane_b32 s2, v6, 13\n\tv_readlane_b32 s0, v6, 14\n\ts_and_b32 s0, s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 5\n\tv_writelane_b32 v6, s0, 6\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_13\n.LBB2_10:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 16\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 17\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_11:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v6, 17\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 19\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_19\n; %bb.12:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_19\n.LBB2_13:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v6, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s0, v6, 5\n\tv_readlane_b32 s1, v6, 6\n\tv_writelane_b32 v6, s1, 16\n\tv_writelane_b32 v6, s1, 17\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 18\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_11\n\ts_branch .LBB2_10\n.LBB2_14:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_branch .LBB2_7\n.LBB2_15:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 9\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 8\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_17\n.LBB2_16:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_5\n.LBB2_17:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v6, 2\n\tv_writelane_b32 v6, s1, 11\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 10\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_5\n\ts_branch .LBB2_16\n.LBB2_18:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 0\n\ts_xor_b32 s0, exec_lo, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_15\n.LBB2_19:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[0:1], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s1, v[0:1], s[0:1]\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 20\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_21\n; %bb.20:\n\tscratch_load_b64 v[1:2], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[3:4], off offset:24\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[1:2], v[3:4], off\n\tv_readfirstlane_b32 s0, v0\n\ts_mov_b32 s1, 0xff\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB2_21:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 20\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:48 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end2:\n\t.size\t__ockl_hsa_signal_add, .Lfunc_end2-__ockl_hsa_signal_add\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 1952\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 56\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_internal\n\t.type\t__ockl_hostcall_internal,@function\n__ockl_hostcall_internal: ; @__ockl_hostcall_internal\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s18, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v24, s33 offset:308 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v25, s33 offset:312 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v26, s33 offset:316 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x150\n\tv_writelane_b32 v24, s30, 0\n\tv_writelane_b32 v24, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:132 ; 4-byte Folded Spill\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s6, 0\n\tv_writelane_b32 v26, s7, 1\n\tscratch_store_b32 off, v18, s33 offset:128 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v16\n\tscratch_load_b32 v16, off, s33 offset:128 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:124 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v14\n\tscratch_load_b32 v14, off, s33 offset:124 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v12\n\tscratch_load_b32 v12, off, s33 offset:120 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:116 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v10\n\tscratch_load_b32 v10, off, s33 offset:116 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:112 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v8\n\tscratch_load_b32 v8, off, s33 offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v6\n\tscratch_load_b32 v6, off, s33 offset:108 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:104 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v4\n\tscratch_load_b32 v4, off, s33 offset:104 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v2\n\tscratch_load_b32 v2, off, s33 offset:100 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:96 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v1, s33 offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s33 offset:92 ; 4-byte Folded Reload\n\tv_writelane_b32 v26, s15, 2\n\tv_writelane_b32 v26, s14, 3\n\tv_writelane_b32 v26, s13, 4\n\tv_writelane_b32 v26, s12, 5\n\tv_writelane_b32 v26, s10, 6\n\tv_writelane_b32 v26, s11, 7\n\tv_writelane_b32 v26, s8, 8\n\tv_writelane_b32 v26, s9, 9\n\tv_writelane_b32 v26, s4, 10\n\tv_writelane_b32 v26, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\ts_waitcnt vmcnt(8)\n\tv_mov_b32_e32 v18, v16\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec\n\ts_waitcnt vmcnt(7)\n\tv_mov_b32_e32 v16, v14\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\ts_waitcnt vmcnt(6)\n\tv_mov_b32_e32 v14, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\ts_waitcnt vmcnt(5)\n\tv_mov_b32_e32 v12, v10\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\ts_waitcnt vmcnt(4)\n\tv_mov_b32_e32 v10, v8\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\ts_waitcnt vmcnt(3)\n\tv_mov_b32_e32 v8, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[17:18], s33 offset:84 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[15:16], s33 offset:76 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[13:14], s33 offset:68 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[11:12], s33 offset:60 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[9:10], s33 offset:52 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[7:8], s33 offset:44 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[5:6], s33 offset:36 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:28 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s0, -1\n\tv_mbcnt_lo_u32_b32 v0, s0, s1\n\tv_mbcnt_hi_u32_b32 v0, s0, v0\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b32 off, v3, s33 offset:24 ; 4-byte Folded Spill\n\tv_readfirstlane_b32 s0, v0\n\tscratch_store_b64 off, v[1:2], s33 offset:16 ; 8-byte Folded Spill\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, s1\n\tv_writelane_b32 v26, s0, 12\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v0, 0\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 13\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_6\n; %bb.1:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_mov_b64 s[2:3], 24\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:160 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b64 s[2:3], 40\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:152 ; 8-byte Folded Spill\n\tglobal_load_b64 v[5:6], v[0:1], off\n\tglobal_load_b64 v[10:11], v[0:1], off offset:40\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s1, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s1, v4, s1, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s0, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 15\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_5\n.LBB3_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 14\n\tscratch_load_b64 v[2:3], off, s33 offset:144 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:160 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:152 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[4:5], off\n\tglobal_load_b64 v[10:11], v[7:8], off\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s2, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s2, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s2, v4, s2, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e64 s0, v[0:1], v[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:168 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 16\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_2\n; %bb.3:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 16\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.4:\n\tscratch_load_b64 v[0:1], off, s33 offset:168 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n.LBB3_5:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:136 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n.LBB3_6:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[4:5], s0, v[4:5]\n\tv_mov_b32_e32 v2, v4\n\tv_readfirstlane_b32 s4, v3\n\tv_readfirstlane_b32 s2, v2\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr3\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s5\n\ts_lshl_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s0, 0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s0\n\ts_or_b64 s[2:3], s[2:3], s[4:5]\n\tv_writelane_b32 v26, s2, 17\n\tv_writelane_b32 v26, s3, 18\n\tglobal_load_b64 v[2:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:200 ; 8-byte Folded Spill\n\ts_mov_b64 s[6:7], 40\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s7\n\tv_add_co_u32 v2, s4, v2, s4\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tglobal_load_b64 v[3:4], v[0:1], off offset:40\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v4\n\tv_and_b32_e64 v2, s0, v2\n\ts_mov_b32 s0, s2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_and_b32_e64 v3, s0, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tscratch_store_b64 off, v[5:6], s33 offset:184 ; 8-byte Folded Spill\n\tglobal_load_b64 v[1:2], v[0:1], off offset:8\n\ts_mov_b32 s0, 12\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], exec\n\tv_writelane_b32 v26, s2, 19\n\tv_writelane_b32 v26, s3, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 21\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_8\n; %bb.7:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 19\n\tv_readlane_b32 s1, v26, 20\n\tscratch_load_b32 v2, off, s33 offset:96 ; 4-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v0\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[3:4], s2, v5, s3, 0\n\tv_mov_b32_e32 v9, v4\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s2\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v5\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[0:1], s2, v[0:1]\n\tv_mov_b32_e32 v5, v0\n\tv_mad_u64_u32 v[0:1], s3, v5, s3, v[9:10]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_lshlrev_b64 v[9:10], s2, v[0:1]\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v4, v3\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n\tv_mov_b32_e32 v3, v9\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v5, v1, v3\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s2, v0, v4\n\tv_add_co_ci_u32_e64 v3, s2, v1, v3, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tglobal_store_b32 v[0:1], v2, off offset:16\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tglobal_store_b64 v[0:1], v[2:3], off offset:8\n\tv_mov_b32_e32 v2, 1\n\tglobal_store_b32 v[0:1], v2, off offset:20\n.LBB3_8:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[2:3], off, s33 offset:84 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:76 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:68 ; 8-byte Folded Reload\n\tscratch_load_b64 v[8:9], off, s33 offset:60 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:52 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[14:15], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[16:17], off, s33 offset:28 ; 8-byte Folded Reload\n\tscratch_load_b64 v[22:23], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:24 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v18, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\ts_mov_b32 s0, 6\n\ts_waitcnt vmcnt(0)\n\tv_lshlrev_b64 v[20:21], s0, v[0:1]\n\tv_mov_b32_e32 v0, v22\n\tv_mov_b32_e32 v19, v20\n\tv_mov_b32_e32 v1, v23\n\tv_mov_b32_e32 v18, v21\n\tv_add_co_u32 v0, s0, v0, v19\n\tv_add_co_ci_u32_e64 v18, s0, v1, v18, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\tscratch_store_b64 off, v[0:1], s33 offset:216 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_mov_b64 s[4:5], 8\n\tv_mov_b32_e32 v16, v0\n\ts_mov_b32 s2, s4\n\tv_mov_b32_e32 v17, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v16, s2, v16, s2\n\tv_add_co_ci_u32_e64 v18, s0, v17, s0, s2\n ; kill: def $vgpr16 killed $vgpr16 def $vgpr16_vgpr17 killed $exec\n\tv_mov_b32_e32 v17, v18\n\tscratch_store_b64 off, v[16:17], s33 offset:208 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[14:15], off offset:8\n\tglobal_store_b64 v[0:1], v[12:13], off offset:16\n\tglobal_store_b64 v[0:1], v[10:11], off offset:24\n\tglobal_store_b64 v[0:1], v[8:9], off offset:32\n\tglobal_store_b64 v[0:1], v[6:7], off offset:40\n\tglobal_store_b64 v[0:1], v[4:5], off offset:48\n\tglobal_store_b64 v[0:1], v[2:3], off offset:56\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 22\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_13\n; %bb.9:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[5:6], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_mov_b64 s[4:5], 32\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:240 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:32 glc\n\ts_waitcnt vmcnt(1)\n\tglobal_load_b64 v[7:8], v[7:8], off\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v8\n\tv_and_b32_e64 v4, v4, s0\n\ts_mov_b32 s1, s2\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n\tv_and_b32_e64 v7, v7, s1\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v4, v7\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[9:10], s2, v4, s3, 0\n\tv_mov_b32_e32 v11, v10\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[7:8], s3, v4, s3, v[11:12]\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s3\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_lshlrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v11, v8\n ; kill: def $vgpr9 killed $vgpr9 killed $vgpr9_vgpr10 killed $exec\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v4, v10\n\tv_or_b32_e64 v4, v4, v11\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v7, v9\n\tv_or_b32_e64 v8, v7, v8\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v8\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v9\n\tv_add_co_u32 v4, s2, v4, v7\n\tv_add_co_ci_u32_e64 v6, s2, v5, v6, s2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:232 ; 8-byte Folded Spill\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v10, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 23\n\tv_writelane_b32 v26, s0, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 25\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_14\n.LBB3_10: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 24\n\tv_readlane_b32 s1, v26, 23\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[2:3], off, s33 offset:224 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:240 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:232 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s1, s3\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v10, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v26, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 26\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_10\n; %bb.11:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_branch .LBB3_14\n.LBB3_13:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB3_15\n.LBB3_14:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s15, v26, 2\n\tv_readlane_b32 s14, v26, 3\n\tv_readlane_b32 s13, v26, 4\n\tv_readlane_b32 s12, v26, 5\n\tv_readlane_b32 s10, v26, 6\n\tv_readlane_b32 s11, v26, 7\n\tv_readlane_b32 s8, v26, 8\n\tv_readlane_b32 s9, v26, 9\n\tv_readlane_b32 s6, v26, 0\n\tv_readlane_b32 s7, v26, 1\n\tv_readlane_b32 s4, v26, 10\n\tv_readlane_b32 s5, v26, 11\n\tscratch_load_b32 v31, off, s33 offset:132 ; 4-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hsa_signal_add@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hsa_signal_add@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v3, 0\n\tv_mov_b32_e32 v4, 3\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_branch .LBB3_13\n.LBB3_15:\n\tscratch_load_b64 v[6:7], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[3:4], s0, v2, s1, 0\n\tv_mov_b32_e32 v8, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[0:1]\n\tv_mov_b32_e32 v2, v0\n\tv_mad_u64_u32 v[0:1], s1, v2, s1, v[8:9]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\tv_mov_b32_e32 v5, v2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_mov_b32_e32 v0, v4\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v1, v3\n\tv_or_b32_e64 v4, v1, v2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v1, s0, v1, v3\n\tv_add_co_ci_u32_e64 v0, s0, v0, v2, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[2:3], 20\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:248 ; 8-byte Folded Spill\n.LBB3_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 27\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_18\n; %bb.17: ; in Loop: Header=BB3_16 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:248 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 1\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n.LBB3_18: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s33 offset:256 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s1, v0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0\n\ts_cmp_eq_u32 s1, s2\n\tv_writelane_b32 v26, s0, 28\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_cbranch_scc1 .LBB3_20\n; %bb.19: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_sleep 1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v26, s0, 28\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n.LBB3_20: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 28\n\tv_cndmask_b32_e64 v0, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v0, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccnz .LBB3_16\n; %bb.21:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:208 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:216 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:268 ; 8-byte Folded Spill\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:260 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 29\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_27\n; %bb.22:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[11:12], v[2:3], off\n\ts_mov_b64 s[4:5], 1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v11\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v12\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v4, v2\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v3\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_eq_u64_e64 s0, v[4:5], s[0:1]\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v5\n\tv_cndmask_b32_e64 v10, v6, v7, s0\n\tv_mov_b32_e32 v3, v2\n\tv_mov_b32_e32 v2, v4\n\tv_cndmask_b32_e64 v4, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v2, v8\n\tv_mov_b32_e32 v3, v9\n\tscratch_store_b64 off, v[2:3], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 24\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v5, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v5\n\tscratch_store_b64 off, v[2:3], s33 offset:292 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\tglobal_load_b64 v[6:7], v[0:1], off\n\tv_mov_b32_e32 v5, v9\n\tv_mov_b32_e32 v13, v12\n\tv_and_b32_e64 v5, v5, v13\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v11\n\tv_and_b32_e64 v8, v8, v9\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[11:12], s0, v5, s1, 0\n\tv_mov_b32_e32 v13, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\tv_mov_b32_e32 v14, v5\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v5, v8\n\tv_mad_u64_u32 v[8:9], s1, v5, s1, v[13:14]\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s1\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_lshlrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v13, v9\n ; kill: def $vgpr11 killed $vgpr11 killed $vgpr11_vgpr12 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\tv_mov_b32_e32 v5, v12\n\tv_or_b32_e64 v5, v5, v13\n\tv_mov_b32_e32 v9, v8\n\tv_mov_b32_e32 v8, v11\n\tv_or_b32_e64 v11, v8, v9\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v8, v11\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v7, v12\n\tv_add_co_u32 v5, s0, v5, v8\n\tv_add_co_ci_u32_e64 v7, s0, v6, v7, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[5:6], s33 offset:284 ; 8-byte Folded Spill\n\tglobal_store_b64 v[5:6], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 30\n\tv_writelane_b32 v26, s0, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s0, 0\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_26\n.LBB3_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v25, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v25, 31\n\tv_readlane_b32 s1, v25, 30\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[2:3], off, s33 offset:276 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:300 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:284 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[6:7], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v10, v5\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v25, s1, 30\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v25, s1, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v25, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_23\n; %bb.24:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.25:\n.LBB3_26:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 0\n\ts_or_b32 exec_lo, exec_lo, s0\n.LBB3_27:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[3:4], off, s33 offset:260 ; 8-byte Folded Reload\n\tscratch_load_b64 v[1:2], off, s33 offset:268 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v4\n\tv_readlane_b32 s30, v24, 0\n\tv_readlane_b32 s31, v24, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v24, off, s33 offset:308 ; 4-byte Folded Reload\n\tscratch_load_b32 v25, off, s33 offset:312 ; 4-byte Folded Reload\n\tscratch_load_b32 v26, off, s33 offset:316 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffeb0\n\ts_mov_b32 s33, s18\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end3:\n\t.size\t__ockl_hostcall_internal, .Lfunc_end3-__ockl_hostcall_internal\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 5344\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 392\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_preview\n\t.type\t__ockl_hostcall_preview,@function\n__ockl_hostcall_preview: ; @__ockl_hostcall_preview\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v27, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_writelane_b32 v27, s33, 0\n\tv_writelane_b32 v27, s30, 1\n\tv_writelane_b32 v27, s31, 2\n\tv_mov_b32_e32 v18, v16\n\tv_mov_b32_e32 v17, v15\n\tv_mov_b32_e32 v16, v14\n\tv_mov_b32_e32 v15, v13\n\tv_mov_b32_e32 v14, v12\n\tv_mov_b32_e32 v13, v11\n\tv_mov_b32_e32 v12, v10\n\tv_mov_b32_e32 v11, v9\n\tv_mov_b32_e32 v10, v8\n\tv_mov_b32_e32 v9, v7\n\tv_mov_b32_e32 v8, v6\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s0, s[0:1], 0x0\n\ts_mov_b32 s1, 0x1f4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s0, s1\n\ts_mov_b32 s1, 0x50\n\ts_mov_b32 s0, 24\n\ts_cselect_b32 s0, s0, s1\n\ts_load_b64 s[0:1], s[8:9], s0 offset:0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_internal@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_internal@rel32@hi+12\n\tv_mov_b32_e32 v0, s3\n\tv_mov_b32_e32 v1, s2\n\tv_readlane_b32 s30, v27, 1\n\tv_readlane_b32 s31, v27, 2\n\tv_readlane_b32 s33, v27, 0\n\ts_xor_saveexec_b32 s2, -1\n\tscratch_load_b32 v27, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s2\n\ts_setpc_b64 s[0:1]\n.Lfunc_end4:\n\t.size\t__ockl_hostcall_preview, .Lfunc_end4-__ockl_hostcall_preview\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 272\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 400\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_stderr_begin\n\t.type\t__ockl_fprintf_stderr_begin,@function\n__ockl_fprintf_stderr_begin: ; @__ockl_fprintf_stderr_begin\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v1, 33\n\tv_mov_b32_e32 v3, 1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v2, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end5:\n\t.size\t__ockl_fprintf_stderr_begin, .Lfunc_end5-__ockl_fprintf_stderr_begin\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 228\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 416\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_string_n\n\t.type\t__ockl_fprintf_append_string_n,@function\n__ockl_fprintf_append_string_n: ; @__ockl_fprintf_append_string_n\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s20, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v32, s33 offset:704 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v33, s33 offset:708 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v34, s33 offset:712 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x2d0\n\tv_writelane_b32 v32, s30, 0\n\tv_writelane_b32 v32, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:68 ; 4-byte Folded Spill\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s6, 0\n\tv_writelane_b32 v34, s7, 1\n\tscratch_store_b32 off, v6, s33 offset:60 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v5, s33 offset:56 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v4, s33 offset:64 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v6, v3\n\tscratch_load_b32 v3, off, s33 offset:64 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v2\n\tscratch_load_b32 v2, off, s33 offset:60 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v4, s33 offset:52 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v7, v1\n\tscratch_load_b32 v1, off, s33 offset:56 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v5, v0\n\tscratch_load_b32 v0, off, s33 offset:52 ; 4-byte Folded Reload\n\tv_writelane_b32 v34, s15, 2\n\tv_writelane_b32 v34, s14, 3\n\tv_writelane_b32 v34, s13, 4\n\tv_writelane_b32 v34, s12, 5\n\tv_writelane_b32 v34, s10, 6\n\tv_writelane_b32 v34, s11, 7\n\tv_writelane_b32 v34, s8, 8\n\tv_writelane_b32 v34, s9, 9\n\tv_writelane_b32 v34, s4, 10\n\tv_writelane_b32 v34, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[3:4], s33 offset:44 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b64 off, v[3:4], s33 offset:36 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\tv_cmp_eq_u32_e64 s0, v2, s0\n\tv_mov_b32_e32 v4, v6\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v2, v4, s1\n\tv_mov_b32_e32 v3, v5\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v5, v3, s1\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v2, v6\n\tv_cndmask_b32_e64 v4, v2, v4, s0\n\tv_mov_b32_e32 v2, v5\n\tv_cndmask_b32_e64 v2, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:28 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s0, v[0:1], s[0:1]\n ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr7\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tv_mov_b32_e32 v2, s6\n\tv_mov_b32_e32 v3, s7\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_3\n\ts_branch .LBB6_2\n.LBB6_1:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v34, 2\n\tv_readlane_b32 s14, v34, 3\n\tv_readlane_b32 s13, v34, 4\n\tv_readlane_b32 s12, v34, 5\n\tv_readlane_b32 s10, v34, 6\n\tv_readlane_b32 s11, v34, 7\n\tv_readlane_b32 s8, v34, 8\n\tv_readlane_b32 s9, v34, 9\n\tv_readlane_b32 s6, v34, 0\n\tv_readlane_b32 s7, v34, 1\n\tv_readlane_b32 s4, v34, 10\n\tv_readlane_b32 s5, v34, 11\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v3\n\tv_and_b32_e64 v4, v0, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v1\n\ts_mov_b64 s[0:1], 32\n\ts_mov_b32 s2, s1\n\tv_or_b32_e64 v4, v4, s2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_or_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v16, 0\n\tscratch_store_b32 off, v16, s33 offset:88 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_mov_b32_e32 v6, v1\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v4, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v2, v5\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_branch .LBB6_63\n.LBB6_2:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b64 v[4:5], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b64 s[0:1], 2\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v8, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v2, v0, s0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v8\n\tscratch_store_b64 off, v[2:3], s33 offset:124 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], -3\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v2, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v10, v1\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\ts_mov_b64 s[2:3], 0\n\ts_mov_b32 s0, s3\n\ts_mov_b32 s1, s2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v9, s1\n\tv_mov_b32_e32 v8, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v2, v9\n\tv_mov_b32_e32 v3, v8\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v34, s0, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:92 ; 16-byte Folded Spill\n\ts_branch .LBB6_4\n.LBB6_3:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b128 v[0:3], off, s33 offset:12 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 14\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_63\n\ts_branch .LBB6_1\n.LBB6_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n\ts_branch .LBB10_9\n.LBB10_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB10_12\n.LBB10_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB10_11\n.LBB10_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB10_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB10_7\n.LBB10_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB10_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_local_id, .Lfunc_end10-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z8vect_addPfS_i ; -- Begin function _Z8vect_addPfS_i\n\t.globl\t_Z8vect_addPfS_i\n\t.p2align\t8\n\t.type\t_Z8vect_addPfS_i,@function\n_Z8vect_addPfS_i: ; @_Z8vect_addPfS_i\n; %bb.0:\n\ts_mov_b32 s32, 64\n ; implicit-def: $vgpr9 : SGPR spill to VGPR lane\n\tv_writelane_b32 v9, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v9, 0\n\tv_writelane_b32 v9, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v9, 1\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v9, s2, 2\n\tv_writelane_b32 v9, s3, 3\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v9, 2\n\tv_readlane_b32 s1, v9, 3\n\tv_mov_b32_e32 v31, v0\n\ts_load_b64 s[24:25], s[0:1], 0x0\n\ts_load_b64 s[20:21], s[0:1], 0x8\n\ts_load_b32 s2, s[0:1], 0x10\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s22, 16\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s18, 24\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b32 s16, 32\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v9, s6, 4\n\tv_writelane_b32 v9, s7, 5\n\ts_mov_b32 s8, 40\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v9, s6, 6\n\tv_writelane_b32 v9, s7, 7\n\ts_mov_b32 s6, 48\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\tv_writelane_b32 v9, s6, 8\n\tv_writelane_b32 v9, s7, 9\n\ts_mov_b32 s26, 52\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v9, s26, 10\n\tv_writelane_b32 v9, s27, 11\n\tv_writelane_b32 v9, s26, 12\n\tv_writelane_b32 v9, s27, 13\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s2, v9, 10\n\tv_readlane_b32 s3, v9, 11\n\tv_readlane_b32 s0, v9, 8\n\tv_readlane_b32 s1, v9, 9\n\tv_mov_b32_e32 v2, v1\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v9, s0, 14\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v9, off offset:56 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_2\n; %bb.1:\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v9, off, off offset:56 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v9, 6\n\tv_readlane_b32 s1, v9, 7\n\tv_readlane_b32 s2, v9, 12\n\tv_readlane_b32 s3, v9, 13\n\tv_readlane_b32 s4, v9, 4\n\tv_readlane_b32 s5, v9, 5\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s2, 2\n\tv_lshlrev_b64 v[7:8], s2, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v7\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v8\n\tv_add_co_u32 v0, s2, v0, v3\n\tv_add_co_ci_u32_e64 v2, s2, v1, v2, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v3, s0\n\tflat_load_b64 v[4:5], v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v8\n\tv_add_co_u32 v3, s0, v3, v6\n\tv_add_co_ci_u32_e64 v5, s0, v4, v5, s0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tflat_load_b32 v3, v[3:4]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_f32_e64 v2, v2, v3\n\tflat_store_b32 v[0:1], v2\n.LBB11_2:\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v9, off, off offset:56 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v9, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z8vect_addPfS_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 108\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 33\n\t\t.amdhsa_reserve_vcc 0\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end11:\n\t.size\t_Z8vect_addPfS_i, .Lfunc_end11-_Z8vect_addPfS_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 904\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 108\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 33\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tthreadIdx\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tthreadIdx\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .offset: 16\n .size: 4\n .value_kind: by_value\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 28\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 36\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 38\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 40\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 42\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 44\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 46\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 88\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 104\n .size: 8\n .value_kind: hidden_hostcall_buffer\n - .offset: 112\n .size: 8\n .value_kind: hidden_multigrid_sync_arg\n - .offset: 120\n .size: 8\n .value_kind: hidden_heap_v1\n - .offset: 128\n .size: 8\n .value_kind: hidden_default_queue\n - .offset: 224\n .size: 8\n .value_kind: hidden_queue_ptr\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 280\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z8vect_addPfS_i\n .private_segment_fixed_size: 108\n .sgpr_count: 33\n .sgpr_spill_count: 15\n .symbol: _Z8vect_addPfS_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 32\n .vgpr_spill_count: 1\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":90,"cells":{"id":{"kind":"string","value":"3891c524934c26cc3d4bf4508612ca8cdefba859_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z9sccKernelPiS_S_S_S_ --------------------------\n .section .text._Z9sccKernelPiS_S_S_S_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=16\"\n .align 128\n\n\n\n\n .global _Z9sccKernelPiS_S_S_S_\n .type _Z9sccKernelPiS_S_S_S_,@function\n .size _Z9sccKernelPiS_S_S_S_,(.L_x_5 - _Z9sccKernelPiS_S_S_S_)\n .other _Z9sccKernelPiS_S_S_S_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z9sccKernelPiS_S_S_S_:\n.text._Z9sccKernelPiS_S_S_S_:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R9, SR_CTAID.X ;\n /*0020*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0030*/ S2R R0, SR_TID.X ;\n /*0040*/ IMAD R9, R9, c[0x0][0x0], R0 ;\n /*0050*/ ISETP.GT.AND P0, PT, R9, 0x1f, PT ;\n /*0060*/ @P0 EXIT ;\n /*0070*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ;\n /*0080*/ IMAD.WIDE R4, R9, R4, c[0x0][0x168] ;\n /*0090*/ LDG.E R0, [R4.64] ;\n /*00a0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ;\n /*00b0*/ @P0 EXIT ;\n /*00c0*/ S2R R3, SR_LANEID ;\n /*00d0*/ VOTEU.ANY UR6, UPT, PT ;\n /*00e0*/ MOV R2, c[0x0][0x180] ;\n /*00f0*/ FLO.U32 R8, UR6 ;\n /*0100*/ POPC R11, UR6 ;\n /*0110*/ ISETP.EQ.U32.AND P0, PT, R8, R3, PT ;\n /*0120*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x184] ;\n /*0130*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R11, [R2.64], R11 ;\n /*0140*/ MOV R13, 0x1 ;\n /*0150*/ S2R R6, SR_LTMASK ;\n /*0160*/ LOP3.LUT R10, R6, UR6, RZ, 0xc0, !PT ;\n /*0170*/ POPC R7, R10 ;\n /*0180*/ SHFL.IDX PT, R0, R11, R8, 0x1f ;\n /*0190*/ IADD3 R0, R0, R7, RZ ;\n /*01a0*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*01b0*/ ISETP.GE.AND P0, PT, R0.reuse, RZ, PT ;\n /*01c0*/ IMAD.WIDE R6, R0, R7, c[0x0][0x178] ;\n /*01d0*/ STG.E [R6.64], R9 ;\n /*01e0*/ STG.E [R4.64], R13 ;\n /*01f0*/ @!P0 EXIT ;\n.L_x_3:\n /*0200*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*0210*/ IMAD.WIDE R4, R0, R7, c[0x0][0x178] ;\n /*0220*/ LDG.E R5, [R4.64] ;\n /*0230*/ LEA R6, R5, R0, 0x5 ;\n /*0240*/ IMAD.WIDE R6, R6, R7, c[0x0][0x160] ;\n /*0250*/ LDG.E R13, [R6.64] ;\n /*0260*/ YIELD ;\n /*0270*/ BSSY B0, `(.L_x_0) ;\n /*0280*/ ISETP.NE.AND P0, PT, R13, -0x1, PT ;\n /*0290*/ @!P0 BRA `(.L_x_1) ;\n /*02a0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ;\n /*02b0*/ IMAD.WIDE R4, R13, R4, c[0x0][0x168] ;\n /*02c0*/ LDG.E R6, [R4.64] ;\n /*02d0*/ ISETP.NE.AND P0, PT, R6, RZ, PT ;\n /*02e0*/ @P0 BRA `(.L_x_1) ;\n /*02f0*/ S2R R9, SR_LANEID ;\n /*0300*/ VOTEU.ANY UR6, UPT, PT ;\n /*0310*/ MOV R11, 0x1 ;\n /*0320*/ FLO.U32 R6, UR6 ;\n /*0330*/ STG.E [R4.64], R11 ;\n /*0340*/ POPC R7, UR6 ;\n /*0350*/ ISETP.EQ.U32.AND P0, PT, R6, R9, PT ;\n /*0360*/ @P0 ATOMG.E.ADD.STRONG.GPU PT, R7, [R2.64], R7 ;\n /*0370*/ MOV R5, 0x4 ;\n /*0380*/ S2R R8, SR_LTMASK ;\n /*0390*/ LOP3.LUT R8, R8, UR6, RZ, 0xc0, !PT ;\n /*03a0*/ POPC R9, R8 ;\n /*03b0*/ SHFL.IDX PT, R0, R7, R6, 0x1f ;\n /*03c0*/ IMAD.IADD R0, R0, 0x1, R9 ;\n /*03d0*/ IMAD.WIDE R4, R0, R5, c[0x0][0x178] ;\n /*03e0*/ STG.E [R4.64], R13 ;\n /*03f0*/ BRA `(.L_x_2) ;\n.L_x_1:\n /*0400*/ IADD3 R0, R0, -0x1, RZ ;\n.L_x_2:\n /*0410*/ BSYNC B0 ;\n.L_x_0:\n /*0420*/ ISETP.GT.AND P0, PT, R0, -0x1, PT ;\n /*0430*/ @P0 BRA `(.L_x_3) ;\n /*0440*/ EXIT ;\n.L_x_4:\n /*0450*/ BRA `(.L_x_4);\n /*0460*/ NOP;\n /*0470*/ NOP;\n /*0480*/ NOP;\n /*0490*/ NOP;\n /*04a0*/ NOP;\n /*04b0*/ NOP;\n /*04c0*/ NOP;\n /*04d0*/ NOP;\n /*04e0*/ NOP;\n /*04f0*/ NOP;\n.L_x_5:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_058039.hip\"\n\t.globl\t_Z24__device_stub__sccKernelPiS_S_S_S_ # -- Begin function _Z24__device_stub__sccKernelPiS_S_S_S_\n\t.p2align\t4, 0x90\n\t.type\t_Z24__device_stub__sccKernelPiS_S_S_S_,@function\n_Z24__device_stub__sccKernelPiS_S_S_S_: # @_Z24__device_stub__sccKernelPiS_S_S_S_\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$136, %rsp\n\t.cfi_def_cfa_offset 144\n\tmovq\t%rdi, 88(%rsp)\n\tmovq\t%rsi, 80(%rsp)\n\tmovq\t%rdx, 72(%rsp)\n\tmovq\t%rcx, 64(%rsp)\n\tmovq\t%r8, 56(%rsp)\n\tleaq\t88(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t80(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 112(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 120(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 128(%rsp)\n\tleaq\t40(%rsp), %rdi\n\tleaq\t24(%rsp), %rsi\n\tleaq\t16(%rsp), %rdx\n\tleaq\t8(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t40(%rsp), %rsi\n\tmovl\t48(%rsp), %edx\n\tmovq\t24(%rsp), %rcx\n\tmovl\t32(%rsp), %r8d\n\tleaq\t96(%rsp), %r9\n\tmovl\t$_Z9sccKernelPiS_S_S_S_, %edi\n\tpushq\t8(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t24(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$152, %rsp\n\t.cfi_adjust_cfa_offset -152\n\tretq\n.Lfunc_end0:\n\t.size\t_Z24__device_stub__sccKernelPiS_S_S_S_, .Lfunc_end0-_Z24__device_stub__sccKernelPiS_S_S_S_\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 32\n\tpushq\t%r13\n\t.cfi_def_cfa_offset 40\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 48\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 56\n\tsubq\t$56, %rsp\n\t.cfi_def_cfa_offset 112\n\t.cfi_offset %rbx, -56\n\t.cfi_offset %r12, -48\n\t.cfi_offset %r13, -40\n\t.cfi_offset %r14, -32\n\t.cfi_offset %r15, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t$4096, %edi # imm = 0x1000\n\tcallq\t_Znam\n\tmovq\t%rax, %rbx\n\tmovl\t$128, %edi\n\tcallq\t_Znam\n\tmovq\t%rax, %r14\n\tmovl\t$128, %edi\n\tcallq\t_Znam\n\tmovq\t%rax, %r15\n\tmovl\t$128, %edi\n\tcallq\t_Znam\n\tmovq\t%rax, %r12\n\tmovl\t$0, 12(%rsp)\n\tmovl\t$4096, %edx # imm = 0x1000\n\tmovq\t%rbx, %rdi\n\tmovl\t$255, %esi\n\tcallq\tmemset@PLT\n\tmovl\t$1, 4(%rbx)\n\tmovl\t$2, 136(%rbx)\n\tmovl\t$0, 256(%rbx)\n\tmovl\t$3, 268(%rbx)\n\tmovl\t$4, 400(%rbx)\n\tmovl\t$5, 532(%rbx)\n\tmovl\t$3, 652(%rbx)\n\tpxor\t%xmm0, %xmm0\n\tmovdqu\t%xmm0, (%r14)\n\tmovdqu\t%xmm0, 16(%r14)\n\tmovdqu\t%xmm0, 32(%r14)\n\tmovdqu\t%xmm0, 48(%r14)\n\tmovdqu\t%xmm0, 64(%r14)\n\tmovdqu\t%xmm0, 80(%r14)\n\tmovdqu\t%xmm0, 96(%r14)\n\tmovdqu\t%xmm0, 112(%r14)\n\tpcmpeqd\t%xmm0, %xmm0\n\tmovdqu\t%xmm0, 112(%r15)\n\tmovdqu\t%xmm0, 96(%r15)\n\tmovdqu\t%xmm0, 80(%r15)\n\tmovdqu\t%xmm0, 64(%r15)\n\tmovdqu\t%xmm0, 48(%r15)\n\tmovdqu\t%xmm0, 32(%r15)\n\tmovdqu\t%xmm0, 16(%r15)\n\tmovdqu\t%xmm0, (%r15)\n\tleaq\t48(%rsp), %rdi\n\tmovl\t$4096, %esi # imm = 0x1000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_6\n# %bb.1:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n.LBB1_2:\n\tmovl\t$26, %edx\n\tjmp\t.LBB1_3\n.LBB1_6:\n\tleaq\t40(%rsp), %rdi\n\tmovl\t$128, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_9\n# %bb.7:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$28, %edx\n.LBB1_3:\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_8\n# %bb.4:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_13\n# %bb.5:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_14\n.LBB1_13:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_14:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n.LBB1_15:\n\tmovl\t$-1, %eax\n.LBB1_16:\n\taddq\t$56, %rsp\n\t.cfi_def_cfa_offset 56\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 48\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 40\n\tpopq\t%r13\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_9:\n\t.cfi_def_cfa_offset 112\n\tleaq\t32(%rsp), %rdi\n\tmovl\t$128, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_11\n# %bb.10:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tjmp\t.LBB1_2\n.LBB1_11:\n\tleaq\t24(%rsp), %rdi\n\tmovl\t$128, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_17\n# %bb.12:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tjmp\t.LBB1_2\n.LBB1_17:\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$4, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_19\n# %bb.18:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$29, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_15\n.LBB1_19:\n\tmovq\t48(%rsp), %rdi\n\tmovl\t$4096, %edx # imm = 0x1000\n\tmovq\t%rbx, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovq\t40(%rsp), %rdi\n\tmovl\t$128, %edx\n\tmovq\t%r14, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovq\t32(%rsp), %rdi\n\tmovl\t$128, %edx\n\tmovq\t%r15, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovq\t24(%rsp), %rdi\n\tmovl\t$128, %edx\n\tmovq\t%r12, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovq\t16(%rsp), %rdi\n\tleaq\t12(%rsp), %rsi\n\tmovl\t$4, %edx\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\tmovabsq\t$4294967297, %rdi # imm = 0x100000001\n\tleaq\t255(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_21\n# %bb.20:\n\tmovq\t48(%rsp), %rdi\n\tmovq\t40(%rsp), %rsi\n\tmovq\t32(%rsp), %rdx\n\tmovq\t24(%rsp), %rcx\n\tmovq\t16(%rsp), %r8\n\tcallq\t_Z24__device_stub__sccKernelPiS_S_S_S_\n.LBB1_21:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_23\n# %bb.22:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$22, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rax, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_15\n.LBB1_23:\n\tmovq\t40(%rsp), %rsi\n\tmovl\t$128, %edx\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovq\t32(%rsp), %rsi\n\tmovl\t$128, %edx\n\tmovq\t%r15, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovq\t24(%rsp), %rsi\n\tmovl\t$128, %edx\n\tmovq\t%r12, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovq\t16(%rsp), %rsi\n\tleaq\t12(%rsp), %rdi\n\tmovl\t$4, %edx\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$15, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\txorl\t%r13d, %r13d\n.LBB1_24: # =>This Inner Loop Header: Depth=1\n\tmovl\t(%r14,%r13,4), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.7, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tincq\t%r13\n\tcmpq\t$32, %r13\n\tjne\t.LBB1_24\n# %bb.25:\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.8, %esi\n\tmovl\t$7, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tcmpl\t$0, 12(%rsp)\n\tjle\t.LBB1_28\n# %bb.26:\n\txorl\t%r13d, %r13d\n.LBB1_27: # =>This Inner Loop Header: Depth=1\n\tmovl\t(%r12,%r13,4), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.7, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tincq\t%r13\n\tmovslq\t12(%rsp), %rax\n\tcmpq\t%rax, %r13\n\tjl\t.LBB1_27\n.LBB1_28:\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tmovq\t48(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t40(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t32(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t24(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZdaPv\n\tmovq\t%r14, %rdi\n\tcallq\t_ZdaPv\n\tmovq\t%r15, %rdi\n\tcallq\t_ZdaPv\n\tmovq\t%r12, %rdi\n\tcallq\t_ZdaPv\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_16\n.LBB1_8:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_058039.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_058039.hip,@function\n_GLOBAL__sub_I_cuda_code_058039.hip: # @_GLOBAL__sub_I_cuda_code_058039.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_058039.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_058039.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z9sccKernelPiS_S_S_S_, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z9sccKernelPiS_S_S_S_,@object # @_Z9sccKernelPiS_S_S_S_\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z9sccKernelPiS_S_S_S_\n\t.p2align\t3, 0x0\n_Z9sccKernelPiS_S_S_S_:\n\t.quad\t_Z24__device_stub__sccKernelPiS_S_S_S_\n\t.size\t_Z9sccKernelPiS_S_S_S_, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate d_graph\"\n\t.size\t.L.str, 27\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate d_visited\"\n\t.size\t.L.str.1, 29\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to allocate d_sccId\"\n\t.size\t.L.str.2, 27\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Failed to allocate d_stack\"\n\t.size\t.L.str.3, 27\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Failed to allocate d_stackTop\"\n\t.size\t.L.str.4, 30\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.5, 23\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\"Visited nodes: \"\n\t.size\t.L.str.6, 16\n\n\t.type\t.L.str.7,@object # @.str.7\n.L.str.7:\n\t.asciz\t\" \"\n\t.size\t.L.str.7, 2\n\n\t.type\t.L.str.8,@object # @.str.8\n.L.str.8:\n\t.asciz\t\"Stack: \"\n\t.size\t.L.str.8, 8\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z9sccKernelPiS_S_S_S_\"\n\t.size\t.L__unnamed_1, 23\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_058039.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":91,"cells":{"id":{"kind":"string","value":"26f82c69c4ab2de999fc1d81f544972950ec16f9_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z15count_solutionsiPiP5statei --------------------------\n .section .text._Z15count_solutionsiPiP5statei,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=24\"\n .align 128\n\n\n\n\n .global _Z15count_solutionsiPiP5statei\n .type _Z15count_solutionsiPiP5statei,@function\n .size _Z15count_solutionsiPiP5statei,(.L_x_15 - _Z15count_solutionsiPiP5statei)\n .other _Z15count_solutionsiPiP5statei,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z15count_solutionsiPiP5statei:\n.text._Z15count_solutionsiPiP5statei:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ IADD3 R1, R1, -0xc80, RZ ;\n /*0020*/ S2R R0, SR_LMEMHIOFF ;\n /*0030*/ ISETP.GE.U32.AND P0, PT, R1, R0, PT ;\n /*0040*/ @P0 BRA `(.L_x_0) ;\n /*0050*/ BPT.TRAP 0x1 ;\n.L_x_0:\n /*0060*/ MOV R16, c[0x0][0x118] ;\n /*0070*/ MOV R17, c[0x0][0x11c] ;\n /*0080*/ IADD3 R0, R1, RZ, RZ ;\n /*0090*/ MOV R0, R0 ;\n /*00a0*/ MOV R2, R0 ;\n /*00b0*/ MOV R3, RZ ;\n /*00c0*/ MOV R8, R2 ;\n /*00d0*/ MOV R9, R3 ;\n /*00e0*/ MOV R8, R8 ;\n /*00f0*/ MOV R9, R9 ;\n /*0100*/ MOV R0, RZ ;\n /*0110*/ LDC R0, c[0x0][R0+0x160] ;\n /*0120*/ MOV R0, R0 ;\n /*0130*/ MOV R2, 0x8 ;\n /*0140*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0150*/ MOV R10, R2 ;\n /*0160*/ MOV R11, R3 ;\n /*0170*/ MOV R10, R10 ;\n /*0180*/ MOV R11, R11 ;\n /*0190*/ MOV R2, 0x10 ;\n /*01a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*01b0*/ MOV R6, R2 ;\n /*01c0*/ MOV R7, R3 ;\n /*01d0*/ MOV R6, R6 ;\n /*01e0*/ MOV R7, R7 ;\n /*01f0*/ MOV R2, 0x18 ;\n /*0200*/ LDC R2, c[0x0][R2+0x160] ;\n /*0210*/ MOV R2, R2 ;\n /*0220*/ MOV R10, R10 ;\n /*0230*/ MOV R11, R11 ;\n /*0240*/ IADD3 R8, P0, R8, RZ, RZ ;\n /*0250*/ IADD3.X R9, R9, RZ, RZ, P0, !PT ;\n /*0260*/ MOV R3, c[0x0][0x0] ;\n /*0270*/ S2R R4, SR_CTAID.X ;\n /*0280*/ MOV R4, R4 ;\n /*0290*/ S2R R5, SR_TID.X ;\n /*02a0*/ MOV R5, R5 ;\n /*02b0*/ IMAD R4, R4, R3, R5 ;\n /*02c0*/ ISETP.GE.U32.AND P0, PT, R4, R2, PT ;\n /*02d0*/ MOV R0, R0 ;\n /*02e0*/ MOV R6, R6 ;\n /*02f0*/ MOV R7, R7 ;\n /*0300*/ MOV R2, R10 ;\n /*0310*/ MOV R3, R11 ;\n /*0320*/ MOV R8, R8 ;\n /*0330*/ MOV R9, R9 ;\n /*0340*/ MOV R4, R4 ;\n /*0350*/ BSSY B0, `(.L_x_1) ;\n /*0360*/ @P0 BRA `(.L_x_2) ;\n /*0370*/ MOV R6, R6 ;\n /*0380*/ MOV R7, R7 ;\n /*0390*/ IMAD.WIDE.U32 R4, R4, 0x10, RZ ;\n /*03a0*/ MOV R12, R4 ;\n /*03b0*/ MOV R13, R5 ;\n /*03c0*/ IADD3 R12, P0, R6, R12, RZ ;\n /*03d0*/ IADD3.X R13, R7, R13, RZ, P0, !PT ;\n /*03e0*/ MOV R4, R12 ;\n /*03f0*/ MOV R5, R13 ;\n /*0400*/ MOV R4, R4 ;\n /*0410*/ MOV R5, R5 ;\n /*0420*/ R2UR UR4, R16 ;\n /*0430*/ R2UR UR5, R17 ;\n /*0440*/ LDG.E R4, [R4.64] ;\n /*0450*/ IADD3 R6, P0, R12, 0xc, RZ ;\n /*0460*/ IADD3.X R7, R13, RZ, RZ, P0, !PT ;\n /*0470*/ MOV R6, R6 ;\n /*0480*/ MOV R7, R7 ;\n /*0490*/ MOV R6, R6 ;\n /*04a0*/ MOV R7, R7 ;\n /*04b0*/ R2UR UR4, R16 ;\n /*04c0*/ R2UR UR5, R17 ;\n /*04d0*/ LDG.E R7, [R6.64] ;\n /*04e0*/ IADD3 R10, P0, R12, 0x8, RZ ;\n /*04f0*/ IADD3.X R11, R13, RZ, RZ, P0, !PT ;\n /*0500*/ MOV R10, R10 ;\n /*0510*/ MOV R11, R11 ;\n /*0520*/ MOV R10, R10 ;\n /*0530*/ MOV R11, R11 ;\n /*0540*/ R2UR UR4, R16 ;\n /*0550*/ R2UR UR5, R17 ;\n /*0560*/ LDG.E R6, [R10.64] ;\n /*0570*/ IADD3 R10, P0, R12, 0x4, RZ ;\n /*0580*/ IADD3.X R11, R13, RZ, RZ, P0, !PT ;\n /*0590*/ MOV R10, R10 ;\n /*05a0*/ MOV R11, R11 ;\n /*05b0*/ MOV R10, R10 ;\n /*05c0*/ MOV R11, R11 ;\n /*05d0*/ R2UR UR4, R16 ;\n /*05e0*/ R2UR UR5, R17 ;\n /*05f0*/ LDG.E R5, [R10.64] ;\n /*0600*/ MOV R8, R8 ;\n /*0610*/ MOV R9, R9 ;\n /*0620*/ STL.128 [R8], R4 ;\n /*0630*/ ISETP.EQ.AND P0, PT, R0, RZ, PT ;\n /*0640*/ MOV R4, R4 ;\n /*0650*/ @P0 BRA `(.L_x_3) ;\n /*0660*/ MOV R4, 0x1 ;\n /*0670*/ SHF.L.U32 R10, R4, R0, RZ ;\n /*0680*/ MOV R12, R4 ;\n /*0690*/ MOV R10, R10 ;\n.L_x_12:\n /*06a0*/ YIELD ;\n /*06b0*/ IADD3 R12, R12, -0x1, RZ ;\n /*06c0*/ IMAD.WIDE R4, R12, 0x10, RZ ;\n /*06d0*/ MOV R6, R4 ;\n /*06e0*/ MOV R5, R5 ;\n /*06f0*/ IADD3 R4, P0, R8, R6, RZ ;\n /*0700*/ IADD3.X R5, R9, R5, RZ, P0, !PT ;\n /*0710*/ MOV R4, R4 ;\n /*0720*/ MOV R5, R5 ;\n /*0730*/ LDL.128 R4, [R4] ;\n /*0740*/ MOV R4, R4 ;\n /*0750*/ MOV R5, R5 ;\n /*0760*/ MOV R6, R6 ;\n /*0770*/ MOV R7, R7 ;\n /*0780*/ ISETP.EQ.AND P0, PT, R4, R0, PT ;\n /*0790*/ MOV R12, R12 ;\n /*07a0*/ MOV R4, R4 ;\n /*07b0*/ MOV R5, R5 ;\n /*07c0*/ MOV R6, R6 ;\n /*07d0*/ MOV R7, R7 ;\n /*07e0*/ BSSY B1, `(.L_x_4) ;\n /*07f0*/ @P0 BRA `(.L_x_5) ;\n /*0800*/ BRA `(.L_x_6) ;\n.L_x_5:\n /*0810*/ MOV R4, R2 ;\n /*0820*/ MOV R5, R3 ;\n /*0830*/ MOV R4, R4 ;\n /*0840*/ MOV R5, R5 ;\n /*0850*/ MOV R6, 0x1 ;\n /*0860*/ R2UR UR4, R16 ;\n /*0870*/ R2UR UR5, R17 ;\n /*0880*/ RED.E.ADD.STRONG.GPU [R4.64], R6 ;\n /*0890*/ BRA `(.L_x_7) ;\n.L_x_6:\n /*08a0*/ LOP3.LUT R11, R6, R5, RZ, 0xfc, !PT ;\n /*08b0*/ LOP3.LUT R11, R11, R7, RZ, 0xfc, !PT ;\n /*08c0*/ LOP3.LUT R11, RZ, R11, RZ, 0x33, !PT ;\n /*08d0*/ MOV R13, 0x1 ;\n /*08e0*/ MOV R11, R11 ;\n /*08f0*/ MOV R18, R13 ;\n.L_x_11:\n /*0900*/ LOP3.LUT R13, R18, R11, RZ, 0xc0, !PT ;\n /*0910*/ ISETP.EQ.AND P0, PT, R13, RZ, PT ;\n /*0920*/ BSSY B2, `(.L_x_8) ;\n /*0930*/ @P0 BRA `(.L_x_9) ;\n /*0940*/ IADD3 R19, R12, 0x1, RZ ;\n /*0950*/ IMAD.WIDE R12, R12, 0x10, RZ ;\n /*0960*/ MOV R20, R12 ;\n /*0970*/ MOV R21, R13 ;\n /*0980*/ IADD3 R20, P0, R8, R20, RZ ;\n /*0990*/ IADD3.X R21, R9, R21, RZ, P0, !PT ;\n /*09a0*/ LOP3.LUT R13, R18, R5, RZ, 0xfc, !PT ;\n /*09b0*/ LOP3.LUT R15, R18, R7, RZ, 0xfc, !PT ;\n /*09c0*/ LOP3.LUT R14, R18, R6, RZ, 0xfc, !PT ;\n /*09d0*/ SHF.R.S32.HI R15, RZ, 0x1, R15 ;\n /*09e0*/ SHF.L.U32 R13, R13, 0x1, RZ ;\n /*09f0*/ IADD3 R12, R4, 0x1, RZ ;\n /*0a00*/ MOV R20, R20 ;\n /*0a10*/ MOV R21, R21 ;\n /*0a20*/ STL.128 [R20], R12 ;\n /*0a30*/ MOV R19, R19 ;\n /*0a40*/ MOV R12, R19 ;\n.L_x_9:\n /*0a50*/ BSYNC B2 ;\n.L_x_8:\n /*0a60*/ SHF.L.U32 R18, R18, 0x1, RZ ;\n /*0a70*/ ISETP.EQ.AND P0, PT, R18, R10, PT ;\n /*0a80*/ MOV R18, R18 ;\n /*0a90*/ @P0 BRA `(.L_x_10) ;\n /*0aa0*/ BRA `(.L_x_11) ;\n.L_x_10:\n /*0ab0*/ BRA `(.L_x_7) ;\n.L_x_7:\n /*0ac0*/ BSYNC B1 ;\n.L_x_4:\n /*0ad0*/ ISETP.GT.AND P0, PT, R12, RZ, PT ;\n /*0ae0*/ @P0 BRA `(.L_x_12) ;\n.L_x_2:\n /*0af0*/ BRA `(.L_x_13) ;\n.L_x_3:\n /*0b00*/ ISETP.NE.AND P0, PT, R4, RZ, PT ;\n /*0b10*/ @P0 BRA `(.L_x_13) ;\n /*0b20*/ MOV R2, R2 ;\n /*0b30*/ MOV R3, R3 ;\n /*0b40*/ MOV R2, R2 ;\n /*0b50*/ MOV R3, R3 ;\n /*0b60*/ MOV R0, 0x1 ;\n /*0b70*/ R2UR UR4, R16 ;\n /*0b80*/ R2UR UR5, R17 ;\n /*0b90*/ RED.E.ADD.STRONG.GPU [R2.64], R0 ;\n /*0ba0*/ BRA `(.L_x_13) ;\n.L_x_13:\n /*0bb0*/ BSYNC B0 ;\n.L_x_1:\n /*0bc0*/ EXIT ;\n.L_x_14:\n /*0bd0*/ BRA `(.L_x_14);\n /*0be0*/ NOP;\n /*0bf0*/ NOP;\n /*0c00*/ NOP;\n /*0c10*/ NOP;\n /*0c20*/ NOP;\n /*0c30*/ NOP;\n /*0c40*/ NOP;\n /*0c50*/ NOP;\n /*0c60*/ NOP;\n /*0c70*/ NOP;\n.L_x_15:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z15count_solutionsiPiP5statei ; -- Begin function _Z15count_solutionsiPiP5statei\n\t.globl\t_Z15count_solutionsiPiP5statei\n\t.p2align\t8\n\t.type\t_Z15count_solutionsiPiP5statei,@function\n_Z15count_solutionsiPiP5statei: ; @_Z15count_solutionsiPiP5statei\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s2, s[0:1], 0x2c\n\ts_load_b32 s3, s[0:1], 0x18\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s2, s2, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[7:8], null, s15, s2, v[0:1]\n\ts_mov_b32 s2, exec_lo\n\tv_cmpx_gt_u32_e64 s3, v7\n\ts_cbranch_execz .LBB0_14\n; %bb.1:\n\ts_load_b128 s[4:7], s[0:1], 0x8\n\tv_mov_b32_e32 v8, 0\n\ts_load_b32 s0, s[0:1], 0x0\n\tv_add_nc_u32_e64 v9, 16, -16\n\tv_mov_b32_e32 v4, 1\n\ts_mov_b32 s3, 0\n\tv_lshlrev_b64 v[0:1], 4, v[7:8]\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, s6, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s7, v1, vcc_lo\n\ts_lshl_b32 s1, 1, s0\n\ts_cmp_lg_u32 s0, 0\n\ts_cselect_b32 s2, -1, 0\n\tglobal_load_b128 v[0:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], off offset:16\n\ts_branch .LBB0_4\n.LBB0_2: ; in Loop: Header=BB0_4 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s7\n\tv_mov_b32_e32 v4, v10\n.LBB0_3: ; in Loop: Header=BB0_4 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\tv_cmp_gt_i32_e32 vcc_lo, 1, v4\n\ts_or_b32 s3, vcc_lo, s3\n\ts_and_not1_b32 exec_lo, exec_lo, s3\n\ts_cbranch_execz .LBB0_14\n.LBB0_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_8 Depth 2\n\tv_lshl_add_u32 v0, v4, 4, v9\n\tv_add_nc_u32_e32 v10, -1, v4\n\ts_mov_b32 s6, exec_lo\n ; implicit-def: $vgpr4\n\tscratch_load_b128 v[0:3], v0, off\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u32_e64 s0, v0\n\ts_xor_b32 s6, exec_lo, s6\n\ts_cbranch_execz .LBB0_11\n; %bb.5: ; in Loop: Header=BB0_4 Depth=1\n\ts_and_not1_b32 vcc_lo, exec_lo, s2\n\ts_cbranch_vccnz .LBB0_10\n; %bb.6: ; in Loop: Header=BB0_4 Depth=1\n\tv_or3_b32 v4, v2, v1, v3\n\ts_mov_b32 s7, 1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_not_b32_e32 v11, v4\n\tv_add_nc_u32_e32 v4, 1, v0\n\ts_branch .LBB0_8\n\t.p2align\t6\n.LBB0_7: ; in Loop: Header=BB0_8 Depth=2\n\ts_or_b32 exec_lo, exec_lo, s8\n\ts_lshl_b32 s7, s7, 1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_cmp_lg_u32 s7, s1\n\ts_cbranch_scc0 .LBB0_10\n.LBB0_8: ; Parent Loop BB0_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v0, s7, v11\n\ts_mov_b32 s8, exec_lo\n\tv_cmpx_ne_u32_e32 0, v0\n\ts_cbranch_execz .LBB0_7\n; %bb.9: ; in Loop: Header=BB0_8 Depth=2\n\tv_or_b32_e32 v0, s7, v1\n\tv_or_b32_e32 v7, s7, v3\n\tv_add_nc_u32_e32 v12, 1, v10\n\tv_lshl_add_u32 v13, v10, 4, 16\n\tv_or_b32_e32 v6, s7, v2\n\tv_lshlrev_b32_e32 v5, 1, v0\n\tv_ashrrev_i32_e32 v7, 1, v7\n\tv_mov_b32_e32 v10, v12\n\tscratch_store_b128 v13, v[4:7], off\n\ts_branch .LBB0_7\n.LBB0_10: ; in Loop: Header=BB0_4 Depth=1\n\tv_mov_b32_e32 v4, v10\n ; implicit-def: $vgpr10\n.LBB0_11: ; in Loop: Header=BB0_4 Depth=1\n\ts_and_not1_saveexec_b32 s6, s6\n\ts_cbranch_execz .LBB0_3\n; %bb.12: ; in Loop: Header=BB0_4 Depth=1\n\ts_mov_b32 s8, exec_lo\n\ts_mov_b32 s7, exec_lo\n\tv_mbcnt_lo_u32_b32 v0, s8, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_eq_u32_e32 0, v0\n\ts_cbranch_execz .LBB0_2\n; %bb.13: ; in Loop: Header=BB0_4 Depth=1\n\ts_bcnt1_i32_b32 s8, s8\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_mov_b32_e32 v0, s8\n\tglobal_atomic_add_u32 v8, v0, s[4:5]\n\ts_branch .LBB0_2\n.LBB0_14:\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z15count_solutionsiPiP5statei\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 3216\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 14\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z15count_solutionsiPiP5statei, .Lfunc_end0-_Z15count_solutionsiPiP5statei\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 428\n; NumSgprs: 18\n; NumVgprs: 14\n; ScratchSize: 3216\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 1\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 14\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .offset: 0\n .size: 4\n .value_kind: by_value\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z15count_solutionsiPiP5statei\n .private_segment_fixed_size: 3216\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z15count_solutionsiPiP5statei.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 14\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":92,"cells":{"id":{"kind":"string","value":"594cdd39a2bd1d3008bafb7a66ffd0131be122c5_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z12traverseTreeP8TreeNodePii --------------------------\n .section .text._Z12traverseTreeP8TreeNodePii,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=12\"\n .align 128\n\n\n\n\n .global _Z12traverseTreeP8TreeNodePii\n .type _Z12traverseTreeP8TreeNodePii,@function\n .size _Z12traverseTreeP8TreeNodePii,(.L_x_3 - _Z12traverseTreeP8TreeNodePii)\n .other _Z12traverseTreeP8TreeNodePii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z12traverseTreeP8TreeNodePii:\n.text._Z12traverseTreeP8TreeNodePii:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R0, SR_CTAID.X ;\n /*0020*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0030*/ BSSY B0, `(.L_x_0) ;\n /*0040*/ S2R R3, SR_TID.X ;\n /*0050*/ IMAD R0, R0, c[0x0][0x0], R3 ;\n /*0060*/ IMAD R4, R0.reuse, 0xc, RZ ;\n /*0070*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x170], PT ;\n /*0080*/ @P0 BRA `(.L_x_1) ;\n /*0090*/ MOV R3, 0xc ;\n /*00a0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x160] ;\n /*00b0*/ LDG.E R5, [R2.64] ;\n /*00c0*/ LDG.E R7, [R2.64+0x4] ;\n /*00d0*/ LDG.E R9, [R2.64+0x8] ;\n /*00e0*/ STS [R4], R5 ;\n /*00f0*/ STS [R4+0x4], R7 ;\n /*0100*/ STS [R4+0x8], R9 ;\n.L_x_1:\n /*0110*/ BSYNC B0 ;\n.L_x_0:\n /*0120*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0130*/ @P0 EXIT ;\n /*0140*/ LDS R2, [R4+0x4] ;\n /*0150*/ MOV R3, 0x4 ;\n /*0160*/ LDS R5, [R4+0x8] ;\n /*0170*/ LDS R9, [R4] ;\n /*0180*/ ISETP.NE.AND P0, PT, R2, -0x1, PT ;\n /*0190*/ @P0 IMAD R6, R2, 0xc, RZ ;\n /*01a0*/ IMAD.WIDE R2, R0, R3, c[0x0][0x168] ;\n /*01b0*/ @P0 LDS R7, [R6] ;\n /*01c0*/ @P0 STG.E [R2.64], R7 ;\n /*01d0*/ ISETP.NE.AND P0, PT, R5, -0x1, PT ;\n /*01e0*/ STG.E [R2.64], R9 ;\n /*01f0*/ @!P0 EXIT ;\n /*0200*/ IMAD R5, R5, 0xc, RZ ;\n /*0210*/ LDS R5, [R5] ;\n /*0220*/ STG.E [R2.64], R5 ;\n /*0230*/ EXIT ;\n.L_x_2:\n /*0240*/ BRA `(.L_x_2);\n /*0250*/ NOP;\n /*0260*/ NOP;\n /*0270*/ NOP;\n /*0280*/ NOP;\n /*0290*/ NOP;\n /*02a0*/ NOP;\n /*02b0*/ NOP;\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n.L_x_3:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_011837.hip\"\n\t.globl\t_Z27__device_stub__traverseTreeP8TreeNodePii # -- Begin function _Z27__device_stub__traverseTreeP8TreeNodePii\n\t.p2align\t4, 0x90\n\t.type\t_Z27__device_stub__traverseTreeP8TreeNodePii,@function\n_Z27__device_stub__traverseTreeP8TreeNodePii: # @_Z27__device_stub__traverseTreeP8TreeNodePii\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$104, %rsp\n\t.cfi_def_cfa_offset 112\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovl\t%edx, 12(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t12(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t48(%rsp), %rdi\n\tleaq\t32(%rsp), %rsi\n\tleaq\t24(%rsp), %rdx\n\tleaq\t16(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t48(%rsp), %rsi\n\tmovl\t56(%rsp), %edx\n\tmovq\t32(%rsp), %rcx\n\tmovl\t40(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z12traverseTreeP8TreeNodePii, %edi\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$120, %rsp\n\t.cfi_adjust_cfa_offset -120\n\tretq\n.Lfunc_end0:\n\t.size\t_Z27__device_stub__traverseTreeP8TreeNodePii, .Lfunc_end0-_Z27__device_stub__traverseTreeP8TreeNodePii\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 16\n\tsubq\t$32784, %rsp # imm = 0x8010\n\t.cfi_def_cfa_offset 32800\n\t.cfi_offset %rbx, -16\n\tleaq\t8216(%rsp), %rax\n\txorl\t%ecx, %ecx\n\tmovl\t$-1, %edx\n\txorl\t%esi, %esi\n\t.p2align\t4, 0x90\n.LBB1_1: # =>This Inner Loop Header: Depth=1\n\tmovl\t%esi, -8(%rax)\n\tleaq\t1(%rcx), %rdi\n\tcmpq\t$2048, %rdi # imm = 0x800\n\tcmovael\t%edx, %edi\n\tmovl\t%edi, -4(%rax)\n\taddq\t$2, %rcx\n\tcmpq\t$1023, %rsi # imm = 0x3FF\n\tmovl\t%ecx, %edi\n\tcmovael\t%edx, %edi\n\tmovl\t%edi, (%rax)\n\tincq\t%rsi\n\taddq\t$12, %rax\n\tcmpq\t$4096, %rcx # imm = 0x1000\n\tjne\t.LBB1_1\n# %bb.2:\n\tmovq\t%rsp, %rdi\n\tmovl\t$24576, %esi # imm = 0x6000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_5\n# %bb.3:\n\tmovl\t%eax, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n\tmovl\t$43, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_8\n# %bb.4:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_9\n.LBB1_5:\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_14\n# %bb.6:\n\tmovl\t%eax, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$45, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_17\n# %bb.7:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_18\n.LBB1_8:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_9:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_45\n# %bb.10:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_12\n# %bb.11:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_13\n.LBB1_12:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_13:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tjmp\t.LBB1_42\n.LBB1_14:\n\tmovq\t(%rsp), %rdi\n\tleaq\t8208(%rsp), %rsi\n\tmovl\t$24576, %edx # imm = 0x6000\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_23\n# %bb.15:\n\tmovl\t%eax, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tmovl\t$31, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_28\n# %bb.16:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_29\n.LBB1_17:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_18:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_45\n# %bb.19:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_21\n# %bb.20:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_22\n.LBB1_21:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_22:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t(%rsp), %rdi\n\tjmp\t.LBB1_41\n.LBB1_23:\n\tmovabsq\t$4294967304, %rdi # imm = 0x100000008\n\tleaq\t248(%rdi), %rdx\n\tmovl\t$24576, %r8d # imm = 0x6000\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_25\n# %bb.24:\n\tmovq\t(%rsp), %rdi\n\tmovq\t8(%rsp), %rsi\n\tmovl\t$2048, %edx # imm = 0x800\n\tcallq\t_Z27__device_stub__traverseTreeP8TreeNodePii\n.LBB1_25:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_32\n# %bb.26:\n\tmovl\t%eax, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tmovl\t$22, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_34\n# %bb.27:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_35\n.LBB1_28:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_29:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_45\n# %bb.30:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_38\n.LBB1_31:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_39\n.LBB1_32:\n\tmovq\t8(%rsp), %rsi\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$8192, %edx # imm = 0x2000\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_44\n# %bb.33:\n\tmovl\t%eax, %ebx\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$31, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebx, %edi\n\tcallq\thipGetErrorString\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rax, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_40\n.LBB1_34:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_35:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_45\n# %bb.36:\n\tcmpb\t$0, 56(%rbx)\n\tjne\t.LBB1_31\n.LBB1_38:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_39:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n.LBB1_40:\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n.LBB1_41:\n\tcallq\thipFree\n.LBB1_42:\n\tmovl\t$-1, %eax\n.LBB1_43:\n\taddq\t$32784, %rsp # imm = 0x8010\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_44:\n\t.cfi_def_cfa_offset 32800\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$18, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t16(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t20(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t24(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t28(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t32(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t36(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t40(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t44(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t48(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t52(%rsp), %esi\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZNSolsEi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$1, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_43\n.LBB1_45:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_011837.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_011837.hip,@function\n_GLOBAL__sub_I_cuda_code_011837.hip: # @_GLOBAL__sub_I_cuda_code_011837.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_011837.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_011837.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z12traverseTreeP8TreeNodePii, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z12traverseTreeP8TreeNodePii,@object # @_Z12traverseTreeP8TreeNodePii\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z12traverseTreeP8TreeNodePii\n\t.p2align\t3, 0x0\n_Z12traverseTreeP8TreeNodePii:\n\t.quad\t_Z27__device_stub__traverseTreeP8TreeNodePii\n\t.size\t_Z12traverseTreeP8TreeNodePii, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate device memory for tree: \"\n\t.size\t.L.str, 44\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate device memory for result: \"\n\t.size\t.L.str.1, 46\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to copy tree to device: \"\n\t.size\t.L.str.2, 32\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.3, 23\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Failed to copy result to host: \"\n\t.size\t.L.str.4, 32\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"First 10 results: \"\n\t.size\t.L.str.5, 19\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\" \"\n\t.size\t.L.str.6, 2\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z12traverseTreeP8TreeNodePii\"\n\t.size\t.L__unnamed_1, 30\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_011837.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":93,"cells":{"id":{"kind":"string","value":"73602a2f08c42651f72a372b80036f87e42d0080_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z17sobelFilterKernelPfS_ii --------------------------\n .section .text._Z17sobelFilterKernelPfS_ii,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=18\"\n .align 128\n\n\n\n\n .global _Z17sobelFilterKernelPfS_ii\n .type _Z17sobelFilterKernelPfS_ii,@function\n .size _Z17sobelFilterKernelPfS_ii,(.L_x_6 - _Z17sobelFilterKernelPfS_ii)\n .other _Z17sobelFilterKernelPfS_ii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z17sobelFilterKernelPfS_ii:\n.text._Z17sobelFilterKernelPfS_ii:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R2, SR_CTAID.Y ;\n /*0020*/ ULDC.64 UR8, c[0x0][0x118] ;\n /*0030*/ S2R R7, SR_TID.Y ;\n /*0040*/ S2R R3, SR_CTAID.X ;\n /*0050*/ S2R R0, SR_TID.X ;\n /*0060*/ UMOV UR5, 0x5 ;\n /*0070*/ ULDC.64 UR6, c[0x0][0x0] ;\n /*0080*/ IMAD R2, R2, c[0x0][0x4], R7 ;\n /*0090*/ ISETP.GE.AND P0, PT, R2, c[0x0][0x174], PT ;\n /*00a0*/ IMAD R3, R3, c[0x0][0x0], R0 ;\n /*00b0*/ ISETP.LT.AND P0, PT, R3, c[0x0][0x170], !P0 ;\n /*00c0*/ @P0 MOV R5, 0x4 ;\n /*00d0*/ @P0 IMAD R4, R2, c[0x0][0x170], R3 ;\n /*00e0*/ @P0 IMAD.WIDE R4, R4, R5, c[0x0][0x160] ;\n /*00f0*/ @P0 LDG.E R4, [R4.64] ;\n /*0100*/ IMAD R15, R7, 0xb, R0 ;\n /*0110*/ UIADD3 UR4, -UR5, UR6, URZ ;\n /*0120*/ STS [R15.X4+0xf0], RZ ;\n /*0130*/ SHF.L.U32 R6, R15, 0x2, RZ ;\n /*0140*/ ISETP.GE.U32.AND P1, PT, R0, UR4, PT ;\n /*0150*/ UIADD3 UR4, -UR5, UR7, URZ ;\n /*0160*/ ISETP.GE.U32.OR P1, PT, R7, UR4, P1 ;\n /*0170*/ @P0 STS [R15.X4+0xf0], R4 ;\n /*0180*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0190*/ @P1 EXIT ;\n /*01a0*/ LDS R0, [R15.X4] ;\n /*01b0*/ MOV R10, 0x2c ;\n /*01c0*/ UMOV UR4, 0x1 ;\n /*01d0*/ LDS R5, [R15.X4+0x4] ;\n /*01e0*/ LDS R7, [R15.X4+0x8] ;\n /*01f0*/ LDS R9, [R15.X4+0xc] ;\n /*0200*/ LDS R11, [R15.X4+0x10] ;\n /*0210*/ LDS R13, [R15.X4+0x14] ;\n /*0220*/ FFMA R0, RZ, R0, RZ ;\n /*0230*/ FADD R4, R0, R5 ;\n /*0240*/ FFMA R0, RZ, R5, R0 ;\n /*0250*/ LDS R5, [R15.X4+0x18] ;\n /*0260*/ FFMA R4, R7, 2, R4 ;\n /*0270*/ FFMA R0, RZ, R7, R0 ;\n /*0280*/ LDS R7, [R15.X4+0x1c] ;\n /*0290*/ FFMA R4, R9, 3, R4 ;\n /*02a0*/ FFMA R0, RZ, R9, R0 ;\n /*02b0*/ LDS R9, [R15.X4+0x20] ;\n /*02c0*/ FFMA R4, R11, 4, R4 ;\n /*02d0*/ FFMA R0, RZ, R11, R0 ;\n /*02e0*/ LDS R11, [R15.X4+0x24] ;\n /*02f0*/ FFMA R4, R13, 5, R4 ;\n /*0300*/ FFMA R0, RZ, R13, R0 ;\n /*0310*/ LDS R13, [R15.X4+0x28] ;\n /*0320*/ FFMA R4, R5, 6, R4 ;\n /*0330*/ FFMA R0, RZ, R5, R0 ;\n /*0340*/ FFMA R4, R7, 7, R4 ;\n /*0350*/ FFMA R0, RZ, R7, R0 ;\n /*0360*/ FFMA R4, R9, 8, R4 ;\n /*0370*/ FFMA R0, RZ, R9, R0 ;\n /*0380*/ FFMA R4, R11, 9, R4 ;\n /*0390*/ FFMA R8, RZ, R11, R0 ;\n /*03a0*/ FFMA R0, R13, 10, R4 ;\n /*03b0*/ FFMA R8, RZ, R13, R8 ;\n /*03c0*/ IADD3 R4, R6, 0x2c, RZ ;\n.L_x_0:\n /*03d0*/ LDS R6, [R4] ;\n /*03e0*/ I2FP.F32.S32 R5, UR4 ;\n /*03f0*/ UIADD3 UR5, UR4, 0x1, URZ ;\n /*0400*/ MOV R12, R4 ;\n /*0410*/ LDS R7, [R4+0x4] ;\n /*0420*/ IADD3 R10, R10, 0x58, RZ ;\n /*0430*/ UIADD3 UR4, UR4, 0x2, URZ ;\n /*0440*/ LDS R9, [R4+0x8] ;\n /*0450*/ ISETP.NE.AND P1, PT, R10, 0x1e4, PT ;\n /*0460*/ LDS R11, [R4+0xc] ;\n /*0470*/ LDS R13, [R4+0x1c] ;\n /*0480*/ LDS R15, [R4+0x20] ;\n /*0490*/ FFMA R0, RZ, R6.reuse, R0 ;\n /*04a0*/ FFMA R6, R5, R6, R8 ;\n /*04b0*/ FADD R0, R0, R7 ;\n /*04c0*/ FFMA R6, R5, R7, R6 ;\n /*04d0*/ LDS R7, [R4+0x10] ;\n /*04e0*/ FFMA R0, R9, 2, R0 ;\n /*04f0*/ FFMA R6, R5, R9, R6 ;\n /*0500*/ LDS R9, [R4+0x14] ;\n /*0510*/ FFMA R0, R11, 3, R0 ;\n /*0520*/ FFMA R6, R5, R11, R6 ;\n /*0530*/ LDS R11, [R4+0x18] ;\n /*0540*/ FFMA R0, R7, 4, R0 ;\n /*0550*/ FFMA R6, R5, R7, R6 ;\n /*0560*/ LDS R7, [R4+0x24] ;\n /*0570*/ FFMA R0, R9, 5, R0 ;\n /*0580*/ FFMA R6, R5, R9, R6 ;\n /*0590*/ LDS R9, [R4+0x28] ;\n /*05a0*/ FFMA R0, R11, 6, R0 ;\n /*05b0*/ FFMA R6, R5, R11, R6 ;\n /*05c0*/ LDS R11, [R12+0x2c] ;\n /*05d0*/ FFMA R0, R13, 7, R0 ;\n /*05e0*/ FFMA R6, R5, R13, R6 ;\n /*05f0*/ LDS R13, [R12+0x38] ;\n /*0600*/ FFMA R0, R15, 8, R0 ;\n /*0610*/ FFMA R6, R5, R15, R6 ;\n /*0620*/ IADD3 R4, R4, 0x58, RZ ;\n /*0630*/ LDS R15, [R12+0x3c] ;\n /*0640*/ FFMA R0, R7, 9, R0 ;\n /*0650*/ FFMA R6, R5, R7, R6 ;\n /*0660*/ LDS R7, [R12+0x30] ;\n /*0670*/ FFMA R0, R9, 10, R0 ;\n /*0680*/ FFMA R6, R5, R9, R6 ;\n /*0690*/ I2FP.F32.S32 R5, UR5 ;\n /*06a0*/ LDS R9, [R12+0x34] ;\n /*06b0*/ FFMA R0, RZ, R11, R0 ;\n /*06c0*/ FFMA R6, R5.reuse, R11, R6 ;\n /*06d0*/ LDS R11, [R12+0x40] ;\n /*06e0*/ FADD R0, R0, R7 ;\n /*06f0*/ FFMA R6, R5, R7, R6 ;\n /*0700*/ LDS R7, [R12+0x44] ;\n /*0710*/ FFMA R0, R9, 2, R0 ;\n /*0720*/ FFMA R6, R5, R9, R6 ;\n /*0730*/ LDS R9, [R12+0x48] ;\n /*0740*/ FFMA R0, R13, 3, R0 ;\n /*0750*/ FFMA R6, R5, R13, R6 ;\n /*0760*/ LDS R13, [R12+0x50] ;\n /*0770*/ FFMA R0, R15, 4, R0 ;\n /*0780*/ FFMA R6, R5, R15, R6 ;\n /*0790*/ LDS R15, [R12+0x54] ;\n /*07a0*/ FFMA R0, R11, 5, R0 ;\n /*07b0*/ FFMA R6, R5, R11, R6 ;\n /*07c0*/ LDS R11, [R12+0x4c] ;\n /*07d0*/ FFMA R0, R7, 6, R0 ;\n /*07e0*/ FFMA R6, R5, R7, R6 ;\n /*07f0*/ FFMA R0, R9, 7, R0 ;\n /*0800*/ FFMA R6, R5, R9, R6 ;\n /*0810*/ FFMA R0, R11, 8, R0 ;\n /*0820*/ FFMA R6, R5, R11, R6 ;\n /*0830*/ FFMA R0, R13, 9, R0 ;\n /*0840*/ FFMA R6, R5, R13, R6 ;\n /*0850*/ FFMA R0, R15, 10, R0 ;\n /*0860*/ FFMA R8, R5, R15, R6 ;\n /*0870*/ @P1 BRA `(.L_x_0) ;\n /*0880*/ FMUL R5, R8, R8 ;\n /*0890*/ FFMA R0, R0, R0, R5 ;\n /*08a0*/ @!P0 EXIT ;\n /*08b0*/ IADD3 R4, R0, -0xd000000, RZ ;\n /*08c0*/ MUFU.RSQ R7, R0 ;\n /*08d0*/ BSSY B0, `(.L_x_1) ;\n /*08e0*/ ISETP.GT.U32.AND P0, PT, R4, 0x727fffff, PT ;\n /*08f0*/ @!P0 BRA `(.L_x_2) ;\n /*0900*/ MOV R8, 0x920 ;\n /*0910*/ CALL.REL.NOINC `($__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath) ;\n /*0920*/ MOV R5, R0 ;\n /*0930*/ BRA `(.L_x_3) ;\n.L_x_2:\n /*0940*/ FMUL.FTZ R5, R0, R7 ;\n /*0950*/ FMUL.FTZ R4, R7, 0.5 ;\n /*0960*/ FFMA R0, -R5, R5, R0 ;\n /*0970*/ FFMA R5, R0, R4, R5 ;\n.L_x_3:\n /*0980*/ BSYNC B0 ;\n.L_x_1:\n /*0990*/ IMAD R2, R2, c[0x0][0x170], R3 ;\n /*09a0*/ MOV R3, 0x4 ;\n /*09b0*/ IMAD.WIDE R2, R2, R3, c[0x0][0x168] ;\n /*09c0*/ STG.E [R2.64], R5 ;\n /*09d0*/ EXIT ;\n\n\n\n\n .weak $__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath\n .type $__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath,@function\n .size $__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath,(.L_x_6 - $__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath)\n$__internal_0_$__cuda_sm20_sqrt_rn_f32_slowpath:\n /*09e0*/ LOP3.LUT P0, RZ, R0, 0x7fffffff, RZ, 0xc0, !PT ;\n /*09f0*/ @!P0 MOV R4, R0 ;\n /*0a00*/ @!P0 BRA `(.L_x_4) ;\n /*0a10*/ FSETP.GEU.FTZ.AND P0, PT, R0, RZ, PT ;\n /*0a20*/ @!P0 MOV R4, 0x7fffffff ;\n /*0a30*/ @!P0 BRA `(.L_x_4) ;\n /*0a40*/ FSETP.GTU.FTZ.AND P0, PT, |R0|, +INF , PT ;\n /*0a50*/ @P0 FADD.FTZ R4, R0, 1 ;\n /*0a60*/ @P0 BRA `(.L_x_4) ;\n /*0a70*/ FSETP.NEU.FTZ.AND P0, PT, |R0|, +INF , PT ;\n /*0a80*/ @P0 FFMA R5, R0, 1.84467440737095516160e+19, RZ ;\n /*0a90*/ @P0 MUFU.RSQ R4, R5 ;\n /*0aa0*/ @P0 FMUL.FTZ R6, R5, R4 ;\n /*0ab0*/ @P0 FMUL.FTZ R4, R4, 0.5 ;\n /*0ac0*/ @P0 FADD.FTZ R7, -R6, -RZ ;\n /*0ad0*/ @P0 FFMA R7, R6, R7, R5 ;\n /*0ae0*/ @P0 FFMA R7, R7, R4, R6 ;\n /*0af0*/ @!P0 MOV R4, R0 ;\n /*0b00*/ @P0 FMUL.FTZ R4, R7, 2.3283064365386962891e-10 ;\n.L_x_4:\n /*0b10*/ MOV R0, R4 ;\n /*0b20*/ MOV R4, R8 ;\n /*0b30*/ MOV R5, 0x0 ;\n /*0b40*/ RET.REL.NODEC R4 `(_Z17sobelFilterKernelPfS_ii) ;\n.L_x_5:\n /*0b50*/ BRA `(.L_x_5);\n /*0b60*/ NOP;\n /*0b70*/ NOP;\n /*0b80*/ NOP;\n /*0b90*/ NOP;\n /*0ba0*/ NOP;\n /*0bb0*/ NOP;\n /*0bc0*/ NOP;\n /*0bd0*/ NOP;\n /*0be0*/ NOP;\n /*0bf0*/ NOP;\n.L_x_6:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_070353.hip\"\n\t.globl\t_Z32__device_stub__sobelFilterKernelPfS_ii # -- Begin function _Z32__device_stub__sobelFilterKernelPfS_ii\n\t.p2align\t4, 0x90\n\t.type\t_Z32__device_stub__sobelFilterKernelPfS_ii,@function\n_Z32__device_stub__sobelFilterKernelPfS_ii: # @_Z32__device_stub__sobelFilterKernelPfS_ii\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$120, %rsp\n\t.cfi_def_cfa_offset 128\n\tmovq\t%rdi, 72(%rsp)\n\tmovq\t%rsi, 64(%rsp)\n\tmovl\t%edx, 12(%rsp)\n\tmovl\t%ecx, 8(%rsp)\n\tleaq\t72(%rsp), %rax\n\tmovq\t%rax, 80(%rsp)\n\tleaq\t64(%rsp), %rax\n\tmovq\t%rax, 88(%rsp)\n\tleaq\t12(%rsp), %rax\n\tmovq\t%rax, 96(%rsp)\n\tleaq\t8(%rsp), %rax\n\tmovq\t%rax, 104(%rsp)\n\tleaq\t48(%rsp), %rdi\n\tleaq\t32(%rsp), %rsi\n\tleaq\t24(%rsp), %rdx\n\tleaq\t16(%rsp), %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t48(%rsp), %rsi\n\tmovl\t56(%rsp), %edx\n\tmovq\t32(%rsp), %rcx\n\tmovl\t40(%rsp), %r8d\n\tleaq\t80(%rsp), %r9\n\tmovl\t$_Z17sobelFilterKernelPfS_ii, %edi\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t32(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$136, %rsp\n\t.cfi_adjust_cfa_offset -136\n\tretq\n.Lfunc_end0:\n\t.size\t_Z32__device_stub__sobelFilterKernelPfS_ii, .Lfunc_end0-_Z32__device_stub__sobelFilterKernelPfS_ii\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 32\n\tsubq\t$16, %rsp\n\t.cfi_def_cfa_offset 48\n\t.cfi_offset %rbx, -32\n\t.cfi_offset %r14, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t$4194304, %edi # imm = 0x400000\n\tcallq\tmalloc\n\tmovq\t%rax, %rbx\n\tmovl\t$4194304, %edi # imm = 0x400000\n\tcallq\tmalloc\n\tmovq\t%rax, %r14\n\txorl\t%eax, %eax\n\t.p2align\t4, 0x90\n.LBB1_1: # =>This Inner Loop Header: Depth=1\n\tmovl\t%eax, %ecx\n\tandl\t$252, %ecx\n\txorps\t%xmm0, %xmm0\n\tcvtsi2ss\t%ecx, %xmm0\n\tleal\t1(%rax), %ecx\n\tandl\t$253, %ecx\n\txorps\t%xmm1, %xmm1\n\tcvtsi2ss\t%ecx, %xmm1\n\tmovss\t%xmm0, (%rbx,%rax,4)\n\tmovss\t%xmm1, 4(%rbx,%rax,4)\n\tleal\t2(%rax), %ecx\n\tandl\t$254, %ecx\n\txorps\t%xmm0, %xmm0\n\tcvtsi2ss\t%ecx, %xmm0\n\tleal\t3(%rax), %ecx\n\tmovzbl\t%cl, %ecx\n\txorps\t%xmm1, %xmm1\n\tcvtsi2ss\t%ecx, %xmm1\n\tmovss\t%xmm0, 8(%rbx,%rax,4)\n\tmovss\t%xmm1, 12(%rbx,%rax,4)\n\taddq\t$4, %rax\n\tcmpq\t$1048576, %rax # imm = 0x100000\n\tjne\t.LBB1_1\n# %bb.2:\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$4194304, %esi # imm = 0x400000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_6\n# %bb.3:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n\tmovl\t$44, %edx\n\tjmp\t.LBB1_4\n.LBB1_6:\n\tmovq\t%rsp, %rdi\n\tmovl\t$4194304, %esi # imm = 0x400000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_12\n# %bb.7:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$45, %edx\n\tjmp\t.LBB1_4\n.LBB1_12:\n\tmovq\t8(%rsp), %rdi\n\tmovl\t$4194304, %edx # imm = 0x400000\n\tmovq\t%rbx, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_15\n# %bb.13:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tmovl\t$37, %edx\n\tjmp\t.LBB1_4\n.LBB1_15:\n\tmovabsq\t$274877907008, %rdi # imm = 0x4000000040\n\tmovabsq\t$68719476752, %rdx # imm = 0x1000000010\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_17\n# %bb.16:\n\tmovq\t8(%rsp), %rdi\n\tmovq\t(%rsp), %rsi\n\tmovl\t$1024, %edx # imm = 0x400\n\tmovl\t$1024, %ecx # imm = 0x400\n\tcallq\t_Z32__device_stub__sobelFilterKernelPfS_ii\n.LBB1_17:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_19\n# %bb.18:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tmovl\t$22, %edx\n.LBB1_4:\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_8\n# %bb.5:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_9\n.LBB1_8:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_9:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_14\n# %bb.10:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_21\n# %bb.11:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_22\n.LBB1_21:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_22:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n.LBB1_23:\n\tmovl\t$-1, %eax\n.LBB1_24:\n\taddq\t$16, %rsp\n\t.cfi_def_cfa_offset 32\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_19:\n\t.cfi_def_cfa_offset 48\n\tmovq\t(%rsp), %rsi\n\tmovl\t$4194304, %edx # imm = 0x400000\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_25\n# %bb.20:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$36, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rax, %rsi\n\tcallq\t_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_23\n.LBB1_25:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t%rbx, %rdi\n\tcallq\tfree\n\tmovq\t%r14, %rdi\n\tcallq\tfree\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$34, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_24\n.LBB1_14:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_070353.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_070353.hip,@function\n_GLOBAL__sub_I_cuda_code_070353.hip: # @_GLOBAL__sub_I_cuda_code_070353.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_070353.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_070353.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z17sobelFilterKernelPfS_ii, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z17sobelFilterKernelPfS_ii,@object # @_Z17sobelFilterKernelPfS_ii\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z17sobelFilterKernelPfS_ii\n\t.p2align\t3, 0x0\n_Z17sobelFilterKernelPfS_ii:\n\t.quad\t_Z32__device_stub__sobelFilterKernelPfS_ii\n\t.size\t_Z17sobelFilterKernelPfS_ii, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate device memory for input: \"\n\t.size\t.L.str, 45\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate device memory for output: \"\n\t.size\t.L.str.1, 46\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to copy input data to device: \"\n\t.size\t.L.str.2, 38\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.3, 23\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Failed to copy output data to host: \"\n\t.size\t.L.str.4, 37\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"Sobel filter applied successfully.\"\n\t.size\t.L.str.5, 35\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z17sobelFilterKernelPfS_ii\"\n\t.size\t.L__unnamed_1, 28\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_070353.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":94,"cells":{"id":{"kind":"string","value":"5702ba4e8bd35bd71b2f08f24fdd96c458a8da5c_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18z_transform_kernelP6float2S0_ --------------------------\n .section .text._Z18z_transform_kernelP6float2S0_,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=39\"\n .align 128\n\n\n\n\n .global _Z18z_transform_kernelP6float2S0_\n .type _Z18z_transform_kernelP6float2S0_,@function\n .size _Z18z_transform_kernelP6float2S0_,(.L_x_10 - _Z18z_transform_kernelP6float2S0_)\n .other _Z18z_transform_kernelP6float2S0_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18z_transform_kernelP6float2S0_:\n.text._Z18z_transform_kernelP6float2S0_:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R3, SR_CTAID.X ;\n /*0020*/ MOV R5, 0x8 ;\n /*0030*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0040*/ S2R R0, SR_TID.X ;\n /*0050*/ IMAD R6, R3, c[0x0][0x0], R0 ;\n /*0060*/ IADD3 R8, R6.reuse, c[0x0][0x0], RZ ;\n /*0070*/ IMAD.WIDE R6, R6, R5, c[0x0][0x160] ;\n /*0080*/ IMAD.WIDE.U32 R8, R8, R5, c[0x0][0x160] ;\n /*0090*/ LDG.E.64 R6, [R6.64] ;\n /*00a0*/ LDG.E.64 R8, [R8.64] ;\n /*00b0*/ MOV R2, c[0x0][0x0] ;\n /*00c0*/ SHF.L.U32 R30, R0, 0x3, RZ ;\n /*00d0*/ SHF.L.U32 R11, R2, 0x1, RZ ;\n /*00e0*/ IMAD R10, R5, c[0x0][0x0], R30 ;\n /*00f0*/ ISETP.NE.AND P0, PT, R11, RZ, PT ;\n /*0100*/ CS2R R4, SRZ ;\n /*0110*/ STS.64 [R0.X8], R6 ;\n /*0120*/ STS.64 [R10], R8 ;\n /*0130*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0140*/ @!P0 BRA `(.L_x_0) ;\n /*0150*/ IADD3 R11, R11, -0x1, RZ ;\n /*0160*/ UMOV UR4, URZ ;\n /*0170*/ MOV R4, RZ ;\n /*0180*/ ISETP.GE.U32.AND P0, PT, R11, 0x6, PT ;\n /*0190*/ SHF.R.U32.HI R28, RZ, 0x1, R11 ;\n /*01a0*/ IADD3 R29, R28, 0x1, RZ ;\n /*01b0*/ LOP3.LUT R29, R29, 0x3, RZ, 0xc0, !PT ;\n /*01c0*/ @!P0 BRA `(.L_x_1) ;\n /*01d0*/ IADD3 R28, R28, -R29, RZ ;\n /*01e0*/ UMOV UR4, URZ ;\n /*01f0*/ CS2R R4, SRZ ;\n /*0200*/ UMOV UR5, URZ ;\n /*0210*/ ISETP.GT.AND P0, PT, R28, -0x1, PT ;\n /*0220*/ @!P0 BRA `(.L_x_2) ;\n /*0230*/ IADD3 R6, R28, 0x1, RZ ;\n /*0240*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*0250*/ ISETP.GT.AND P1, PT, R6, 0xc, PT ;\n /*0260*/ @!P1 BRA `(.L_x_3) ;\n /*0270*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n.L_x_4:\n /*0280*/ LDS.128 R24, [UR5] ;\n /*0290*/ IADD3 R28, R28, -0x10, RZ ;\n /*02a0*/ UIADD3 UR4, UR4, 0x20, URZ ;\n /*02b0*/ LDS.128 R20, [UR5+0x10] ;\n /*02c0*/ ISETP.GT.AND P1, PT, R28, 0xb, PT ;\n /*02d0*/ LDS.128 R16, [UR5+0x20] ;\n /*02e0*/ LDS.128 R12, [UR5+0x30] ;\n /*02f0*/ LDS.128 R8, [UR5+0x40] ;\n /*0300*/ FMUL R7, R25.reuse, R27 ;\n /*0310*/ FMUL R6, R25, R26 ;\n /*0320*/ FFMA R7, R24.reuse, R26, -R7 ;\n /*0330*/ FFMA R6, R24, R27, R6 ;\n /*0340*/ FMUL R25, R21.reuse, R23.reuse ;\n /*0350*/ FMUL R32, R21, R22.reuse ;\n /*0360*/ FADD R24, R7, R4 ;\n /*0370*/ FADD R26, R6, R5 ;\n /*0380*/ FFMA R25, R20.reuse, R22, -R25 ;\n /*0390*/ LDS.128 R4, [UR5+0x50] ;\n /*03a0*/ FFMA R23, R20, R23, R32 ;\n /*03b0*/ FMUL R21, R17.reuse, R19.reuse ;\n /*03c0*/ FMUL R20, R17, R18.reuse ;\n /*03d0*/ FADD R24, R24, R25 ;\n /*03e0*/ FADD R26, R26, R23 ;\n /*03f0*/ FFMA R25, R16.reuse, R18, -R21 ;\n /*0400*/ FFMA R31, R16, R19, R20 ;\n /*0410*/ FMUL R27, R13.reuse, R15.reuse ;\n /*0420*/ LDS.128 R20, [UR5+0x60] ;\n /*0430*/ FMUL R32, R13, R14.reuse ;\n /*0440*/ FADD R24, R24, R25 ;\n /*0450*/ FFMA R25, R12.reuse, R14, -R27 ;\n /*0460*/ LDS.128 R16, [UR5+0x70] ;\n /*0470*/ FFMA R27, R12, R15, R32 ;\n /*0480*/ FMUL R33, R9.reuse, R11.reuse ;\n /*0490*/ FMUL R32, R9, R10.reuse ;\n /*04a0*/ LDS.128 R12, [UR5+0x80] ;\n /*04b0*/ FADD R26, R26, R31 ;\n /*04c0*/ FFMA R31, R8.reuse, R10, -R33 ;\n /*04d0*/ FFMA R32, R8, R11, R32 ;\n /*04e0*/ FADD R34, R24, R25 ;\n /*04f0*/ LDS.128 R8, [UR5+0x90] ;\n /*0500*/ FADD R33, R26, R27 ;\n /*0510*/ FADD R31, R34, R31 ;\n /*0520*/ LDS.128 R24, [UR5+0xa0] ;\n /*0530*/ FADD R32, R33, R32 ;\n /*0540*/ FMUL R34, R5.reuse, R6 ;\n /*0550*/ FMUL R35, R5, R7 ;\n /*0560*/ FFMA R7, R4.reuse, R7, R34 ;\n /*0570*/ FFMA R6, R4, R6, -R35 ;\n /*0580*/ FMUL R5, R21.reuse, R23 ;\n /*0590*/ FMUL R4, R21, R22.reuse ;\n /*05a0*/ FADD R21, R32, R7 ;\n /*05b0*/ FADD R33, R31, R6 ;\n /*05c0*/ FMUL R7, R17.reuse, R19 ;\n /*05d0*/ FFMA R34, R20.reuse, R22, -R5 ;\n /*05e0*/ FFMA R22, R20, R23, R4 ;\n /*05f0*/ FMUL R23, R17, R18.reuse ;\n /*0600*/ FFMA R20, R16.reuse, R18, -R7 ;\n /*0610*/ FMUL R31, R13.reuse, R15 ;\n /*0620*/ FMUL R32, R13, R14 ;\n /*0630*/ LDS.128 R4, [UR5+0xb0] ;\n /*0640*/ FFMA R23, R16, R19, R23 ;\n /*0650*/ FMUL R17, R9.reuse, R11 ;\n /*0660*/ FMUL R16, R9, R10 ;\n /*0670*/ FFMA R31, R12.reuse, R14, -R31 ;\n /*0680*/ FFMA R32, R12, R15, R32 ;\n /*0690*/ FADD R35, R33, R34 ;\n /*06a0*/ LDS.128 R12, [UR5+0xc0] ;\n /*06b0*/ FFMA R33, R8.reuse, R10, -R17 ;\n /*06c0*/ FFMA R34, R8, R11, R16 ;\n /*06d0*/ FMUL R9, R25.reuse, R27 ;\n /*06e0*/ LDS.128 R16, [UR5+0xd0] ;\n /*06f0*/ FMUL R36, R25, R26.reuse ;\n /*0700*/ FADD R22, R21, R22 ;\n /*0710*/ FFMA R26, R24, R26, -R9 ;\n /*0720*/ LDS.128 R8, [UR5+0xe0] ;\n /*0730*/ FFMA R24, R24, R27, R36 ;\n /*0740*/ FADD R36, R35, R20 ;\n /*0750*/ FADD R25, R22, R23 ;\n /*0760*/ LDS.128 R20, [UR5+0xf0] ;\n /*0770*/ FADD R36, R36, R31 ;\n /*0780*/ FADD R25, R25, R32 ;\n /*0790*/ UIADD3 UR5, UR5, 0x100, URZ ;\n /*07a0*/ FADD R33, R36, R33 ;\n /*07b0*/ FADD R25, R25, R34 ;\n /*07c0*/ FADD R26, R33, R26 ;\n /*07d0*/ FADD R24, R25, R24 ;\n /*07e0*/ FMUL R27, R5.reuse, R7 ;\n /*07f0*/ FMUL R32, R5, R6 ;\n /*0800*/ FFMA R27, R4.reuse, R6, -R27 ;\n /*0810*/ FFMA R7, R4, R7, R32 ;\n /*0820*/ FMUL R4, R13.reuse, R14 ;\n /*0830*/ FMUL R5, R13, R15.reuse ;\n /*0840*/ FADD R7, R24, R7 ;\n /*0850*/ FADD R26, R26, R27 ;\n /*0860*/ FFMA R4, R12.reuse, R15, R4 ;\n /*0870*/ FMUL R6, R17.reuse, R18 ;\n /*0880*/ FFMA R5, R12, R14, -R5 ;\n /*0890*/ FMUL R13, R17, R19.reuse ;\n /*08a0*/ FADD R4, R7, R4 ;\n /*08b0*/ FFMA R19, R16, R19, R6 ;\n /*08c0*/ FMUL R7, R9.reuse, R11.reuse ;\n /*08d0*/ FMUL R6, R9, R10 ;\n /*08e0*/ FADD R5, R26, R5 ;\n /*08f0*/ FFMA R18, R16, R18, -R13 ;\n /*0900*/ FFMA R10, R8, R10, -R7 ;\n /*0910*/ FADD R4, R4, R19 ;\n /*0920*/ FFMA R11, R8, R11, R6 ;\n /*0930*/ FADD R5, R5, R18 ;\n /*0940*/ FMUL R7, R21.reuse, R23.reuse ;\n /*0950*/ FMUL R21, R21, R22.reuse ;\n /*0960*/ FADD R11, R4, R11 ;\n /*0970*/ FADD R5, R5, R10 ;\n /*0980*/ FFMA R4, R20.reuse, R22, -R7 ;\n /*0990*/ FFMA R20, R20, R23, R21 ;\n /*09a0*/ FADD R4, R5, R4 ;\n /*09b0*/ FADD R5, R11, R20 ;\n /*09c0*/ @P1 BRA `(.L_x_4) ;\n.L_x_3:\n /*09d0*/ IADD3 R6, R28, 0x1, RZ ;\n /*09e0*/ ISETP.GT.AND P1, PT, R6, 0x4, PT ;\n /*09f0*/ @!P1 BRA `(.L_x_5) ;\n /*0a00*/ LDS.128 R12, [UR5] ;\n /*0a10*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x8, 0x0 ;\n /*0a20*/ UIADD3 UR4, UR4, 0x10, URZ ;\n /*0a30*/ IADD3 R28, R28, -0x8, RZ ;\n /*0a40*/ LDS.128 R24, [UR5+0x10] ;\n /*0a50*/ LDS.128 R8, [UR5+0x20] ;\n /*0a60*/ LDS.128 R20, [UR5+0x30] ;\n /*0a70*/ LDS.128 R16, [UR5+0x40] ;\n /*0a80*/ FMUL R7, R13.reuse, R15 ;\n /*0a90*/ FMUL R6, R13, R14 ;\n /*0aa0*/ FFMA R7, R12.reuse, R14, -R7 ;\n /*0ab0*/ FFMA R6, R12, R15, R6 ;\n /*0ac0*/ FMUL R33, R25.reuse, R27 ;\n /*0ad0*/ LDS.128 R12, [UR5+0x50] ;\n /*0ae0*/ FMUL R34, R25, R26.reuse ;\n /*0af0*/ FADD R31, R4, R7 ;\n /*0b00*/ FFMA R32, R24.reuse, R26, -R33 ;\n /*0b10*/ FMUL R7, R9.reuse, R11 ;\n /*0b20*/ FFMA R33, R24, R27, R34 ;\n /*0b30*/ FMUL R36, R9, R10.reuse ;\n /*0b40*/ LDS.128 R24, [UR5+0x60] ;\n /*0b50*/ FADD R34, R5, R6 ;\n /*0b60*/ FFMA R10, R8.reuse, R10, -R7 ;\n /*0b70*/ FADD R31, R31, R32 ;\n /*0b80*/ LDS.128 R4, [UR5+0x70] ;\n /*0b90*/ FMUL R9, R21.reuse, R23 ;\n /*0ba0*/ FFMA R36, R8, R11, R36 ;\n /*0bb0*/ FMUL R8, R21, R22.reuse ;\n /*0bc0*/ FADD R33, R34, R33 ;\n /*0bd0*/ FADD R10, R31, R10 ;\n /*0be0*/ FFMA R9, R20.reuse, R22, -R9 ;\n /*0bf0*/ FMUL R11, R17, R19 ;\n /*0c00*/ FFMA R8, R20, R23, R8 ;\n /*0c10*/ FADD R33, R33, R36 ;\n /*0c20*/ FMUL R20, R17, R18.reuse ;\n /*0c30*/ FADD R9, R10, R9 ;\n /*0c40*/ FFMA R18, R16.reuse, R18, -R11 ;\n /*0c50*/ FADD R8, R33, R8 ;\n /*0c60*/ FFMA R19, R16, R19, R20 ;\n /*0c70*/ UIADD3 UR5, UR5, 0x80, URZ ;\n /*0c80*/ FADD R9, R9, R18 ;\n /*0c90*/ FADD R8, R8, R19 ;\n /*0ca0*/ FMUL R11, R13.reuse, R15 ;\n /*0cb0*/ FMUL R10, R13, R14 ;\n /*0cc0*/ FFMA R14, R12.reuse, R14, -R11 ;\n /*0cd0*/ FFMA R15, R12, R15, R10 ;\n /*0ce0*/ FMUL R11, R25.reuse, R27.reuse ;\n /*0cf0*/ FMUL R10, R25, R26.reuse ;\n /*0d00*/ FADD R9, R9, R14 ;\n /*0d10*/ FADD R8, R8, R15 ;\n /*0d20*/ FFMA R26, R24.reuse, R26, -R11 ;\n /*0d30*/ FFMA R27, R24, R27, R10 ;\n /*0d40*/ FMUL R11, R5.reuse, R7.reuse ;\n /*0d50*/ FMUL R10, R5, R6.reuse ;\n /*0d60*/ FADD R9, R9, R26 ;\n /*0d70*/ FADD R8, R8, R27 ;\n /*0d80*/ FFMA R6, R4.reuse, R6, -R11 ;\n /*0d90*/ FFMA R5, R4, R7, R10 ;\n /*0da0*/ FADD R4, R9, R6 ;\n /*0db0*/ FADD R5, R8, R5 ;\n.L_x_5:\n /*0dc0*/ ISETP.NE.OR P0, PT, R28, -0x1, P0 ;\n /*0dd0*/ @!P0 BRA `(.L_x_1) ;\n.L_x_2:\n /*0de0*/ LDS.128 R8, [UR5] ;\n /*0df0*/ IADD3 R28, R28, -0x4, RZ ;\n /*0e00*/ UIADD3 UR4, UR4, 0x8, URZ ;\n /*0e10*/ LDS.128 R12, [UR5+0x10] ;\n /*0e20*/ ISETP.NE.AND P0, PT, R28, -0x1, PT ;\n /*0e30*/ LDS.128 R16, [UR5+0x20] ;\n /*0e40*/ LDS.128 R20, [UR5+0x30] ;\n /*0e50*/ UIADD3 UR5, UR5, 0x40, URZ ;\n /*0e60*/ FMUL R7, R9.reuse, R11 ;\n /*0e70*/ FMUL R6, R9, R10 ;\n /*0e80*/ FFMA R7, R8.reuse, R10, -R7 ;\n /*0e90*/ FFMA R6, R8, R11, R6 ;\n /*0ea0*/ FMUL R9, R13, R15 ;\n /*0eb0*/ FADD R7, R7, R4 ;\n /*0ec0*/ FMUL R4, R13, R14.reuse ;\n /*0ed0*/ FADD R6, R6, R5 ;\n /*0ee0*/ FMUL R5, R17.reuse, R19 ;\n /*0ef0*/ FFMA R14, R12.reuse, R14, -R9 ;\n /*0f00*/ FFMA R15, R12, R15, R4 ;\n /*0f10*/ FMUL R4, R17, R18.reuse ;\n /*0f20*/ FFMA R18, R16, R18, -R5 ;\n /*0f30*/ FMUL R5, R21, R23 ;\n /*0f40*/ FADD R7, R7, R14 ;\n /*0f50*/ FADD R6, R6, R15 ;\n /*0f60*/ FFMA R19, R16, R19, R4 ;\n /*0f70*/ FMUL R21, R21, R22.reuse ;\n /*0f80*/ FADD R7, R7, R18 ;\n /*0f90*/ FFMA R4, R20, R22, -R5 ;\n /*0fa0*/ FADD R6, R6, R19 ;\n /*0fb0*/ FFMA R21, R20, R23, R21 ;\n /*0fc0*/ FADD R4, R7, R4 ;\n /*0fd0*/ FADD R5, R6, R21 ;\n /*0fe0*/ @P0 BRA `(.L_x_2) ;\n.L_x_1:\n /*0ff0*/ ISETP.NE.AND P0, PT, R29, RZ, PT ;\n /*1000*/ @!P0 BRA `(.L_x_0) ;\n /*1010*/ ULEA UR4, UR4, 0x8, 0x3 ;\n.L_x_6:\n /*1020*/ LDS.64 R6, [UR4+-0x8] ;\n /*1030*/ IADD3 R29, R29, -0x1, RZ ;\n /*1040*/ LDS.64 R8, [UR4] ;\n /*1050*/ ISETP.NE.AND P0, PT, R29, RZ, PT ;\n /*1060*/ UIADD3 UR4, UR4, 0x10, URZ ;\n /*1070*/ FMUL R11, R7.reuse, R9 ;\n /*1080*/ FMUL R10, R7, R8 ;\n /*1090*/ FFMA R11, R6.reuse, R8, -R11 ;\n /*10a0*/ FFMA R10, R6, R9, R10 ;\n /*10b0*/ FADD R4, R11, R4 ;\n /*10c0*/ FADD R5, R10, R5 ;\n /*10d0*/ @P0 BRA `(.L_x_6) ;\n.L_x_0:\n /*10e0*/ SHF.R.U32.HI R2, RZ, 0x1, R2 ;\n /*10f0*/ STS.64 [R0.X8], R4 ;\n /*1100*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*1110*/ ISETP.NE.AND P1, PT, R2, RZ, PT ;\n /*1120*/ ISETP.NE.AND P0, PT, R0, RZ, PT ;\n /*1130*/ @!P1 BRA `(.L_x_7) ;\n.L_x_8:\n /*1140*/ ISETP.GE.AND P1, PT, R0, R2, PT ;\n /*1150*/ @!P1 LEA R6, R2, R30, 0x3 ;\n /*1160*/ @!P1 LDS.64 R4, [R0.X8] ;\n /*1170*/ SHF.R.U32.HI R2, RZ, 0x1, R2 ;\n /*1180*/ @!P1 LDS.64 R6, [R6] ;\n /*1190*/ @!P1 FADD R5, R5, R7 ;\n /*11a0*/ @!P1 FADD R4, R4, R6 ;\n /*11b0*/ @!P1 STS.64 [R0.X8], R4 ;\n /*11c0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*11d0*/ ISETP.NE.AND P1, PT, R2, RZ, PT ;\n /*11e0*/ @P1 BRA `(.L_x_8) ;\n.L_x_7:\n /*11f0*/ @P0 EXIT ;\n /*1200*/ LDS.64 R4, [RZ] ;\n /*1210*/ MOV R2, 0x8 ;\n /*1220*/ IMAD.WIDE.U32 R2, R3, R2, c[0x0][0x168] ;\n /*1230*/ STG.E.64 [R2.64], R4 ;\n /*1240*/ EXIT ;\n.L_x_9:\n /*1250*/ BRA `(.L_x_9);\n /*1260*/ NOP;\n /*1270*/ NOP;\n /*1280*/ NOP;\n /*1290*/ NOP;\n /*12a0*/ NOP;\n /*12b0*/ NOP;\n /*12c0*/ NOP;\n /*12d0*/ NOP;\n /*12e0*/ NOP;\n /*12f0*/ NOP;\n.L_x_10:\n"},"hip":{"kind":"string","value":"\t.text\n\t.file\t\"cuda_code_009823.hip\"\n\t.globl\t_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.p2align\t4, 0x90\n\t.type\t_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_,@function\n_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_: # @_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$88, %rsp\n\t.cfi_def_cfa_offset 96\n\tmovq\t%rdi, 56(%rsp)\n\tmovq\t%rsi, 48(%rsp)\n\tleaq\t56(%rsp), %rax\n\tmovq\t%rax, 64(%rsp)\n\tleaq\t48(%rsp), %rax\n\tmovq\t%rax, 72(%rsp)\n\tleaq\t32(%rsp), %rdi\n\tleaq\t16(%rsp), %rsi\n\tleaq\t8(%rsp), %rdx\n\tmovq\t%rsp, %rcx\n\tcallq\t__hipPopCallConfiguration\n\tmovq\t32(%rsp), %rsi\n\tmovl\t40(%rsp), %edx\n\tmovq\t16(%rsp), %rcx\n\tmovl\t24(%rsp), %r8d\n\tleaq\t64(%rsp), %r9\n\tmovl\t$_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_, %edi\n\tpushq\t(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tpushq\t16(%rsp)\n\t.cfi_adjust_cfa_offset 8\n\tcallq\thipLaunchKernel\n\taddq\t$104, %rsp\n\t.cfi_adjust_cfa_offset -104\n\tretq\n.Lfunc_end0:\n\t.size\t_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_, .Lfunc_end0-_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.cfi_endproc\n # -- End function\n\t.globl\tmain # -- Begin function main\n\t.p2align\t4, 0x90\n\t.type\tmain,@function\nmain: # @main\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rbp\n\t.cfi_def_cfa_offset 16\n\tpushq\t%r15\n\t.cfi_def_cfa_offset 24\n\tpushq\t%r14\n\t.cfi_def_cfa_offset 32\n\tpushq\t%r13\n\t.cfi_def_cfa_offset 40\n\tpushq\t%r12\n\t.cfi_def_cfa_offset 48\n\tpushq\t%rbx\n\t.cfi_def_cfa_offset 56\n\tsubq\t$24, %rsp\n\t.cfi_def_cfa_offset 80\n\t.cfi_offset %rbx, -56\n\t.cfi_offset %r12, -48\n\t.cfi_offset %r13, -40\n\t.cfi_offset %r14, -32\n\t.cfi_offset %r15, -24\n\t.cfi_offset %rbp, -16\n\tmovl\t$8192, %edi # imm = 0x2000\n\tcallq\tmalloc\n\tmovq\t%rax, %rbx\n\tmovl\t$32, %edi\n\tcallq\tmalloc\n\tmovq\t%rax, %r14\n\txorl\t%eax, %eax\n\t.p2align\t4, 0x90\n.LBB1_1: # =>This Inner Loop Header: Depth=1\n\txorps\t%xmm0, %xmm0\n\tcvtsi2ss\t%eax, %xmm0\n\tmovss\t%xmm0, 8(%rsp)\n\tmovss\t%xmm0, 12(%rsp)\n\tleal\t1(%rax), %ecx\n\txorps\t%xmm0, %xmm0\n\tcvtsi2ss\t%ecx, %xmm0\n\tmovsd\t8(%rsp), %xmm1 # xmm1 = mem[0],zero\n\tmovsd\t%xmm1, (%rbx,%rax,8)\n\tmovss\t%xmm0, 8(%rsp)\n\tmovss\t%xmm0, 12(%rsp)\n\tmovsd\t8(%rsp), %xmm0 # xmm0 = mem[0],zero\n\tmovsd\t%xmm0, 8(%rbx,%rax,8)\n\taddq\t$2, %rax\n\tcmpq\t$1024, %rax # imm = 0x400\n\tjne\t.LBB1_1\n# %bb.2:\n\tleaq\t8(%rsp), %rdi\n\tmovl\t$8192, %esi # imm = 0x2000\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_6\n# %bb.3:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str, %esi\n\tmovl\t$42, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.4:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_10\n# %bb.5:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_11\n.LBB1_6:\n\tleaq\t16(%rsp), %rdi\n\tmovl\t$32, %esi\n\tcallq\thipMalloc\n\ttestl\t%eax, %eax\n\tje\t.LBB1_12\n# %bb.7:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.1, %esi\n\tmovl\t$43, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.8:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_16\n# %bb.9:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_17\n.LBB1_10:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_11:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tjmp\t.LBB1_33\n.LBB1_12:\n\tmovq\t8(%rsp), %rdi\n\tmovl\t$8192, %edx # imm = 0x2000\n\tmovq\t%rbx, %rsi\n\tmovl\t$1, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_18\n# %bb.13:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.2, %esi\n\tmovl\t$35, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.14:\n\tcmpb\t$0, 56(%rbx)\n\tje\t.LBB1_29\n.LBB1_15:\n\tmovzbl\t67(%rbx), %eax\n\tjmp\t.LBB1_30\n.LBB1_16:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_17:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tmovq\t8(%rsp), %rdi\n\tjmp\t.LBB1_32\n.LBB1_18:\n\tmovabsq\t$4294967300, %rdi # imm = 0x100000004\n\tleaq\t252(%rdi), %rdx\n\tmovl\t$1, %esi\n\tmovl\t$1, %ecx\n\txorl\t%r8d, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipPushCallConfiguration\n\ttestl\t%eax, %eax\n\tjne\t.LBB1_20\n# %bb.19:\n\tmovq\t8(%rsp), %rdi\n\tmovq\t16(%rsp), %rsi\n\tcallq\t_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n.LBB1_20:\n\tcallq\thipGetLastError\n\ttestl\t%eax, %eax\n\tje\t.LBB1_23\n# %bb.21:\n\tmovl\t%eax, %ebp\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.3, %esi\n\tmovl\t$22, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t%ebp, %edi\n\tcallq\thipGetErrorString\n\ttestq\t%rax, %rax\n\tje\t.LBB1_25\n# %bb.22:\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, %rbx\n\tcallq\tstrlen\n\tmovl\t$_ZSt4cerr, %edi\n\tmovq\t%rbx, %rsi\n\tmovq\t%rax, %rdx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tjmp\t.LBB1_26\n.LBB1_23:\n\tmovq\t16(%rsp), %rsi\n\tmovl\t$32, %edx\n\tmovq\t%r14, %rdi\n\tmovl\t$2, %ecx\n\tcallq\thipMemcpy\n\ttestl\t%eax, %eax\n\tje\t.LBB1_35\n# %bb.24:\n\tmovl\t$_ZSt4cerr, %edi\n\tmovl\t$.L.str.4, %esi\n\tmovl\t$34, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\tjmp\t.LBB1_31\n.LBB1_25:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tleaq\t_ZSt4cerr(%rax), %rdi\n\tmovl\t_ZSt4cerr+32(%rax), %esi\n\torl\t$1, %esi\n\tcallq\t_ZNSt9basic_iosIcSt11char_traitsIcEE5clearESt12_Ios_Iostate\n.LBB1_26:\n\tmovq\t_ZSt4cerr(%rip), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t_ZSt4cerr+240(%rax), %rbx\n\ttestq\t%rbx, %rbx\n\tje\t.LBB1_42\n# %bb.27:\n\tcmpb\t$0, 56(%rbx)\n\tjne\t.LBB1_15\n.LBB1_29:\n\tmovq\t%rbx, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%rbx), %rax\n\tmovq\t%rbx, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_30:\n\tmovsbl\t%al, %esi\n\tmovl\t$_ZSt4cerr, %edi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n.LBB1_31:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n.LBB1_32:\n\tcallq\thipFree\n.LBB1_33:\n\tmovl\t$-1, %eax\n.LBB1_34:\n\taddq\t$24, %rsp\n\t.cfi_def_cfa_offset 56\n\tpopq\t%rbx\n\t.cfi_def_cfa_offset 48\n\tpopq\t%r12\n\t.cfi_def_cfa_offset 40\n\tpopq\t%r13\n\t.cfi_def_cfa_offset 32\n\tpopq\t%r14\n\t.cfi_def_cfa_offset 24\n\tpopq\t%r15\n\t.cfi_def_cfa_offset 16\n\tpopq\t%rbp\n\t.cfi_def_cfa_offset 8\n\tretq\n.LBB1_35:\n\t.cfi_def_cfa_offset 80\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.5, %esi\n\tmovl\t$15, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tcallq\t_ZSt4endlIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_\n\txorl\t%r15d, %r15d\n\tjmp\t.LBB1_38\n.LBB1_36: # in Loop: Header=BB1_38 Depth=1\n\tmovq\t%r13, %rdi\n\tcallq\t_ZNKSt5ctypeIcE13_M_widen_initEv\n\tmovq\t(%r13), %rax\n\tmovq\t%r13, %rdi\n\tmovl\t$10, %esi\n\tcallq\t*48(%rax)\n.LBB1_37: # in Loop: Header=BB1_38 Depth=1\n\tmovsbl\t%al, %esi\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo3putEc\n\tmovq\t%rax, %rdi\n\tcallq\t_ZNSo5flushEv\n\tincq\t%r15\n\tcmpq\t$4, %r15\n\tje\t.LBB1_41\n.LBB1_38: # =>This Inner Loop Header: Depth=1\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t$.L.str.6, %esi\n\tmovl\t$7, %edx\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovl\t$_ZSt4cout, %edi\n\tmovl\t%r15d, %esi\n\tcallq\t_ZNSolsEi\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.7, %esi\n\tmovl\t$5, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovss\t(%r14,%r15,8), %xmm0 # xmm0 = mem[0],zero,zero,zero\n\tcvtss2sd\t%xmm0, %xmm0\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo9_M_insertIdEERSoT_\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.8, %esi\n\tmovl\t$2, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovss\t4(%r14,%r15,8), %xmm0 # xmm0 = mem[0],zero,zero,zero\n\tcvtss2sd\t%xmm0, %xmm0\n\tmovq\t%r12, %rdi\n\tcallq\t_ZNSo9_M_insertIdEERSoT_\n\tmovq\t%rax, %r12\n\tmovl\t$.L.str.9, %esi\n\tmovl\t$2, %edx\n\tmovq\t%rax, %rdi\n\tcallq\t_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l\n\tmovq\t(%r12), %rax\n\tmovq\t-24(%rax), %rax\n\tmovq\t240(%r12,%rax), %r13\n\ttestq\t%r13, %r13\n\tje\t.LBB1_42\n# %bb.39: # in Loop: Header=BB1_38 Depth=1\n\tcmpb\t$0, 56(%r13)\n\tje\t.LBB1_36\n# %bb.40: # in Loop: Header=BB1_38 Depth=1\n\tmovzbl\t67(%r13), %eax\n\tjmp\t.LBB1_37\n.LBB1_41:\n\tmovq\t8(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t16(%rsp), %rdi\n\tcallq\thipFree\n\tmovq\t%rbx, %rdi\n\tcallq\tfree\n\tmovq\t%r14, %rdi\n\tcallq\tfree\n\txorl\t%eax, %eax\n\tjmp\t.LBB1_34\n.LBB1_42:\n\tcallq\t_ZSt16__throw_bad_castv\n.Lfunc_end1:\n\t.size\tmain, .Lfunc_end1-main\n\t.cfi_endproc\n # -- End function\n\t.section\t.text.startup,\"ax\",@progbits\n\t.p2align\t4, 0x90 # -- Begin function _GLOBAL__sub_I_cuda_code_009823.hip\n\t.type\t_GLOBAL__sub_I_cuda_code_009823.hip,@function\n_GLOBAL__sub_I_cuda_code_009823.hip: # @_GLOBAL__sub_I_cuda_code_009823.hip\n\t.cfi_startproc\n# %bb.0:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tmovl\t$_ZStL8__ioinit, %edi\n\tcallq\t_ZNSt8ios_base4InitC1Ev\n\tmovl\t$_ZNSt8ios_base4InitD1Ev, %edi\n\tmovl\t$_ZStL8__ioinit, %esi\n\tmovl\t$__dso_handle, %edx\n\tpopq\t%rax\n\t.cfi_def_cfa_offset 8\n\tjmp\t__cxa_atexit # TAILCALL\n.Lfunc_end2:\n\t.size\t_GLOBAL__sub_I_cuda_code_009823.hip, .Lfunc_end2-_GLOBAL__sub_I_cuda_code_009823.hip\n\t.cfi_endproc\n # -- End function\n\t.text\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_ctor\n\t.type\t__hip_module_ctor,@function\n__hip_module_ctor: # @__hip_module_ctor\n\t.cfi_startproc\n# %bb.0:\n\tsubq\t$40, %rsp\n\t.cfi_def_cfa_offset 48\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tjne\t.LBB3_2\n# %bb.1:\n\tmovl\t$__hip_fatbin_wrapper, %edi\n\tcallq\t__hipRegisterFatBinary\n\tmovq\t%rax, %rdi\n\tmovq\t%rax, __hip_gpubin_handle(%rip)\n.LBB3_2:\n\txorps\t%xmm0, %xmm0\n\tmovups\t%xmm0, 16(%rsp)\n\tmovups\t%xmm0, (%rsp)\n\tmovl\t$_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_, %esi\n\tmovl\t$.L__unnamed_1, %edx\n\tmovl\t$.L__unnamed_1, %ecx\n\tmovl\t$-1, %r8d\n\txorl\t%r9d, %r9d\n\tcallq\t__hipRegisterFunction\n\tmovl\t$__hip_module_dtor, %edi\n\taddq\t$40, %rsp\n\t.cfi_def_cfa_offset 8\n\tjmp\tatexit # TAILCALL\n.Lfunc_end3:\n\t.size\t__hip_module_ctor, .Lfunc_end3-__hip_module_ctor\n\t.cfi_endproc\n # -- End function\n\t.p2align\t4, 0x90 # -- Begin function __hip_module_dtor\n\t.type\t__hip_module_dtor,@function\n__hip_module_dtor: # @__hip_module_dtor\n\t.cfi_startproc\n# %bb.0:\n\tmovq\t__hip_gpubin_handle(%rip), %rdi\n\ttestq\t%rdi, %rdi\n\tje\t.LBB4_2\n# %bb.1:\n\tpushq\t%rax\n\t.cfi_def_cfa_offset 16\n\tcallq\t__hipUnregisterFatBinary\n\tmovq\t$0, __hip_gpubin_handle(%rip)\n\taddq\t$8, %rsp\n\t.cfi_def_cfa_offset 8\n.LBB4_2:\n\tretq\n.Lfunc_end4:\n\t.size\t__hip_module_dtor, .Lfunc_end4-__hip_module_dtor\n\t.cfi_endproc\n # -- End function\n\t.type\t_ZStL8__ioinit,@object # @_ZStL8__ioinit\n\t.local\t_ZStL8__ioinit\n\t.comm\t_ZStL8__ioinit,1,1\n\t.hidden\t__dso_handle\n\t.type\t_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_,@object # @_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.section\t.rodata,\"a\",@progbits\n\t.globl\t_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.p2align\t3, 0x0\n_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_:\n\t.quad\t_Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_\n\t.size\t_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_, 8\n\n\t.type\t.L.str,@object # @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.L.str:\n\t.asciz\t\"Failed to allocate device memory for input\"\n\t.size\t.L.str, 43\n\n\t.type\t.L.str.1,@object # @.str.1\n.L.str.1:\n\t.asciz\t\"Failed to allocate device memory for output\"\n\t.size\t.L.str.1, 44\n\n\t.type\t.L.str.2,@object # @.str.2\n.L.str.2:\n\t.asciz\t\"Failed to copy input data to device\"\n\t.size\t.L.str.2, 36\n\n\t.type\t.L.str.3,@object # @.str.3\n.L.str.3:\n\t.asciz\t\"Kernel launch failed: \"\n\t.size\t.L.str.3, 23\n\n\t.type\t.L.str.4,@object # @.str.4\n.L.str.4:\n\t.asciz\t\"Failed to copy output data to host\"\n\t.size\t.L.str.4, 35\n\n\t.type\t.L.str.5,@object # @.str.5\n.L.str.5:\n\t.asciz\t\"Output results:\"\n\t.size\t.L.str.5, 16\n\n\t.type\t.L.str.6,@object # @.str.6\n.L.str.6:\n\t.asciz\t\"Output[\"\n\t.size\t.L.str.6, 8\n\n\t.type\t.L.str.7,@object # @.str.7\n.L.str.7:\n\t.asciz\t\"] = (\"\n\t.size\t.L.str.7, 6\n\n\t.type\t.L.str.8,@object # @.str.8\n.L.str.8:\n\t.asciz\t\", \"\n\t.size\t.L.str.8, 3\n\n\t.type\t.L.str.9,@object # @.str.9\n.L.str.9:\n\t.asciz\t\"i)\"\n\t.size\t.L.str.9, 3\n\n\t.type\t.L__unnamed_1,@object # @0\n.L__unnamed_1:\n\t.asciz\t\"_Z18z_transform_kernelP15HIP_vector_typeIfLj2EES1_\"\n\t.size\t.L__unnamed_1, 51\n\n\t.type\t__hip_fatbin_wrapper,@object # @__hip_fatbin_wrapper\n\t.section\t.hipFatBinSegment,\"a\",@progbits\n\t.p2align\t3, 0x0\n__hip_fatbin_wrapper:\n\t.long\t1212764230 # 0x48495046\n\t.long\t1 # 0x1\n\t.quad\t__hip_fatbin\n\t.quad\t0\n\t.size\t__hip_fatbin_wrapper, 24\n\n\t.type\t__hip_gpubin_handle,@object # @__hip_gpubin_handle\n\t.local\t__hip_gpubin_handle\n\t.comm\t__hip_gpubin_handle,8,8\n\t.section\t.init_array,\"aw\",@init_array\n\t.p2align\t3, 0x0\n\t.quad\t_GLOBAL__sub_I_cuda_code_009823.hip\n\t.quad\t__hip_module_ctor\n\t.type\t__hip_cuid_,@object # @__hip_cuid_\n\t.bss\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 # 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n"}}},{"rowIdx":95,"cells":{"id":{"kind":"string","value":"cadfe59e7b8df060cb287d48458fb9ea5211a85a_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z18compact2d_1D_arrayPiS_S_S_S_S_i --------------------------\n .section .text._Z18compact2d_1D_arrayPiS_S_S_S_S_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=37\"\n .align 128\n\n\n\n\n .global _Z18compact2d_1D_arrayPiS_S_S_S_S_i\n .type _Z18compact2d_1D_arrayPiS_S_S_S_S_i,@function\n .size _Z18compact2d_1D_arrayPiS_S_S_S_S_i,(.L_x_5 - _Z18compact2d_1D_arrayPiS_S_S_S_S_i)\n .other _Z18compact2d_1D_arrayPiS_S_S_S_S_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z18compact2d_1D_arrayPiS_S_S_S_S_i:\n.text._Z18compact2d_1D_arrayPiS_S_S_S_S_i:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ IADD3 R1, R1, -0x10, RZ ;\n /*0020*/ S2R R0, SR_LMEMHIOFF ;\n /*0030*/ ISETP.GE.U32.AND P0, PT, R1, R0, PT ;\n /*0040*/ @P0 BRA `(.L_x_0) ;\n /*0050*/ BPT.TRAP 0x1 ;\n.L_x_0:\n /*0060*/ MOV R16, c[0x0][0x118] ;\n /*0070*/ MOV R17, c[0x0][0x11c] ;\n /*0080*/ IADD3 R0, R1, RZ, RZ ;\n /*0090*/ MOV R0, R0 ;\n /*00a0*/ MOV R2, R0 ;\n /*00b0*/ MOV R3, RZ ;\n /*00c0*/ MOV R22, R2 ;\n /*00d0*/ MOV R19, R3 ;\n /*00e0*/ MOV R22, R22 ;\n /*00f0*/ MOV R19, R19 ;\n /*0100*/ MOV R18, c[0x0][0x20] ;\n /*0110*/ MOV R7, c[0x0][0x24] ;\n /*0120*/ IADD3 R18, P0, R22, R18, RZ ;\n /*0130*/ IADD3.X R7, R19, R7, RZ, P0, !PT ;\n /*0140*/ MOV R2, RZ ;\n /*0150*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0160*/ MOV R0, R2 ;\n /*0170*/ MOV R2, R3 ;\n /*0180*/ MOV R0, R0 ;\n /*0190*/ MOV R2, R2 ;\n /*01a0*/ MOV R4, 0x8 ;\n /*01b0*/ LDC.64 R4, c[0x0][R4+0x160] ;\n /*01c0*/ MOV R34, R4 ;\n /*01d0*/ MOV R33, R5 ;\n /*01e0*/ MOV R34, R34 ;\n /*01f0*/ MOV R33, R33 ;\n /*0200*/ MOV R4, 0x10 ;\n /*0210*/ LDC.64 R4, c[0x0][R4+0x160] ;\n /*0220*/ MOV R32, R4 ;\n /*0230*/ MOV R31, R5 ;\n /*0240*/ MOV R32, R32 ;\n /*0250*/ MOV R31, R31 ;\n /*0260*/ MOV R4, 0x18 ;\n /*0270*/ LDC.64 R4, c[0x0][R4+0x160] ;\n /*0280*/ MOV R30, R4 ;\n /*0290*/ MOV R29, R5 ;\n /*02a0*/ MOV R30, R30 ;\n /*02b0*/ MOV R29, R29 ;\n /*02c0*/ MOV R4, 0x20 ;\n /*02d0*/ LDC.64 R4, c[0x0][R4+0x160] ;\n /*02e0*/ MOV R3, R4 ;\n /*02f0*/ MOV R5, R5 ;\n /*0300*/ MOV R4, R3 ;\n /*0310*/ MOV R3, R5 ;\n /*0320*/ MOV R5, 0x30 ;\n /*0330*/ LDC R5, c[0x0][R5+0x160] ;\n /*0340*/ MOV R5, R5 ;\n /*0350*/ S2R R6, SR_CTAID.X ;\n /*0360*/ MOV R6, R6 ;\n /*0370*/ MOV R28, c[0x0][0x0] ;\n /*0380*/ S2R R8, SR_TID.X ;\n /*0390*/ MOV R8, R8 ;\n /*03a0*/ IMAD R6, R28, R6, R8 ;\n /*03b0*/ ISETP.LT.AND P0, PT, R6, 0x1, PT ;\n /*03c0*/ ISETP.GE.AND P1, PT, R6, R5, PT ;\n /*03d0*/ PLOP3.LUT P0, PT, P0, P1, PT, 0xa8, 0x0 ;\n /*03e0*/ MOV R22, R22 ;\n /*03f0*/ MOV R19, R19 ;\n /*0400*/ MOV R18, R18 ;\n /*0410*/ MOV R7, R7 ;\n /*0420*/ MOV R10, R0 ;\n /*0430*/ MOV R23, R2 ;\n /*0440*/ MOV R34, R34 ;\n /*0450*/ MOV R33, R33 ;\n /*0460*/ MOV R32, R32 ;\n /*0470*/ MOV R31, R31 ;\n /*0480*/ MOV R30, R30 ;\n /*0490*/ MOV R29, R29 ;\n /*04a0*/ MOV R4, R4 ;\n /*04b0*/ MOV R0, R3 ;\n /*04c0*/ MOV R28, R28 ;\n /*04d0*/ MOV R24, R6 ;\n /*04e0*/ @P0 BRA `(.L_x_1) ;\n /*04f0*/ MOV R11, R4 ;\n /*0500*/ MOV R0, R0 ;\n /*0510*/ IMAD.WIDE R2, R24, 0x4, RZ ;\n /*0520*/ MOV R4, R2 ;\n /*0530*/ MOV R2, R3 ;\n /*0540*/ IADD3 R11, P0, R11, R4, RZ ;\n /*0550*/ IADD3.X R0, R0, R2, RZ, P0, !PT ;\n /*0560*/ MOV R10, R10 ;\n /*0570*/ MOV R23, R23 ;\n /*0580*/ IADD3 R10, P0, R10, R4, RZ ;\n /*0590*/ IADD3.X R23, R23, R2, RZ, P0, !PT ;\n /*05a0*/ IADD3 R2, P0, R10, -0x4, RZ ;\n /*05b0*/ IADD3.X R3, R23, -0x1, RZ, P0, !PT ;\n /*05c0*/ MOV R2, R2 ;\n /*05d0*/ MOV R3, R3 ;\n /*05e0*/ MOV R2, R2 ;\n /*05f0*/ MOV R3, R3 ;\n /*0600*/ R2UR UR4, R16 ;\n /*0610*/ R2UR UR5, R17 ;\n /*0620*/ LDG.E R27, [R2.64] ;\n /*0630*/ MOV R2, R10 ;\n /*0640*/ MOV R3, R23 ;\n /*0650*/ MOV R2, R2 ;\n /*0660*/ MOV R3, R3 ;\n /*0670*/ R2UR UR4, R16 ;\n /*0680*/ R2UR UR5, R17 ;\n /*0690*/ LDG.E R26, [R2.64] ;\n /*06a0*/ MOV R2, R11 ;\n /*06b0*/ MOV R3, R0 ;\n /*06c0*/ MOV R2, R2 ;\n /*06d0*/ MOV R3, R3 ;\n /*06e0*/ R2UR UR4, R16 ;\n /*06f0*/ R2UR UR5, R17 ;\n /*0700*/ LDG.E R25, [R2.64] ;\n /*0710*/ IADD3 R18, P0, R18, RZ, RZ ;\n /*0720*/ IADD3.X R7, R7, RZ, RZ, P0, !PT ;\n /*0730*/ IADD3 R22, P0, R22, RZ, RZ ;\n /*0740*/ IADD3.X R19, R19, RZ, RZ, P0, !PT ;\n /*0750*/ MOV R2, R22 ;\n /*0760*/ MOV R3, R19 ;\n /*0770*/ STL.128 [R2], R24 ;\n /*0780*/ MOV R4, c[0x4][0x8] ;\n /*0790*/ MOV R5, c[0x4][0xc] ;\n /*07a0*/ MOV R4, R4 ;\n /*07b0*/ MOV R5, R5 ;\n /*07c0*/ MOV R4, R4 ;\n /*07d0*/ MOV R5, R5 ;\n /*07e0*/ MOV R6, R18 ;\n /*07f0*/ MOV R7, R7 ;\n /*0800*/ MOV R2, 0x0 ;\n /*0810*/ MOV R2, R2 ;\n /*0820*/ LDC.64 R2, c[0x4][R2] ;\n /*0830*/ MOV R8, R2 ;\n /*0840*/ MOV R9, R3 ;\n /*0850*/ MOV R8, R8 ;\n /*0860*/ MOV R9, R9 ;\n /*0870*/ MOV R8, R8 ;\n /*0880*/ MOV R9, R9 ;\n /*0890*/ MOV R27, R11 ;\n /*08a0*/ MOV R26, R0 ;\n /*08b0*/ MOV R25, R10 ;\n /*08c0*/ MOV R23, R23 ;\n /*08d0*/ MOV R18, R18 ;\n /*08e0*/ MOV R2, R7 ;\n /*08f0*/ MOV R22, R22 ;\n /*0900*/ MOV R19, R19 ;\n /*0910*/ LEPC R10 ;\n /*0920*/ MOV R20, 0x990 ;\n /*0930*/ MOV R21, 0x0 ;\n /*0940*/ MOV R0, 0x910 ;\n /*0950*/ MOV R3, 0x0 ;\n /*0960*/ IADD3 R20, P0, P1, -R0, R20, R10 ;\n /*0970*/ IADD3.X R21, ~R3, R21, R11, P0, P1 ;\n /*0980*/ CALL.ABS.NOINC R8 ;\n /*0990*/ MOV R4, R27 ;\n /*09a0*/ MOV R5, R26 ;\n /*09b0*/ MOV R4, R4 ;\n /*09c0*/ MOV R5, R5 ;\n /*09d0*/ R2UR UR4, R16 ;\n /*09e0*/ R2UR UR5, R17 ;\n /*09f0*/ LDG.E R0, [R4.64] ;\n /*0a00*/ IADD3 R4, P0, R27, -0x4, RZ ;\n /*0a10*/ IADD3.X R5, R26, -0x1, RZ, P0, !PT ;\n /*0a20*/ MOV R4, R4 ;\n /*0a30*/ MOV R5, R5 ;\n /*0a40*/ MOV R4, R4 ;\n /*0a50*/ MOV R5, R5 ;\n /*0a60*/ R2UR UR4, R16 ;\n /*0a70*/ R2UR UR5, R17 ;\n /*0a80*/ LDG.E R4, [R4.64] ;\n /*0a90*/ ISETP.EQ.AND P0, PT, R0, R4, PT ;\n /*0aa0*/ MOV R0, R0 ;\n /*0ab0*/ BSSY B0, `(.L_x_2) ;\n /*0ac0*/ @P0 BRA `(.L_x_3) ;\n /*0ad0*/ IADD3 R4, P0, R25, -0x4, RZ ;\n /*0ae0*/ IADD3.X R5, R23, -0x1, RZ, P0, !PT ;\n /*0af0*/ MOV R4, R4 ;\n /*0b00*/ MOV R5, R5 ;\n /*0b10*/ MOV R4, R4 ;\n /*0b20*/ MOV R5, R5 ;\n /*0b30*/ R2UR UR4, R16 ;\n /*0b40*/ R2UR UR5, R17 ;\n /*0b50*/ LDG.E R3, [R4.64] ;\n /*0b60*/ MOV R34, R34 ;\n /*0b70*/ MOV R33, R33 ;\n /*0b80*/ IMAD.WIDE R4, R0, 0x4, RZ ;\n /*0b90*/ MOV R0, R4 ;\n /*0ba0*/ MOV R5, R5 ;\n /*0bb0*/ IADD3 R4, P0, R34, R0, RZ ;\n /*0bc0*/ IADD3.X R5, R33, R5, RZ, P0, !PT ;\n /*0bd0*/ MOV R4, R4 ;\n /*0be0*/ MOV R5, R5 ;\n /*0bf0*/ MOV R4, R4 ;\n /*0c00*/ MOV R5, R5 ;\n /*0c10*/ R2UR UR4, R16 ;\n /*0c20*/ R2UR UR5, R17 ;\n /*0c30*/ STG.E [R4.64], R3 ;\n /*0c40*/ MOV R4, R27 ;\n /*0c50*/ MOV R5, R26 ;\n /*0c60*/ MOV R4, R4 ;\n /*0c70*/ MOV R5, R5 ;\n /*0c80*/ R2UR UR4, R16 ;\n /*0c90*/ R2UR UR5, R17 ;\n /*0ca0*/ LDG.E R4, [R4.64] ;\n /*0cb0*/ MOV R32, R32 ;\n /*0cc0*/ MOV R31, R31 ;\n /*0cd0*/ IMAD.WIDE R4, R4, 0x4, RZ ;\n /*0ce0*/ MOV R3, R4 ;\n /*0cf0*/ MOV R6, R5 ;\n /*0d00*/ IADD3 R3, P0, R32, R3, RZ ;\n /*0d10*/ IADD3.X R6, R31, R6, RZ, P0, !PT ;\n /*0d20*/ IADD3 R0, R24, -0x1, RZ ;\n /*0d30*/ MOV R4, R0 ;\n /*0d40*/ MOV R5, R28 ;\n /*0d50*/ MOV R0, R3 ;\n /*0d60*/ MOV R3, R6 ;\n /*0d70*/ MOV R4, R4 ;\n /*0d80*/ MOV R5, R5 ;\n /*0d90*/ MOV R4, R4 ;\n /*0da0*/ MOV R5, R5 ;\n /*0db0*/ MOV R4, R4 ;\n /*0dc0*/ MOV R5, R5 ;\n /*0dd0*/ I2F.U32.RP R6, R5 ;\n /*0de0*/ MUFU.RCP R6, R6 ;\n /*0df0*/ MOV R6, R6 ;\n /*0e00*/ IADD3 R6, R6, 0xffffffe, RZ ;\n /*0e10*/ MOV R6, R6 ;\n /*0e20*/ F2I.FTZ.U32.TRUNC.NTZ R6, R6 ;\n /*0e30*/ IMAD.U32 R7, R6, R5, RZ ;\n /*0e40*/ IADD3 R7, RZ, -R7, RZ ;\n /*0e50*/ MOV R7, R7 ;\n /*0e60*/ MOV R7, R7 ;\n /*0e70*/ IMAD.HI.U32 R7, R6, R7, RZ ;\n /*0e80*/ IADD3 R7, R6, R7, RZ ;\n /*0e90*/ IMAD.HI.U32 R7, R7, R4, RZ ;\n /*0ea0*/ IMAD.U32 R7, R7, R5, RZ ;\n /*0eb0*/ IADD3 R7, R4, -R7, RZ ;\n /*0ec0*/ ISETP.GE.U32.AND P0, PT, R7, R5, PT ;\n /*0ed0*/ IADD3 R4, R7, -R5, RZ ;\n /*0ee0*/ SEL R4, R4, R7, P0 ;\n /*0ef0*/ IADD3 R6, R4, -R5, RZ ;\n /*0f00*/ ISETP.GE.U32.AND P0, PT, R4, R5, PT ;\n /*0f10*/ SEL R6, R6, R4, P0 ;\n /*0f20*/ MOV R4, RZ ;\n /*0f30*/ ISETP.NE.U32.AND P0, PT, R5, R4, PT ;\n /*0f40*/ LOP3.LUT R5, RZ, R5, RZ, 0x33, !PT ;\n /*0f50*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x0 ;\n /*0f60*/ SEL R5, R5, R6, P0 ;\n /*0f70*/ MOV R5, R5 ;\n /*0f80*/ MOV R5, R5 ;\n /*0f90*/ MOV R6, R5 ;\n /*0fa0*/ MOV R0, R0 ;\n /*0fb0*/ MOV R3, R3 ;\n /*0fc0*/ MOV R4, R0 ;\n /*0fd0*/ MOV R5, R3 ;\n /*0fe0*/ R2UR UR4, R16 ;\n /*0ff0*/ R2UR UR5, R17 ;\n /*1000*/ STG.E [R4.64], R6 ;\n.L_x_3:\n /*1010*/ BSYNC B0 ;\n.L_x_2:\n /*1020*/ IADD3 R0, R28, -0x1, RZ ;\n /*1030*/ MOV R3, R24 ;\n /*1040*/ MOV R4, R0 ;\n /*1050*/ MOV R0, R0 ;\n /*1060*/ MOV R3, R3 ;\n /*1070*/ MOV R4, R4 ;\n /*1080*/ MOV R3, R3 ;\n /*1090*/ MOV R4, R4 ;\n /*10a0*/ MOV R3, R3 ;\n /*10b0*/ MOV R4, R4 ;\n /*10c0*/ I2F.U32.RP R5, R4 ;\n /*10d0*/ MUFU.RCP R5, R5 ;\n /*10e0*/ MOV R5, R5 ;\n /*10f0*/ IADD3 R5, R5, 0xffffffe, RZ ;\n /*1100*/ MOV R5, R5 ;\n /*1110*/ F2I.FTZ.U32.TRUNC.NTZ R5, R5 ;\n /*1120*/ IMAD.U32 R6, R5, R4, RZ ;\n /*1130*/ IADD3 R6, RZ, -R6, RZ ;\n /*1140*/ MOV R6, R6 ;\n /*1150*/ MOV R6, R6 ;\n /*1160*/ IMAD.HI.U32 R6, R5, R6, RZ ;\n /*1170*/ IADD3 R6, R5, R6, RZ ;\n /*1180*/ IMAD.HI.U32 R6, R6, R3, RZ ;\n /*1190*/ IMAD.U32 R5, R6, R4, RZ ;\n /*11a0*/ IADD3 R7, R6, 0x1, RZ ;\n /*11b0*/ IADD3 R5, R3, -R5, RZ ;\n /*11c0*/ ISETP.GE.U32.AND P0, PT, R5, R4, PT ;\n /*11d0*/ SEL R7, R7, R6, P0 ;\n /*11e0*/ IADD3 R3, R7, 0x1, RZ ;\n /*11f0*/ IADD3 R6, R5, -R4, RZ ;\n /*1200*/ SEL R6, R6, R5, P0 ;\n /*1210*/ ISETP.GE.U32.AND P0, PT, R6, R4, PT ;\n /*1220*/ SEL R3, R3, R7, P0 ;\n /*1230*/ MOV R5, RZ ;\n /*1240*/ ISETP.NE.U32.AND P0, PT, R4, R5, PT ;\n /*1250*/ LOP3.LUT R4, RZ, R4, RZ, 0x33, !PT ;\n /*1260*/ PLOP3.LUT P0, PT, P0, PT, PT, 0x8, 0x0 ;\n /*1270*/ SEL R3, R4, R3, P0 ;\n /*1280*/ MOV R3, R3 ;\n /*1290*/ MOV R3, R3 ;\n /*12a0*/ MOV R3, R3 ;\n /*12b0*/ IMAD R0, R3, R0, RZ ;\n /*12c0*/ IADD3 R0, R24, -R0, RZ ;\n /*12d0*/ ISETP.NE.AND P0, PT, R0, RZ, PT ;\n /*12e0*/ MOV R23, R3 ;\n /*12f0*/ @P0 BRA `(.L_x_1) ;\n /*1300*/ MOV R4, R27 ;\n /*1310*/ MOV R5, R26 ;\n /*1320*/ MOV R4, R4 ;\n /*1330*/ MOV R5, R5 ;\n /*1340*/ R2UR UR4, R16 ;\n /*1350*/ R2UR UR5, R17 ;\n /*1360*/ LDG.E R5, [R4.64] ;\n /*1370*/ MOV R4, RZ ;\n /*1380*/ MOV R22, R22 ;\n /*1390*/ MOV R19, R19 ;\n /*13a0*/ STL.64 [R22], R4 ;\n /*13b0*/ MOV R4, c[0x4][0x10] ;\n /*13c0*/ MOV R5, c[0x4][0x14] ;\n /*13d0*/ MOV R4, R4 ;\n /*13e0*/ MOV R5, R5 ;\n /*13f0*/ MOV R4, R4 ;\n /*1400*/ MOV R5, R5 ;\n /*1410*/ MOV R6, R18 ;\n /*1420*/ MOV R7, R2 ;\n /*1430*/ MOV R0, 0x0 ;\n /*1440*/ MOV R0, R0 ;\n /*1450*/ LDC.64 R2, c[0x4][R0] ;\n /*1460*/ MOV R10, R2 ;\n /*1470*/ MOV R11, R3 ;\n /*1480*/ MOV R10, R10 ;\n /*1490*/ MOV R11, R11 ;\n /*14a0*/ MOV R10, R10 ;\n /*14b0*/ MOV R11, R11 ;\n /*14c0*/ LEPC R2 ;\n /*14d0*/ MOV R20, 0x1540 ;\n /*14e0*/ MOV R21, 0x0 ;\n /*14f0*/ MOV R0, 0x14c0 ;\n /*1500*/ MOV R8, 0x0 ;\n /*1510*/ IADD3 R20, P0, P1, -R0, R20, R2 ;\n /*1520*/ IADD3.X R21, ~R8, R21, R3, P0, P1 ;\n /*1530*/ CALL.ABS.NOINC R10 ;\n /*1540*/ MOV R2, R27 ;\n /*1550*/ MOV R3, R26 ;\n /*1560*/ MOV R2, R2 ;\n /*1570*/ MOV R3, R3 ;\n /*1580*/ R2UR UR4, R16 ;\n /*1590*/ R2UR UR5, R17 ;\n /*15a0*/ LDG.E R0, [R2.64] ;\n /*15b0*/ MOV R30, R30 ;\n /*15c0*/ MOV R29, R29 ;\n /*15d0*/ IMAD.WIDE R2, R23, 0x4, RZ ;\n /*15e0*/ MOV R4, R2 ;\n /*15f0*/ MOV R3, R3 ;\n /*1600*/ IADD3 R2, P0, R30, R4, RZ ;\n /*1610*/ IADD3.X R3, R29, R3, RZ, P0, !PT ;\n /*1620*/ MOV R2, R2 ;\n /*1630*/ MOV R3, R3 ;\n /*1640*/ MOV R2, R2 ;\n /*1650*/ MOV R3, R3 ;\n /*1660*/ R2UR UR4, R16 ;\n /*1670*/ R2UR UR5, R17 ;\n /*1680*/ STG.E [R2.64], R0 ;\n.L_x_1:\n /*1690*/ EXIT ;\n.L_x_4:\n /*16a0*/ BRA `(.L_x_4);\n /*16b0*/ NOP;\n /*16c0*/ NOP;\n /*16d0*/ NOP;\n /*16e0*/ NOP;\n /*16f0*/ NOP;\n /*1700*/ NOP;\n /*1710*/ NOP;\n /*1720*/ NOP;\n /*1730*/ NOP;\n /*1740*/ NOP;\n /*1750*/ NOP;\n /*1760*/ NOP;\n /*1770*/ NOP;\n.L_x_5:\n\n\n//--------------------- SYMBOLS --------------------------\n\n .type vprintf,@function\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z18compact2d_1D_arrayPiS_S_S_S_S_i ; -- Begin function _Z18compact2d_1D_arrayPiS_S_S_S_S_i\n\t.globl\t_Z18compact2d_1D_arrayPiS_S_S_S_S_i\n\t.p2align\t8\n\t.type\t_Z18compact2d_1D_arrayPiS_S_S_S_S_i,@function\n_Z18compact2d_1D_arrayPiS_S_S_S_S_i: ; @_Z18compact2d_1D_arrayPiS_S_S_S_S_i\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s2, s[0:1], 0x44\n\ts_load_b32 s3, s[0:1], 0x30\n\ts_add_u32 s4, s0, 56\n\ts_addc_u32 s5, s1, 0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s18, s2, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[2:3], null, s15, s18, v[0:1]\n\tv_cmp_lt_i32_e32 vcc_lo, 0, v2\n\tv_cmp_gt_i32_e64 s2, s3, v2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s2, vcc_lo, s2\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_427\n; %bb.1:\n\ts_clause 0x1\n\ts_load_b64 s[6:7], s[0:1], 0x20\n\ts_load_b64 s[2:3], s[0:1], 0x0\n\tv_mbcnt_lo_u32_b32 v34, -1, 0\n\tv_mov_b32_e32 v3, 0\n\tv_dual_mov_b32 v6, 0 :: v_dual_add_nc_u32 v35, -1, v2\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v36, v3\n\tv_lshlrev_b64 v[0:1], 2, v[2:3]\n\tv_lshlrev_b64 v[4:5], 2, v[35:36]\n\ts_waitcnt lgkmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v32, vcc_lo, s6, v0\n\tv_add_co_ci_u32_e32 v33, vcc_lo, s7, v1, vcc_lo\n\tv_add_co_u32 v0, vcc_lo, s2, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo\n\tv_add_co_u32 v37, vcc_lo, s2, v4\n\tv_add_co_ci_u32_e32 v38, vcc_lo, s3, v5, vcc_lo\n\tglobal_load_b32 v11, v[32:33], off\n\ts_clause 0x1\n\tglobal_load_b32 v8, v[0:1], off\n\tglobal_load_b32 v5, v[37:38], off\n\ts_load_b64 s[4:5], s[4:5], 0x50\n\tv_mov_b32_e32 v0, v34\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s2, v0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_7\n; %bb.2:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s8, exec_lo\n\ts_waitcnt lgkmcnt(0)\n\tglobal_load_b64 v[14:15], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[6:7], v1, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v7, v15\n\tv_and_b32_e32 v6, v6, v14\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v7, v6, 24\n\tv_mul_lo_u32 v6, v6, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v7, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v6, vcc_lo, v9, v6\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v7, vcc_lo, v10, v4, vcc_lo\n\tglobal_load_b64 v[12:13], v[6:7], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[6:7], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[6:7], v[14:15]\n\ts_cbranch_execz .LBB0_6\n; %bb.3:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_4: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b64 v[12:13], v1, s[4:5]\n\tv_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v4, v9, v14\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[6:7], null, v4, 24, v[12:13]\n\tv_and_b32_e32 v12, v10, v15\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[9:10], null, v12, 24, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mov_b32_e32 v7, v9\n\tglobal_load_b64 v[12:13], v[6:7], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[6:7], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[6:7], v[14:15]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_4\n; %bb.5:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_6:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_7:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s8, v6\n\tv_readfirstlane_b32 s9, v7\n\ts_mov_b32 s12, exec_lo\n\ts_waitcnt lgkmcnt(0)\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b128 v[12:15], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v9\n\tv_readfirstlane_b32 s11, v10\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_9\n; %bb.8:\n\tv_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v17, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v6, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s13, v13, vcc_lo\n\tglobal_store_b128 v[6:7], v[16:19], off offset:8\n.LBB0_9:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[12:13], s[10:11], 12\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v4, vcc_lo, v14, s12\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s13, v15, vcc_lo\n\tv_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v14, 33\n\ts_mov_b32 s12, 0\n\ts_delay_alu instid0(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v4, v0\n\ts_mov_b32 s15, s12\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo\n\tv_dual_mov_b32 v16, v15 :: v_dual_mov_b32 v21, s15\n\tv_dual_mov_b32 v17, v15 :: v_dual_mov_b32 v20, s14\n\tv_dual_mov_b32 v19, s13 :: v_dual_mov_b32 v18, s12\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[14:17], off\n\tglobal_store_b128 v[0:1], v[18:21], off offset:16\n\tglobal_store_b128 v[0:1], v[18:21], off offset:32\n\tglobal_store_b128 v[0:1], v[18:21], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_17\n; %bb.10:\n\tv_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v17, s9\n\tv_mov_b32_e32 v16, s8\n\ts_clause 0x1\n\tglobal_load_b64 v[18:19], v4, s[4:5] offset:32 glc\n\tglobal_load_b64 v[6:7], v4, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v6\n\tv_readfirstlane_b32 s13, v7\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v6, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s14, v13, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[6:7], v[18:19], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[16:17], v4, v[16:19], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[16:17], v[18:19]\n\ts_cbranch_execz .LBB0_13\n; %bb.11:\n\ts_mov_b32 s13, 0\n.LBB0_12: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v14, s8 :: v_dual_mov_b32 v15, s9\n\ts_sleep 1\n\tglobal_store_b64 v[6:7], v[16:17], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[14:17], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[16:17]\n\tv_dual_mov_b32 v17, v10 :: v_dual_mov_b32 v16, v9\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_12\n.LBB0_13:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v4, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_load_b64 v[6:7], v4, s[4:5] offset:16\n\tv_mbcnt_lo_u32_b32 v4, s13, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_eq_u32_e32 0, v4\n\ts_cbranch_execz .LBB0_15\n; %bb.14:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v9, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[6:7], v[9:10], off offset:8\n.LBB0_15:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[9:10], v[6:7], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]\n\ts_cbranch_vccnz .LBB0_17\n; %bb.16:\n\tglobal_load_b32 v6, v[6:7], off offset:24\n\tv_mov_b32_e32 v7, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v6\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[9:10], v[6:7], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_17:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v4, vcc_lo, v12, s3\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v13, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v6, vcc_lo, v4, 20\n\tv_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo\n\ts_branch .LBB0_21\n\t.p2align\t6\n.LBB0_18: ; in Loop: Header=BB0_21 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v4\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_20\n; %bb.19: ; in Loop: Header=BB0_21 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_21\n\ts_branch .LBB0_23\n\t.p2align\t6\n.LBB0_20:\n\ts_branch .LBB0_23\n.LBB0_21: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v4, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_18\n; %bb.22: ; in Loop: Header=BB0_21 Depth=1\n\tglobal_load_b32 v4, v[6:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v4, 1, v4\n\ts_branch .LBB0_18\n.LBB0_23:\n\tglobal_load_b64 v[6:7], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_27\n; %bb.24:\n\tv_mov_b32_e32 v4, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v4, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v4, s[4:5] offset:24 glc\n\tglobal_load_b64 v[14:15], v4, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v16, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v17, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v12, vcc_lo, v16, s8\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s9, v17, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]\n\tv_dual_cndmask_b32 v13, v13, v17 :: v_dual_cndmask_b32 v12, v12, v16\n\tv_and_b32_e32 v1, v13, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v0, v12, v0\n\tv_mul_lo_u32 v1, v1, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v16, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\tv_add_nc_u32_e32 v1, v16, v1\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v14, v0\n\tv_mov_b32_e32 v14, v9\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v15, v1, vcc_lo\n\tv_mov_b32_e32 v15, v10\n\tglobal_store_b64 v[0:1], v[9:10], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[14:15], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[14:15], v[9:10]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_27\n; %bb.25:\n\ts_mov_b32 s2, 0\n.LBB0_26: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[14:15]\n\tv_dual_mov_b32 v15, v10 :: v_dual_mov_b32 v14, v9\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_26\n.LBB0_27:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_getpc_b64 s[8:9]\n\ts_add_u32 s8, s8, .str@rel32@lo+4\n\ts_addc_u32 s9, s9, .str@rel32@hi+12\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_cmp_lg_u64 s[8:9], 0\n\ts_cbranch_scc0 .LBB0_105\n; %bb.28:\n\ts_waitcnt vmcnt(0)\n\tv_dual_mov_b32 v10, 0 :: v_dual_and_b32 v9, 2, v6\n\tv_and_b32_e32 v0, -3, v6\n\ts_mov_b64 s[10:11], 53\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_dual_mov_b32 v1, v7 :: v_dual_mov_b32 v40, v10\n\tv_mov_b32_e32 v39, v9\n\ts_branch .LBB0_30\n.LBB0_29: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_sub_u32 s10, s10, s12\n\ts_subb_u32 s11, s11, s13\n\ts_add_u32 s8, s8, s12\n\ts_addc_u32 s9, s9, s13\n\ts_cmp_lg_u64 s[10:11], 0\n\ts_cbranch_scc0 .LBB0_106\n.LBB0_30: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_33 Depth 2\n ; Child Loop BB0_40 Depth 2\n ; Child Loop BB0_47 Depth 2\n ; Child Loop BB0_54 Depth 2\n ; Child Loop BB0_61 Depth 2\n ; Child Loop BB0_68 Depth 2\n ; Child Loop BB0_75 Depth 2\n ; Child Loop BB0_82 Depth 2\n ; Child Loop BB0_90 Depth 2\n ; Child Loop BB0_99 Depth 2\n ; Child Loop BB0_104 Depth 2\n\tv_cmp_lt_u64_e64 s2, s[10:11], 56\n ; implicit-def: $vgpr14_vgpr15\n ; implicit-def: $sgpr20\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b32 s2, s2, exec_lo\n\ts_cselect_b32 s12, s10, 56\n\ts_cselect_b32 s13, s11, 0\n\ts_cmp_gt_u32 s12, 7\n\ts_mov_b32 s2, -1\n\ts_cbranch_scc1 .LBB0_35\n; %bb.31: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v14, 0\n\tv_mov_b32_e32 v15, 0\n\ts_cmp_eq_u32 s12, 0\n\ts_cbranch_scc1 .LBB0_34\n; %bb.32: ; in Loop: Header=BB0_30 Depth=1\n\ts_lshl_b64 s[2:3], s[12:13], 3\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], s[8:9]\n.LBB0_33: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tglobal_load_u8 v4, v10, s[16:17]\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_add_u32 s16, s16, 1\n\ts_addc_u32 s17, s17, 0\n\ts_cmp_lg_u32 s2, s14\n\tv_or_b32_e32 v14, v12, v14\n\tv_or_b32_e32 v15, v13, v15\n\ts_cbranch_scc1 .LBB0_33\n.LBB0_34: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s2, 0\n\ts_mov_b32 s20, 0\n.LBB0_35: ; in Loop: Header=BB0_30 Depth=1\n\ts_and_not1_b32 vcc_lo, exec_lo, s2\n\ts_mov_b64 s[2:3], s[8:9]\n\ts_cbranch_vccnz .LBB0_37\n; %bb.36: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[14:15], v10, s[8:9]\n\ts_add_i32 s20, s12, -8\n\ts_add_u32 s2, s8, 8\n\ts_addc_u32 s3, s9, 0\n.LBB0_37: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s20, 7\n\ts_cbranch_scc1 .LBB0_42\n; %bb.38: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v17, 0\n\ts_cmp_eq_u32 s20, 0\n\ts_cbranch_scc1 .LBB0_41\n; %bb.39: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], 0\n.LBB0_40: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s22, s2, s16\n\ts_addc_u32 s23, s3, s17\n\ts_add_u32 s16, s16, 1\n\tglobal_load_u8 v4, v10, s[22:23]\n\ts_addc_u32 s17, s17, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s20, s16\n\tv_or_b32_e32 v16, v12, v16\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v17, v13, v17\n\ts_cbranch_scc1 .LBB0_40\n.LBB0_41: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s19, 0\n\ts_cbranch_execz .LBB0_43\n\ts_branch .LBB0_44\n.LBB0_42: ; in Loop: Header=BB0_30 Depth=1\n ; implicit-def: $vgpr16_vgpr17\n ; implicit-def: $sgpr19\n.LBB0_43: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[16:17], v10, s[2:3]\n\ts_add_i32 s19, s20, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_44: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s19, 7\n\ts_cbranch_scc1 .LBB0_49\n; %bb.45: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v18, 0\n\tv_mov_b32_e32 v19, 0\n\ts_cmp_eq_u32 s19, 0\n\ts_cbranch_scc1 .LBB0_48\n; %bb.46: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], 0\n.LBB0_47: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s20, s2, s16\n\ts_addc_u32 s21, s3, s17\n\ts_add_u32 s16, s16, 1\n\tglobal_load_u8 v4, v10, s[20:21]\n\ts_addc_u32 s17, s17, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s19, s16\n\tv_or_b32_e32 v18, v12, v18\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v19, v13, v19\n\ts_cbranch_scc1 .LBB0_47\n.LBB0_48: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s20, 0\n\ts_cbranch_execz .LBB0_50\n\ts_branch .LBB0_51\n.LBB0_49: ; in Loop: Header=BB0_30 Depth=1\n ; implicit-def: $sgpr20\n.LBB0_50: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[18:19], v10, s[2:3]\n\ts_add_i32 s20, s19, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_51: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s20, 7\n\ts_cbranch_scc1 .LBB0_56\n; %bb.52: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v20, 0\n\tv_mov_b32_e32 v21, 0\n\ts_cmp_eq_u32 s20, 0\n\ts_cbranch_scc1 .LBB0_55\n; %bb.53: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], 0\n.LBB0_54: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s22, s2, s16\n\ts_addc_u32 s23, s3, s17\n\ts_add_u32 s16, s16, 1\n\tglobal_load_u8 v4, v10, s[22:23]\n\ts_addc_u32 s17, s17, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s20, s16\n\tv_or_b32_e32 v20, v12, v20\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v21, v13, v21\n\ts_cbranch_scc1 .LBB0_54\n.LBB0_55: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s19, 0\n\ts_cbranch_execz .LBB0_57\n\ts_branch .LBB0_58\n.LBB0_56: ; in Loop: Header=BB0_30 Depth=1\n ; implicit-def: $vgpr20_vgpr21\n ; implicit-def: $sgpr19\n.LBB0_57: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[20:21], v10, s[2:3]\n\ts_add_i32 s19, s20, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_58: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s19, 7\n\ts_cbranch_scc1 .LBB0_63\n; %bb.59: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v22, 0\n\tv_mov_b32_e32 v23, 0\n\ts_cmp_eq_u32 s19, 0\n\ts_cbranch_scc1 .LBB0_62\n; %bb.60: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], 0\n.LBB0_61: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s20, s2, s16\n\ts_addc_u32 s21, s3, s17\n\ts_add_u32 s16, s16, 1\n\tglobal_load_u8 v4, v10, s[20:21]\n\ts_addc_u32 s17, s17, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s19, s16\n\tv_or_b32_e32 v22, v12, v22\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v23, v13, v23\n\ts_cbranch_scc1 .LBB0_61\n.LBB0_62: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s20, 0\n\ts_cbranch_execz .LBB0_64\n\ts_branch .LBB0_65\n.LBB0_63: ; in Loop: Header=BB0_30 Depth=1\n ; implicit-def: $sgpr20\n.LBB0_64: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[22:23], v10, s[2:3]\n\ts_add_i32 s20, s19, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_65: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s20, 7\n\ts_cbranch_scc1 .LBB0_70\n; %bb.66: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v24, 0\n\tv_mov_b32_e32 v25, 0\n\ts_cmp_eq_u32 s20, 0\n\ts_cbranch_scc1 .LBB0_69\n; %bb.67: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], 0\n.LBB0_68: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s22, s2, s16\n\ts_addc_u32 s23, s3, s17\n\ts_add_u32 s16, s16, 1\n\tglobal_load_u8 v4, v10, s[22:23]\n\ts_addc_u32 s17, s17, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s20, s16\n\tv_or_b32_e32 v24, v12, v24\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v25, v13, v25\n\ts_cbranch_scc1 .LBB0_68\n.LBB0_69: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s19, 0\n\ts_cbranch_execz .LBB0_71\n\ts_branch .LBB0_72\n.LBB0_70: ; in Loop: Header=BB0_30 Depth=1\n ; implicit-def: $vgpr24_vgpr25\n ; implicit-def: $sgpr19\n.LBB0_71: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[24:25], v10, s[2:3]\n\ts_add_i32 s19, s20, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_72: ; in Loop: Header=BB0_30 Depth=1\n\ts_cmp_gt_u32 s19, 7\n\ts_cbranch_scc1 .LBB0_77\n; %bb.73: ; in Loop: Header=BB0_30 Depth=1\n\tv_mov_b32_e32 v26, 0\n\tv_mov_b32_e32 v27, 0\n\ts_cmp_eq_u32 s19, 0\n\ts_cbranch_scc1 .LBB0_76\n; %bb.74: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b64 s[14:15], 0\n\ts_mov_b64 s[16:17], s[2:3]\n.LBB0_75: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tglobal_load_u8 v4, v10, s[16:17]\n\ts_add_i32 s19, s19, -1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v9, 0xffff, v4\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], s14, v[9:10]\n\ts_add_u32 s14, s14, 8\n\ts_addc_u32 s15, s15, 0\n\ts_add_u32 s16, s16, 1\n\ts_addc_u32 s17, s17, 0\n\ts_cmp_lg_u32 s19, 0\n\tv_or_b32_e32 v26, v12, v26\n\tv_or_b32_e32 v27, v13, v27\n\ts_cbranch_scc1 .LBB0_75\n.LBB0_76: ; in Loop: Header=BB0_30 Depth=1\n\ts_cbranch_execz .LBB0_78\n\ts_branch .LBB0_79\n.LBB0_77: ; in Loop: Header=BB0_30 Depth=1\n.LBB0_78: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[26:27], v10, s[2:3]\n.LBB0_79: ; in Loop: Header=BB0_30 Depth=1\n\tv_dual_mov_b32 v9, v34 :: v_dual_mov_b32 v12, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v9\n\tv_mov_b32_e32 v13, 0\n\tv_cmp_eq_u32_e64 s2, s2, v9\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_85\n; %bb.80: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[30:31], v10, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[12:13], v10, s[4:5] offset:40\n\tglobal_load_b64 v[28:29], v10, s[4:5]\n\ts_mov_b32 s14, exec_lo\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v13, v31\n\tv_and_b32_e32 v12, v12, v30\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v13, v12, 24\n\tv_mul_lo_u32 v12, v12, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v13, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v12, vcc_lo, v28, v12\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v13, vcc_lo, v29, v4, vcc_lo\n\tglobal_load_b64 v[28:29], v[12:13], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[12:13], v10, v[28:31], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[12:13], v[30:31]\n\ts_cbranch_execz .LBB0_84\n; %bb.81: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s15, 0\n\t.p2align\t6\n.LBB0_82: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[28:29], v10, s[4:5] offset:40\n\tglobal_load_b64 v[41:42], v10, s[4:5]\n\tv_dual_mov_b32 v31, v13 :: v_dual_mov_b32 v30, v12\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v4, v28, v30\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[12:13], null, v4, 24, v[41:42]\n\tv_and_b32_e32 v41, v29, v31\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mov_b32_e32 v4, v13\n\tv_mad_u64_u32 v[28:29], null, v41, 24, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mov_b32_e32 v13, v28\n\tglobal_load_b64 v[28:29], v[12:13], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[12:13], v10, v[28:31], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[12:13], v[30:31]\n\ts_or_b32 s15, vcc_lo, s15\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s15\n\ts_cbranch_execnz .LBB0_82\n; %bb.83: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s15\n.LBB0_84: ; in Loop: Header=BB0_30 Depth=1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s14\n.LBB0_85: ; in Loop: Header=BB0_30 Depth=1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_clause 0x1\n\tglobal_load_b64 v[41:42], v10, s[4:5] offset:40\n\tglobal_load_b128 v[28:31], v10, s[4:5]\n\tv_readfirstlane_b32 s14, v12\n\tv_readfirstlane_b32 s15, v13\n\ts_mov_b32 s19, exec_lo\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s16, v41\n\tv_readfirstlane_b32 s17, v42\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[16:17], s[14:15], s[16:17]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_87\n; %bb.86: ; in Loop: Header=BB0_30 Depth=1\n\tv_dual_mov_b32 v41, s19 :: v_dual_mov_b32 v42, 0\n\ts_mul_i32 s19, s17, 24\n\ts_mul_hi_u32 s20, s16, 24\n\tv_dual_mov_b32 v43, 2 :: v_dual_mov_b32 v44, 1\n\ts_add_i32 s20, s20, s19\n\ts_mul_i32 s19, s16, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v12, vcc_lo, v28, s19\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s20, v29, vcc_lo\n\tglobal_store_b128 v[12:13], v[41:44], off offset:8\n.LBB0_87: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_cmp_gt_u64_e64 vcc_lo, s[10:11], 56\n\tv_or_b32_e32 v4, v1, v40\n\tv_or_b32_e32 v12, v0, v39\n\ts_lshl_b64 s[20:21], s[16:17], 12\n\ts_lshl_b32 s3, s12, 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_i32 s3, s3, 28\n\tv_cndmask_b32_e32 v13, v4, v1, vcc_lo\n\tv_cndmask_b32_e32 v4, v12, v0, vcc_lo\n\tv_lshlrev_b64 v[0:1], 6, v[9:10]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v30, s20\n\tv_add_co_ci_u32_e32 v30, vcc_lo, s21, v31, vcc_lo\n\ts_and_b32 s3, s3, 0x1e0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v9, v0\n\tv_and_or_b32 v12, v4, 0xffffff1f, s3\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v30, v1, vcc_lo\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[12:15], off\n\tglobal_store_b128 v[0:1], v[16:19], off offset:16\n\tglobal_store_b128 v[0:1], v[20:23], off offset:32\n\tglobal_store_b128 v[0:1], v[24:27], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_95\n; %bb.88: ; in Loop: Header=BB0_30 Depth=1\n\ts_clause 0x1\n\tglobal_load_b64 v[20:21], v10, s[4:5] offset:32 glc\n\tglobal_load_b64 v[12:13], v10, s[4:5] offset:40\n\tv_dual_mov_b32 v18, s14 :: v_dual_mov_b32 v19, s15\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s20, v12\n\tv_readfirstlane_b32 s21, v13\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[20:21], s[20:21], s[14:15]\n\ts_mul_i32 s19, s21, 24\n\ts_mul_hi_u32 s21, s20, 24\n\ts_mul_i32 s20, s20, 24\n\ts_add_i32 s21, s21, s19\n\tv_add_co_u32 v16, vcc_lo, v28, s20\n\tv_add_co_ci_u32_e32 v17, vcc_lo, s21, v29, vcc_lo\n\ts_mov_b32 s19, exec_lo\n\tglobal_store_b64 v[16:17], v[20:21], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[14:15], v10, v[18:21], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[14:15], v[20:21]\n\ts_cbranch_execz .LBB0_91\n; %bb.89: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s20, 0\n.LBB0_90: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_dual_mov_b32 v12, s14 :: v_dual_mov_b32 v13, s15\n\ts_sleep 1\n\tglobal_store_b64 v[16:17], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[12:13], v10, v[12:15], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[12:13], v[14:15]\n\tv_dual_mov_b32 v15, v13 :: v_dual_mov_b32 v14, v12\n\ts_or_b32 s20, vcc_lo, s20\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s20\n\ts_cbranch_execnz .LBB0_90\n.LBB0_91: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s19\n\tglobal_load_b64 v[12:13], v10, s[4:5] offset:16\n\ts_mov_b32 s20, exec_lo\n\ts_mov_b32 s19, exec_lo\n\tv_mbcnt_lo_u32_b32 v4, s20, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_eq_u32_e32 0, v4\n\ts_cbranch_execz .LBB0_93\n; %bb.92: ; in Loop: Header=BB0_30 Depth=1\n\ts_bcnt1_i32_b32 s20, s20\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v15, 0 :: v_dual_mov_b32 v14, s20\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[12:13], v[14:15], off offset:8\n.LBB0_93: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[14:15], v[12:13], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[14:15]\n\ts_cbranch_vccnz .LBB0_95\n; %bb.94: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b32 v9, v[12:13], off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s19, v9\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[14:15], v[9:10], off\n\ts_and_b32 m0, s19, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_95: ; in Loop: Header=BB0_30 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s17, 24\n\ts_mul_hi_u32 s17, s16, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s17, s17, s3\n\ts_mul_i32 s3, s16, 24\n\tv_add_co_u32 v4, vcc_lo, v28, s3\n\tv_add_co_ci_u32_e32 v9, vcc_lo, s17, v29, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v12, vcc_lo, v4, 20\n\tv_add_co_ci_u32_e32 v13, vcc_lo, 0, v9, vcc_lo\n\ts_branch .LBB0_99\n\t.p2align\t6\n.LBB0_96: ; in Loop: Header=BB0_99 Depth=2\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v4\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_98\n; %bb.97: ; in Loop: Header=BB0_99 Depth=2\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_99\n\ts_branch .LBB0_101\n\t.p2align\t6\n.LBB0_98: ; in Loop: Header=BB0_30 Depth=1\n\ts_branch .LBB0_101\n.LBB0_99: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_mov_b32_e32 v4, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_96\n; %bb.100: ; in Loop: Header=BB0_99 Depth=2\n\tglobal_load_b32 v4, v[12:13], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v4, 1, v4\n\ts_branch .LBB0_96\n.LBB0_101: ; in Loop: Header=BB0_30 Depth=1\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_29\n; %bb.102: ; in Loop: Header=BB0_30 Depth=1\n\ts_clause 0x2\n\tglobal_load_b64 v[14:15], v10, s[4:5] offset:40\n\tglobal_load_b64 v[18:19], v10, s[4:5] offset:24 glc\n\tglobal_load_b64 v[16:17], v10, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v4, vcc_lo, v14, 1\n\tv_add_co_ci_u32_e32 v9, vcc_lo, 0, v15, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v12, vcc_lo, v4, s14\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s15, v9, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]\n\tv_dual_cndmask_b32 v13, v13, v9 :: v_dual_cndmask_b32 v12, v12, v4\n\ts_waitcnt vmcnt(1)\n\tv_dual_mov_b32 v15, v19 :: v_dual_and_b32 v4, v13, v15\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v9, v12, v14\n\tv_mul_lo_u32 v4, v4, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_hi_u32 v14, v9, 24\n\tv_add_nc_u32_e32 v4, v14, v4\n\tv_mov_b32_e32 v14, v18\n\tv_mul_lo_u32 v9, v9, 24\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_u32 v16, vcc_lo, v16, v9\n\tv_add_co_ci_u32_e32 v17, vcc_lo, v17, v4, vcc_lo\n\tglobal_store_b64 v[16:17], v[18:19], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[14:15], v10, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[14:15], v[18:19]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_29\n; %bb.103: ; in Loop: Header=BB0_30 Depth=1\n\ts_mov_b32 s2, 0\n.LBB0_104: ; Parent Loop BB0_30 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_sleep 1\n\tglobal_store_b64 v[16:17], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[18:19], v10, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[18:19], v[14:15]\n\tv_dual_mov_b32 v14, v18 :: v_dual_mov_b32 v15, v19\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_104\n\ts_branch .LBB0_29\n.LBB0_105:\n\ts_cbranch_execnz .LBB0_107\n\ts_branch .LBB0_134\n.LBB0_106:\n\ts_branch .LBB0_134\n.LBB0_107:\n\ts_waitcnt vmcnt(0)\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v9, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v10, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_113\n; %bb.108:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s8, exec_lo\n\tglobal_load_b64 v[14:15], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b64 v[12:13], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v10, v15\n\tv_and_b32_e32 v9, v9, v14\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v10, v9, 24\n\tv_mul_lo_u32 v9, v9, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v10, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v12, v9\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v10, vcc_lo, v13, v4, vcc_lo\n\tglobal_load_b64 v[12:13], v[9:10], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[9:10], v[14:15]\n\ts_cbranch_execz .LBB0_112\n; %bb.109:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_110: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[12:13], v1, s[4:5] offset:40\n\tglobal_load_b64 v[16:17], v1, s[4:5]\n\tv_dual_mov_b32 v15, v10 :: v_dual_mov_b32 v14, v9\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v4, v12, v14\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[9:10], null, v4, 24, v[16:17]\n\tv_and_b32_e32 v16, v13, v15\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mov_b32_e32 v4, v10\n\tv_mad_u64_u32 v[12:13], null, v16, 24, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mov_b32_e32 v10, v12\n\tglobal_load_b64 v[12:13], v[9:10], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[14:15]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_110\n; %bb.111:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_112:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_113:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s8, v9\n\tv_readfirstlane_b32 s9, v10\n\ts_mov_b32 s12, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[16:17], v1, s[4:5] offset:40\n\tglobal_load_b128 v[12:15], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v16\n\tv_readfirstlane_b32 s11, v17\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_115\n; %bb.114:\n\tv_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v17, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s13, v13, vcc_lo\n\tglobal_store_b128 v[9:10], v[16:19], off offset:8\n.LBB0_115:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[12:13], s[10:11], 12\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v4, vcc_lo, v14, s12\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s13, v15, vcc_lo\n\ts_mov_b32 s12, 0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v4, v0\n\ts_mov_b32 s15, s12\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\tv_mov_b32_e32 v9, 0\n\tv_and_or_b32 v6, v6, 0xffffff1f, 32\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo\n\tv_dual_mov_b32 v17, s15 :: v_dual_mov_b32 v14, s12\n\tv_dual_mov_b32 v16, s14 :: v_dual_mov_b32 v15, s13\n\tv_mov_b32_e32 v10, v9\n\ts_clause 0x4\n\tglobal_store_b64 v[0:1], v[6:7], off\n\tglobal_store_b128 v[0:1], v[14:17], off offset:8\n\tglobal_store_b128 v[0:1], v[14:17], off offset:24\n\tglobal_store_b128 v[0:1], v[14:17], off offset:40\n\tglobal_store_b64 v[0:1], v[9:10], off offset:56\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_123\n; %bb.116:\n\tv_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v17, s9\n\tv_mov_b32_e32 v16, s8\n\ts_clause 0x1\n\tglobal_load_b64 v[18:19], v4, s[4:5] offset:32 glc\n\tglobal_load_b64 v[6:7], v4, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v6\n\tv_readfirstlane_b32 s13, v7\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v6, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s14, v13, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[6:7], v[18:19], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[16:17], v4, v[16:19], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[16:17], v[18:19]\n\ts_cbranch_execz .LBB0_119\n; %bb.117:\n\ts_mov_b32 s13, 0\n.LBB0_118: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v14, s8 :: v_dual_mov_b32 v15, s9\n\ts_sleep 1\n\tglobal_store_b64 v[6:7], v[16:17], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[14:17], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[16:17]\n\tv_dual_mov_b32 v17, v10 :: v_dual_mov_b32 v16, v9\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_118\n.LBB0_119:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v4, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_load_b64 v[6:7], v4, s[4:5] offset:16\n\tv_mbcnt_lo_u32_b32 v4, s13, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_eq_u32_e32 0, v4\n\ts_cbranch_execz .LBB0_121\n; %bb.120:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v9, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[6:7], v[9:10], off offset:8\n.LBB0_121:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[9:10], v[6:7], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]\n\ts_cbranch_vccnz .LBB0_123\n; %bb.122:\n\tglobal_load_b32 v6, v[6:7], off offset:24\n\tv_mov_b32_e32 v7, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v6\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[9:10], v[6:7], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_123:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v4, vcc_lo, v12, s3\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v13, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v6, vcc_lo, v4, 20\n\tv_add_co_ci_u32_e32 v7, vcc_lo, 0, v7, vcc_lo\n\ts_branch .LBB0_127\n\t.p2align\t6\n.LBB0_124: ; in Loop: Header=BB0_127 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v4\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_126\n; %bb.125: ; in Loop: Header=BB0_127 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_127\n\ts_branch .LBB0_129\n\t.p2align\t6\n.LBB0_126:\n\ts_branch .LBB0_129\n.LBB0_127: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v4, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_124\n; %bb.128: ; in Loop: Header=BB0_127 Depth=1\n\tglobal_load_b32 v4, v[6:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v4, 1, v4\n\ts_branch .LBB0_124\n.LBB0_129:\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_133\n; %bb.130:\n\tv_mov_b32_e32 v4, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[6:7], v4, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v4, s[4:5] offset:24 glc\n\tglobal_load_b64 v[14:15], v4, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v16, vcc_lo, v6, 1\n\tv_add_co_ci_u32_e32 v17, vcc_lo, 0, v7, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v12, vcc_lo, v16, s8\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s9, v17, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]\n\tv_dual_cndmask_b32 v13, v13, v17 :: v_dual_cndmask_b32 v12, v12, v16\n\tv_and_b32_e32 v7, v13, v7\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v6, v12, v6\n\tv_mul_lo_u32 v7, v7, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v16, v6, 24\n\tv_mul_lo_u32 v6, v6, 24\n\tv_add_nc_u32_e32 v7, v16, v7\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v6, vcc_lo, v14, v6\n\tv_mov_b32_e32 v14, v9\n\tv_add_co_ci_u32_e32 v7, vcc_lo, v15, v7, vcc_lo\n\tv_mov_b32_e32 v15, v10\n\tglobal_store_b64 v[6:7], v[9:10], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[14:15], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[14:15], v[9:10]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_133\n; %bb.131:\n\ts_mov_b32 s2, 0\n.LBB0_132: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[6:7], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[14:15]\n\tv_dual_mov_b32 v15, v10 :: v_dual_mov_b32 v14, v9\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_132\n.LBB0_133:\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_134:\n\ts_waitcnt vmcnt(0)\n\tv_dual_mov_b32 v6, v34 :: v_dual_mov_b32 v9, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v6\n\tv_mov_b32_e32 v10, 0\n\tv_cmp_eq_u32_e64 s2, s2, v6\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_140\n; %bb.135:\n\tv_mov_b32_e32 v4, 0\n\ts_mov_b32 s8, exec_lo\n\tglobal_load_b64 v[14:15], v4, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v4, s[4:5] offset:40\n\tglobal_load_b64 v[12:13], v4, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v7, v10, v15\n\tv_and_b32_e32 v9, v9, v14\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v7, v7, 24\n\tv_mul_hi_u32 v10, v9, 24\n\tv_mul_lo_u32 v9, v9, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v7, v10, v7\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v12, v9\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v10, vcc_lo, v13, v7, vcc_lo\n\tglobal_load_b64 v[12:13], v[9:10], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[9:10], v[14:15]\n\ts_cbranch_execz .LBB0_139\n; %bb.136:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_137: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[12:13], v4, s[4:5] offset:40\n\tglobal_load_b64 v[16:17], v4, s[4:5]\n\tv_dual_mov_b32 v15, v10 :: v_dual_mov_b32 v14, v9\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v7, v12, v14\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[9:10], null, v7, 24, v[16:17]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_mov_b32 v7, v10 :: v_dual_and_b32 v16, v13, v15\n\tv_mad_u64_u32 v[12:13], null, v16, 24, v[7:8]\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mov_b32_e32 v10, v12\n\tglobal_load_b64 v[12:13], v[9:10], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v4, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[14:15]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_137\n; %bb.138:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_139:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_140:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v7, 0\n\tv_readfirstlane_b32 s8, v9\n\tv_readfirstlane_b32 s9, v10\n\ts_mov_b32 s12, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[16:17], v7, s[4:5] offset:40\n\tglobal_load_b128 v[12:15], v7, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v16\n\tv_readfirstlane_b32 s11, v17\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_142\n; %bb.141:\n\tv_dual_mov_b32 v16, s12 :: v_dual_mov_b32 v17, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v18, 2 :: v_dual_mov_b32 v19, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s13, v13, vcc_lo\n\tglobal_store_b128 v[9:10], v[16:19], off offset:8\n.LBB0_142:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[12:13], s[10:11], 12\n\tv_lshlrev_b64 v[6:7], 6, v[6:7]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v4, vcc_lo, v14, s12\n\tv_add_co_ci_u32_e32 v9, vcc_lo, s13, v15, vcc_lo\n\ts_mov_b32 s12, 0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_u32 v6, vcc_lo, v4, v6\n\ts_mov_b32 s15, s12\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\tv_and_or_b32 v0, v0, 0xffffff1f, 32\n\tv_add_co_ci_u32_e32 v7, vcc_lo, v9, v7, vcc_lo\n\tv_dual_mov_b32 v17, s15 :: v_dual_mov_b32 v16, s14\n\tv_dual_mov_b32 v15, s13 :: v_dual_mov_b32 v14, s12\n\ts_clause 0x3\n\tglobal_store_b128 v[6:7], v[0:3], off\n\tglobal_store_b128 v[6:7], v[14:17], off offset:16\n\tglobal_store_b128 v[6:7], v[14:17], off offset:32\n\tglobal_store_b128 v[6:7], v[14:17], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_150\n; %bb.143:\n\tv_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v16, s8\n\tv_mov_b32_e32 v17, s9\n\ts_clause 0x1\n\tglobal_load_b64 v[18:19], v3, s[4:5] offset:32 glc\n\tglobal_load_b64 v[0:1], v3, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v0\n\tv_readfirstlane_b32 s13, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v0, vcc_lo, v12, s12\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s14, v13, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[0:1], v[18:19], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[16:17], v3, v[16:19], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[16:17], v[18:19]\n\ts_cbranch_execz .LBB0_146\n; %bb.144:\n\ts_mov_b32 s13, 0\n.LBB0_145: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v14, s8 :: v_dual_mov_b32 v15, s9\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v3, v[14:17], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[16:17]\n\tv_dual_mov_b32 v17, v10 :: v_dual_mov_b32 v16, v9\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_145\n.LBB0_146:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v0, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tv_mbcnt_lo_u32_b32 v3, s13, 0\n\tglobal_load_b64 v[0:1], v0, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v3\n\ts_cbranch_execz .LBB0_148\n; %bb.147:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[3:4], off offset:8\n.LBB0_148:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[3:4], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\ts_cbranch_vccnz .LBB0_150\n; %bb.149:\n\tglobal_load_b32 v0, v[0:1], off offset:24\n\tv_mov_b32_e32 v1, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v0\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[3:4], v[0:1], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_150:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v0, vcc_lo, v12, s3\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s11, v13, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v0, 20\n\tv_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo\n\ts_branch .LBB0_154\n\t.p2align\t6\n.LBB0_151: ; in Loop: Header=BB0_154 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v3\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_153\n; %bb.152: ; in Loop: Header=BB0_154 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_154\n\ts_branch .LBB0_156\n\t.p2align\t6\n.LBB0_153:\n\ts_branch .LBB0_156\n.LBB0_154: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v3, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_151\n; %bb.155: ; in Loop: Header=BB0_154 Depth=1\n\tglobal_load_b32 v3, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v3, 1, v3\n\ts_branch .LBB0_151\n.LBB0_156:\n\tglobal_load_b64 v[9:10], v[6:7], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_160\n; %bb.157:\n\tv_mov_b32_e32 v3, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v3, s[4:5] offset:40\n\tglobal_load_b64 v[6:7], v3, s[4:5] offset:24 glc\n\tglobal_load_b64 v[14:15], v3, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v4, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v16, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v12, vcc_lo, v4, s8\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s9, v16, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[12:13]\n\tv_cndmask_b32_e32 v12, v12, v4, vcc_lo\n\tv_cndmask_b32_e32 v13, v13, v16, vcc_lo\n\tv_and_b32_e32 v0, v12, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_mul_hi_u32 v4, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v0, vcc_lo, v14, v0\n\tv_dual_mov_b32 v14, v6 :: v_dual_and_b32 v1, v13, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v1, v1, 24\n\tv_add_nc_u32_e32 v1, v4, v1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v15, v1, vcc_lo\n\tv_mov_b32_e32 v15, v7\n\tglobal_store_b64 v[0:1], v[6:7], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[14:15], v3, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[14:15], v[6:7]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_160\n; %bb.158:\n\ts_mov_b32 s2, 0\n.LBB0_159: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[6:7], v3, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[6:7], v[14:15]\n\tv_dual_mov_b32 v15, v7 :: v_dual_mov_b32 v14, v6\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_159\n.LBB0_160:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v3, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v4, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_166\n; %bb.161:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s8, exec_lo\n\tglobal_load_b64 v[14:15], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[6:7], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v15\n\tv_and_b32_e32 v3, v3, v14\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v12, v3, 24\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v12, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v6, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, v7, v4, vcc_lo\n\tglobal_load_b64 v[12:13], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[3:4], v[14:15]\n\ts_cbranch_execz .LBB0_165\n; %bb.162:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_163: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[6:7], v1, s[4:5] offset:40\n\tglobal_load_b64 v[12:13], v1, s[4:5]\n\tv_dual_mov_b32 v15, v4 :: v_dual_mov_b32 v14, v3\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v6, v6, v14\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[3:4], null, v6, 24, v[12:13]\n\tv_and_b32_e32 v12, v7, v15\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[6:7], null, v12, 24, v[4:5]\n\tv_mov_b32_e32 v4, v6\n\tglobal_load_b64 v[12:13], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v1, v[12:15], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[3:4], v[14:15]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_163\n; %bb.164:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_165:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_166:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s8, v3\n\tv_readfirstlane_b32 s9, v4\n\ts_mov_b32 s12, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[6:7], v1, s[4:5] offset:40\n\tglobal_load_b128 v[13:16], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v6\n\tv_readfirstlane_b32 s11, v7\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_168\n; %bb.167:\n\tv_dual_mov_b32 v17, s12 :: v_dual_mov_b32 v18, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v19, 2 :: v_dual_mov_b32 v20, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v13, s12\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s13, v14, vcc_lo\n\tglobal_store_b128 v[3:4], v[17:20], off offset:8\n.LBB0_168:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[14:15], s[10:11], 12\n\ts_mov_b32 s12, 0\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v15, s14\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s15, v16, vcc_lo\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_mov_b32_e32 v12, 0\n\tv_dual_mov_b32 v18, s15 :: v_dual_mov_b32 v15, s12\n\tv_dual_mov_b32 v17, s14 :: v_dual_mov_b32 v16, s13\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mov_b32_e32 v1, v12\n\tv_and_or_b32 v9, v9, 0xffffff1f, 32\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v3, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[9:12], off\n\tglobal_store_b128 v[0:1], v[15:18], off offset:16\n\tglobal_store_b128 v[0:1], v[15:18], off offset:32\n\tglobal_store_b128 v[0:1], v[15:18], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_176\n; %bb.169:\n\tv_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v15, s8\n\tv_mov_b32_e32 v16, s9\n\ts_clause 0x1\n\tglobal_load_b64 v[17:18], v6, s[4:5] offset:32 glc\n\tglobal_load_b64 v[3:4], v6, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v3\n\tv_readfirstlane_b32 s13, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v3, vcc_lo, v13, s12\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s14, v14, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[3:4], v[17:18], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[11:12], v6, v[15:18], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[11:12], v[17:18]\n\ts_cbranch_execz .LBB0_172\n; %bb.170:\n\ts_mov_b32 s13, 0\n.LBB0_171: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v9, s8 :: v_dual_mov_b32 v10, s9\n\ts_sleep 1\n\tglobal_store_b64 v[3:4], v[11:12], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v6, v[9:12], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[11:12]\n\tv_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_171\n.LBB0_172:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tv_mbcnt_lo_u32_b32 v6, s13, 0\n\tglobal_load_b64 v[3:4], v3, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v6\n\ts_cbranch_execz .LBB0_174\n; %bb.173:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[3:4], v[6:7], off offset:8\n.LBB0_174:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[6:7], v[3:4], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]\n\ts_cbranch_vccnz .LBB0_176\n; %bb.175:\n\tglobal_load_b32 v3, v[3:4], off offset:24\n\tv_mov_b32_e32 v4, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v3\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[6:7], v[3:4], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_176:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v3, vcc_lo, v13, s3\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s11, v14, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v3, 20\n\tv_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo\n\ts_branch .LBB0_180\n\t.p2align\t6\n.LBB0_177: ; in Loop: Header=BB0_180 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v6\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_179\n; %bb.178: ; in Loop: Header=BB0_180 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_180\n\ts_branch .LBB0_182\n\t.p2align\t6\n.LBB0_179:\n\ts_branch .LBB0_182\n.LBB0_180: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v6, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_177\n; %bb.181: ; in Loop: Header=BB0_180 Depth=1\n\tglobal_load_b32 v6, v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v6, 1, v6\n\ts_branch .LBB0_177\n.LBB0_182:\n\tglobal_load_b64 v[6:7], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_186\n; %bb.183:\n\tv_mov_b32_e32 v3, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v3, s[4:5] offset:40\n\tglobal_load_b64 v[13:14], v3, s[4:5] offset:24 glc\n\tglobal_load_b64 v[11:12], v3, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v4, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v15, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v9, vcc_lo, v4, s8\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s9, v15, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[9:10]\n\tv_dual_cndmask_b32 v10, v10, v15 :: v_dual_cndmask_b32 v9, v9, v4\n\tv_and_b32_e32 v1, v10, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v0, v9, v0\n\tv_mul_lo_u32 v1, v1, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v4, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\tv_add_nc_u32_e32 v1, v4, v1\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v11, v0\n\tv_mov_b32_e32 v11, v13\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v12, v1, vcc_lo\n\tv_mov_b32_e32 v12, v14\n\tglobal_store_b64 v[0:1], v[13:14], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[11:12], v3, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[11:12], v[13:14]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_186\n; %bb.184:\n\ts_mov_b32 s2, 0\n.LBB0_185: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[11:12], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[13:14], v3, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[13:14], v[11:12]\n\tv_dual_mov_b32 v11, v13 :: v_dual_mov_b32 v12, v14\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_185\n.LBB0_186:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v3, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v4, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_192\n; %bb.187:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s8, exec_lo\n\tglobal_load_b64 v[11:12], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v12\n\tv_and_b32_e32 v3, v3, v11\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v13, v3, 24\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v13, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v9, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, v10, v4, vcc_lo\n\tglobal_load_b64 v[9:10], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[3:4], v[11:12]\n\ts_cbranch_execz .LBB0_191\n; %bb.188:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_189: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b64 v[13:14], v1, s[4:5]\n\tv_dual_mov_b32 v12, v4 :: v_dual_mov_b32 v11, v3\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v9, v9, v11\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[3:4], null, v9, 24, v[13:14]\n\tv_and_b32_e32 v13, v10, v12\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[9:10], null, v13, 24, v[4:5]\n\tv_mov_b32_e32 v4, v9\n\tglobal_load_b64 v[9:10], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v1, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[3:4], v[11:12]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_189\n; %bb.190:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_191:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_192:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s8, v3\n\tv_readfirstlane_b32 s9, v4\n\ts_mov_b32 s12, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[14:15], v1, s[4:5] offset:40\n\tglobal_load_b128 v[10:13], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v14\n\tv_readfirstlane_b32 s11, v15\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_194\n; %bb.193:\n\tv_dual_mov_b32 v14, s12 :: v_dual_mov_b32 v15, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v16, 2 :: v_dual_mov_b32 v17, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v10, s12\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s13, v11, vcc_lo\n\tglobal_store_b128 v[3:4], v[14:17], off offset:8\n.LBB0_194:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[14:15], s[10:11], 12\n\ts_mov_b32 s12, 0\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v12, s14\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s15, v13, vcc_lo\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v12, s12\n\tv_mov_b32_e32 v14, s14\n\tv_and_or_b32 v6, v6, 0xffffff1f, 32\n\tv_mov_b32_e32 v13, s13\n\ts_delay_alu instid0(VALU_DEP_4) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v15, s15\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v3, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v4, v1, vcc_lo\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[6:9], off\n\tglobal_store_b128 v[0:1], v[12:15], off offset:16\n\tglobal_store_b128 v[0:1], v[12:15], off offset:32\n\tglobal_store_b128 v[0:1], v[12:15], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_202\n; %bb.195:\n\tv_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v13, s8\n\tv_mov_b32_e32 v14, s9\n\ts_clause 0x1\n\tglobal_load_b64 v[15:16], v12, s[4:5] offset:32 glc\n\tglobal_load_b64 v[3:4], v12, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v3\n\tv_readfirstlane_b32 s13, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v3, vcc_lo, v10, s12\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s14, v11, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[3:4], v[15:16], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[8:9], v12, v[13:16], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[8:9], v[15:16]\n\ts_cbranch_execz .LBB0_198\n; %bb.196:\n\ts_mov_b32 s13, 0\n.LBB0_197: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v6, s8 :: v_dual_mov_b32 v7, s9\n\ts_sleep 1\n\tglobal_store_b64 v[3:4], v[8:9], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[6:7], v12, v[6:9], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[6:7], v[8:9]\n\tv_dual_mov_b32 v9, v7 :: v_dual_mov_b32 v8, v6\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_197\n.LBB0_198:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tv_mbcnt_lo_u32_b32 v6, s13, 0\n\tglobal_load_b64 v[3:4], v3, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v6\n\ts_cbranch_execz .LBB0_200\n; %bb.199:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v7, 0 :: v_dual_mov_b32 v6, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[3:4], v[6:7], off offset:8\n.LBB0_200:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[6:7], v[3:4], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]\n\ts_cbranch_vccnz .LBB0_202\n; %bb.201:\n\tglobal_load_b32 v3, v[3:4], off offset:24\n\tv_mov_b32_e32 v4, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v3\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[6:7], v[3:4], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_202:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v3, vcc_lo, v10, s3\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s11, v11, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v3, 20\n\tv_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo\n\ts_branch .LBB0_206\n\t.p2align\t6\n.LBB0_203: ; in Loop: Header=BB0_206 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v6\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_205\n; %bb.204: ; in Loop: Header=BB0_206 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_206\n\ts_branch .LBB0_208\n\t.p2align\t6\n.LBB0_205:\n\ts_branch .LBB0_208\n.LBB0_206: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v6, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_203\n; %bb.207: ; in Loop: Header=BB0_206 Depth=1\n\tglobal_load_b32 v6, v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v6, 1, v6\n\ts_branch .LBB0_203\n.LBB0_208:\n\tglobal_load_b64 v[3:4], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_212\n; %bb.209:\n\tv_mov_b32_e32 v10, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v10, s[4:5] offset:40\n\tglobal_load_b64 v[11:12], v10, s[4:5] offset:24 glc\n\tglobal_load_b64 v[8:9], v10, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v13, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v14, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v6, vcc_lo, v13, s8\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s9, v14, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[6:7]\n\tv_dual_cndmask_b32 v7, v7, v14 :: v_dual_cndmask_b32 v6, v6, v13\n\tv_and_b32_e32 v1, v7, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v0, v6, v0\n\tv_mul_lo_u32 v1, v1, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v13, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\tv_add_nc_u32_e32 v1, v13, v1\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v8, v0\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v9, v1, vcc_lo\n\tv_mov_b32_e32 v9, v12\n\tglobal_store_b64 v[0:1], v[11:12], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[8:9], v10, v[6:9], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[8:9], v[11:12]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_212\n; %bb.210:\n\ts_mov_b32 s2, 0\n.LBB0_211: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[8:9], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[11:12], v10, v[6:9], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9]\n\tv_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_211\n.LBB0_212:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v11, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v12, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_218\n; %bb.213:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s8, exec_lo\n\tglobal_load_b64 v[8:9], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[6:7], v1, s[4:5] offset:40\n\tglobal_load_b64 v[10:11], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v6, v6, v8\n\tv_and_b32_e32 v7, v7, v9\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v12, v6, 24\n\tv_mul_lo_u32 v7, v7, 24\n\tv_mul_lo_u32 v6, v6, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v7, v12, v7\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v6, vcc_lo, v10, v6\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v7, vcc_lo, v11, v7, vcc_lo\n\tglobal_load_b64 v[6:7], v[6:7], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[11:12], v[8:9]\n\ts_cbranch_execz .LBB0_217\n; %bb.214:\n\ts_mov_b32 s9, 0\n\t.p2align\t6\n.LBB0_215: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[6:7], v1, s[4:5] offset:40\n\tglobal_load_b64 v[13:14], v1, s[4:5]\n\tv_dual_mov_b32 v8, v11 :: v_dual_mov_b32 v9, v12\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v6, v6, v8\n\tv_and_b32_e32 v7, v7, v9\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[10:11], null, v6, 24, v[13:14]\n\tv_mov_b32_e32 v6, v11\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u64_u32 v[11:12], null, v7, 24, v[6:7]\n\tglobal_load_b64 v[6:7], v[10:11], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[11:12], v1, v[6:9], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[11:12], v[8:9]\n\ts_or_b32 s9, vcc_lo, s9\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s9\n\ts_cbranch_execnz .LBB0_215\n; %bb.216:\n\ts_or_b32 exec_lo, exec_lo, s9\n.LBB0_217:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s8\n.LBB0_218:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s8, v11\n\tv_readfirstlane_b32 s9, v12\n\ts_mov_b32 s12, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[13:14], v1, s[4:5] offset:40\n\tglobal_load_b128 v[7:10], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s10, v13\n\tv_readfirstlane_b32 s11, v14\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[10:11], s[8:9], s[10:11]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_220\n; %bb.219:\n\tv_dual_mov_b32 v11, s12 :: v_dual_mov_b32 v12, 0\n\ts_mul_i32 s12, s11, 24\n\ts_mul_hi_u32 s13, s10, 24\n\tv_dual_mov_b32 v13, 2 :: v_dual_mov_b32 v14, 1\n\ts_add_i32 s13, s13, s12\n\ts_mul_i32 s12, s10, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v15, vcc_lo, v7, s12\n\tv_add_co_ci_u32_e32 v16, vcc_lo, s13, v8, vcc_lo\n\tglobal_store_b128 v[15:16], v[11:14], off offset:8\n.LBB0_220:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[14:15], s[10:11], 12\n\ts_mov_b32 s12, 0\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v9, s14\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s15, v10, vcc_lo\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_mov_b32_e32 v6, 0\n\tv_and_or_b32 v3, v3, 0xffffff1d, 34\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mov_b32_e32 v1, v6\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v9, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v10, v1, vcc_lo\n\tv_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13\n\tv_dual_mov_b32 v11, s14 :: v_dual_mov_b32 v12, s15\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[3:6], off\n\tglobal_store_b128 v[0:1], v[9:12], off offset:16\n\tglobal_store_b128 v[0:1], v[9:12], off offset:32\n\tglobal_store_b128 v[0:1], v[9:12], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_228\n; %bb.221:\n\tv_dual_mov_b32 v9, 0 :: v_dual_mov_b32 v10, s8\n\tv_mov_b32_e32 v11, s9\n\ts_clause 0x1\n\tglobal_load_b64 v[12:13], v9, s[4:5] offset:32 glc\n\tglobal_load_b64 v[0:1], v9, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v0\n\tv_readfirstlane_b32 s13, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[12:13], s[12:13], s[8:9]\n\ts_mul_i32 s13, s13, 24\n\ts_mul_hi_u32 s14, s12, 24\n\ts_mul_i32 s12, s12, 24\n\ts_add_i32 s14, s14, s13\n\tv_add_co_u32 v0, vcc_lo, v7, s12\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s14, v8, vcc_lo\n\ts_mov_b32 s12, exec_lo\n\tglobal_store_b64 v[0:1], v[12:13], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v9, v[10:13], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[5:6], v[12:13]\n\ts_cbranch_execz .LBB0_224\n; %bb.222:\n\ts_mov_b32 s13, 0\n.LBB0_223: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v3, s8 :: v_dual_mov_b32 v4, s9\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[3:4], v9, v[3:6], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]\n\tv_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_223\n.LBB0_224:\n\ts_or_b32 exec_lo, exec_lo, s12\n\tv_mov_b32_e32 v0, 0\n\ts_mov_b32 s13, exec_lo\n\ts_mov_b32 s12, exec_lo\n\tv_mbcnt_lo_u32_b32 v3, s13, 0\n\tglobal_load_b64 v[0:1], v0, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v3\n\ts_cbranch_execz .LBB0_226\n; %bb.225:\n\ts_bcnt1_i32_b32 s13, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v4, 0 :: v_dual_mov_b32 v3, s13\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[3:4], off offset:8\n.LBB0_226:\n\ts_or_b32 exec_lo, exec_lo, s12\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[3:4], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\ts_cbranch_vccnz .LBB0_228\n; %bb.227:\n\tglobal_load_b32 v0, v[0:1], off offset:24\n\tv_mov_b32_e32 v1, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s12, v0\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[3:4], v[0:1], off\n\ts_and_b32 m0, s12, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_228:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s11, 24\n\ts_mul_hi_u32 s11, s10, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s11, s11, s3\n\ts_mul_i32 s3, s10, 24\n\tv_add_co_u32 v0, vcc_lo, v7, s3\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s11, v8, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v0, 20\n\tv_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo\n\ts_branch .LBB0_232\n\t.p2align\t6\n.LBB0_229: ; in Loop: Header=BB0_232 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v3\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_231\n; %bb.230: ; in Loop: Header=BB0_232 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_232\n\ts_branch .LBB0_234\n\t.p2align\t6\n.LBB0_231:\n\ts_branch .LBB0_234\n.LBB0_232: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v3, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_229\n; %bb.233: ; in Loop: Header=BB0_232 Depth=1\n\tglobal_load_b32 v3, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v3, 1, v3\n\ts_branch .LBB0_229\n.LBB0_234:\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_238\n; %bb.235:\n\tv_mov_b32_e32 v7, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v7, s[4:5] offset:40\n\tglobal_load_b64 v[8:9], v7, s[4:5] offset:24 glc\n\tglobal_load_b64 v[5:6], v7, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v10, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v10, s8\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s9, v11, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\tv_dual_cndmask_b32 v4, v4, v11 :: v_dual_cndmask_b32 v3, v3, v10\n\tv_and_b32_e32 v1, v4, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v0, v3, v0\n\tv_mul_lo_u32 v1, v1, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v10, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\tv_add_nc_u32_e32 v1, v10, v1\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v5, v0\n\tv_mov_b32_e32 v5, v8\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo\n\tv_mov_b32_e32 v6, v9\n\tglobal_store_b64 v[0:1], v[8:9], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v7, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[5:6], v[8:9]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_238\n; %bb.236:\n\ts_mov_b32 s2, 0\n.LBB0_237: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[8:9], v7, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]\n\tv_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_237\n.LBB0_238:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_lshlrev_b64 v[0:1], 2, v[35:36]\n\ts_mov_b32 s2, exec_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, s6, v0\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo\n\ts_clause 0x1\n\tglobal_load_b32 v0, v[32:33], off\n\tglobal_load_b32 v1, v[3:4], off\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u32_e64 v0, v1\n\ts_cbranch_execz .LBB0_240\n; %bb.239:\n\tglobal_load_b32 v3, v[37:38], off\n\ts_load_b128 s[8:11], s[0:1], 0x8\n\tv_ashrrev_i32_e32 v1, 31, v0\n\ts_sub_i32 s3, 0, s18\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[0:1], 2, v[0:1]\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v0, vcc_lo, s8, v0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_4) | instid1(VALU_DEP_1)\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s9, v1, vcc_lo\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b32 v[0:1], v3, off\n\tglobal_load_b32 v0, v[32:33], off\n\tv_cvt_f32_u32_e32 v1, s18\n\tv_rcp_iflag_f32_e32 v1, v1\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v1, 0x4f7ffffe, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cvt_u32_f32_e32 v1, v1\n\tv_mul_lo_u32 v3, s3, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_hi_u32 v3, v1, v3\n\tv_add_nc_u32_e32 v1, v1, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_hi_u32 v1, v35, v1\n\tv_mul_lo_u32 v1, v1, s18\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_sub_nc_u32_e32 v1, v35, v1\n\tv_subrev_nc_u32_e32 v3, s18, v1\n\tv_cmp_le_u32_e32 vcc_lo, s18, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cndmask_b32_e32 v3, v1, v3, vcc_lo\n\tv_subrev_nc_u32_e32 v4, s18, v3\n\tv_cmp_le_u32_e32 vcc_lo, s18, v3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_cndmask_b32_e32 v3, v3, v4, vcc_lo\n\ts_waitcnt vmcnt(0)\n\tv_ashrrev_i32_e32 v1, 31, v0\n\tv_lshlrev_b64 v[0:1], 2, v[0:1]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, s10, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s11, v1, vcc_lo\n\tglobal_store_b32 v[0:1], v3, off\n.LBB0_240:\n\ts_or_b32 exec_lo, exec_lo, s2\n\ts_add_i32 s2, s18, -1\n\ts_sub_i32 s3, 1, s18\n\tv_cvt_f32_u32_e32 v0, s2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_rcp_iflag_f32_e32 v0, v0\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v0, 0x4f7ffffe, v0\n\tv_cvt_u32_f32_e32 v0, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v1, s3, v0\n\tv_mul_hi_u32 v1, v0, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_nc_u32_e32 v0, v0, v1\n\tv_mul_hi_u32 v0, v2, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v1, v0, s2\n\tv_add_nc_u32_e32 v3, 1, v0\n\tv_sub_nc_u32_e32 v1, v2, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_subrev_nc_u32_e32 v4, s2, v1\n\tv_cmp_le_u32_e32 vcc_lo, s2, v1\n\tv_dual_cndmask_b32 v1, v1, v4 :: v_dual_cndmask_b32 v0, v0, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_cmp_le_u32_e32 vcc_lo, s2, v1\n\tv_add_nc_u32_e32 v3, 1, v0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cndmask_b32_e32 v23, v0, v3, vcc_lo\n\tv_mul_lo_u32 v0, v23, s2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_sub_nc_u32_e32 v0, v2, v0\n\tv_cmp_eq_u32_e32 vcc_lo, 0, v0\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_427\n; %bb.241:\n\tglobal_load_b32 v2, v[32:33], off\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v7, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v8, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_247\n; %bb.242:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s6, exec_lo\n\tglobal_load_b64 v[5:6], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[7:8], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v6\n\tv_and_b32_e32 v3, v3, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v9, v3, 24\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v9, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v7, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo\n\tglobal_load_b64 v[3:4], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[7:8], v1, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[7:8], v[5:6]\n\ts_cbranch_execz .LBB0_246\n; %bb.243:\n\ts_mov_b32 s7, 0\n\t.p2align\t6\n.LBB0_244: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v1, s[4:5]\n\tv_dual_mov_b32 v5, v7 :: v_dual_mov_b32 v6, v8\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v3, v3, v5\n\tv_and_b32_e32 v4, v4, v6\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[7:8], null, v3, 24, v[9:10]\n\tv_mov_b32_e32 v3, v8\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]\n\tglobal_load_b64 v[3:4], v[7:8], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[7:8], v1, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[7:8], v[5:6]\n\ts_or_b32 s7, vcc_lo, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s7\n\ts_cbranch_execnz .LBB0_244\n; %bb.245:\n\ts_or_b32 exec_lo, exec_lo, s7\n.LBB0_246:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_247:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s6, v7\n\tv_readfirstlane_b32 s7, v8\n\ts_mov_b32 s10, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b128 v[3:6], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s8, v9\n\tv_readfirstlane_b32 s9, v10\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[8:9], s[6:7], s[8:9]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_249\n; %bb.248:\n\tv_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, 0\n\ts_mul_i32 s10, s9, 24\n\ts_mul_hi_u32 s11, s8, 24\n\tv_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1\n\ts_add_i32 s11, s11, s10\n\ts_mul_i32 s10, s8, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v11, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v12, vcc_lo, s11, v4, vcc_lo\n\tglobal_store_b128 v[11:12], v[7:10], off offset:8\n.LBB0_249:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[10:11], s[8:9], 12\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v5, vcc_lo, v5, s10\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v6, vcc_lo\n\tv_mov_b32_e32 v6, 0\n\ts_mov_b32 s12, 0\n\ts_delay_alu instid0(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v5, v0\n\tv_mov_b32_e32 v5, 33\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v7, v1, vcc_lo\n\tv_mov_b32_e32 v7, v6\n\tv_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v9, s12\n\tv_dual_mov_b32 v10, s13 :: v_dual_mov_b32 v11, s14\n\tv_mov_b32_e32 v12, s15\n\ts_clause 0x3\n\tglobal_store_b128 v[0:1], v[5:8], off\n\tglobal_store_b128 v[0:1], v[9:12], off offset:16\n\tglobal_store_b128 v[0:1], v[9:12], off offset:32\n\tglobal_store_b128 v[0:1], v[9:12], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_257\n; %bb.250:\n\tv_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s6\n\tv_mov_b32_e32 v13, s7\n\ts_clause 0x1\n\tglobal_load_b64 v[14:15], v11, s[4:5] offset:32 glc\n\tglobal_load_b64 v[5:6], v11, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v5\n\tv_readfirstlane_b32 s11, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[10:11], s[10:11], s[6:7]\n\ts_mul_i32 s11, s11, 24\n\ts_mul_hi_u32 s12, s10, 24\n\ts_mul_i32 s10, s10, 24\n\ts_add_i32 s12, s12, s11\n\tv_add_co_u32 v9, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s12, v4, vcc_lo\n\ts_mov_b32 s10, exec_lo\n\tglobal_store_b64 v[9:10], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[7:8], v11, v[12:15], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[7:8], v[14:15]\n\ts_cbranch_execz .LBB0_253\n; %bb.251:\n\ts_mov_b32 s11, 0\n.LBB0_252: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v6, s7\n\ts_sleep 1\n\tglobal_store_b64 v[9:10], v[7:8], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v11, v[5:8], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]\n\tv_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5\n\ts_or_b32 s11, vcc_lo, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s11\n\ts_cbranch_execnz .LBB0_252\n.LBB0_253:\n\ts_or_b32 exec_lo, exec_lo, s10\n\tv_mov_b32_e32 v5, 0\n\ts_mov_b32 s11, exec_lo\n\ts_mov_b32 s10, exec_lo\n\tv_mbcnt_lo_u32_b32 v7, s11, 0\n\tglobal_load_b64 v[5:6], v5, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v7\n\ts_cbranch_execz .LBB0_255\n; %bb.254:\n\ts_bcnt1_i32_b32 s11, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v7, s11\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[5:6], v[7:8], off offset:8\n.LBB0_255:\n\ts_or_b32 exec_lo, exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[7:8], v[5:6], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[7:8]\n\ts_cbranch_vccnz .LBB0_257\n; %bb.256:\n\tglobal_load_b32 v5, v[5:6], off offset:24\n\tv_mov_b32_e32 v6, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_and_b32 m0, s10, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_257:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s9, 24\n\ts_mul_hi_u32 s9, s8, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s9, s9, s3\n\ts_mul_i32 s3, s8, 24\n\tv_add_co_u32 v3, vcc_lo, v3, s3\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v3, 20\n\tv_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo\n\ts_branch .LBB0_261\n\t.p2align\t6\n.LBB0_258: ; in Loop: Header=BB0_261 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v5\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_260\n; %bb.259: ; in Loop: Header=BB0_261 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_261\n\ts_branch .LBB0_263\n\t.p2align\t6\n.LBB0_260:\n\ts_branch .LBB0_263\n.LBB0_261: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v5, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_258\n; %bb.262: ; in Loop: Header=BB0_261 Depth=1\n\tglobal_load_b32 v5, v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v5, 1, v5\n\ts_branch .LBB0_258\n.LBB0_263:\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_267\n; %bb.264:\n\tv_mov_b32_e32 v9, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[5:6], v9, s[4:5] offset:40\n\tglobal_load_b64 v[10:11], v9, s[4:5] offset:24 glc\n\tglobal_load_b64 v[7:8], v9, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v12, vcc_lo, v5, 1\n\tv_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v12, s6\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\tv_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12\n\tv_and_b32_e32 v6, v4, v6\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v5, v3, v5\n\tv_mul_lo_u32 v6, v6, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v12, v5, 24\n\tv_mul_lo_u32 v5, v5, 24\n\tv_add_nc_u32_e32 v6, v12, v6\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v7, vcc_lo, v7, v5\n\tv_mov_b32_e32 v5, v10\n\tv_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo\n\tv_mov_b32_e32 v6, v11\n\tglobal_store_b64 v[7:8], v[10:11], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_267\n; %bb.265:\n\ts_mov_b32 s2, 0\n.LBB0_266: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6]\n\tv_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_266\n.LBB0_267:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_getpc_b64 s[6:7]\n\ts_add_u32 s6, s6, .str.1@rel32@lo+4\n\ts_addc_u32 s7, s7, .str.1@rel32@hi+12\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_cmp_lg_u64 s[6:7], 0\n\ts_cbranch_scc0 .LBB0_345\n; %bb.268:\n\ts_waitcnt vmcnt(0)\n\tv_dual_mov_b32 v27, 0 :: v_dual_and_b32 v26, 2, v0\n\tv_and_b32_e32 v24, -3, v0\n\ts_mov_b64 s[8:9], 40\n\tv_mov_b32_e32 v25, v1\n\ts_delay_alu instid0(VALU_DEP_3)\n\tv_dual_mov_b32 v29, v27 :: v_dual_mov_b32 v28, v26\n\ts_branch .LBB0_270\n.LBB0_269: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_sub_u32 s8, s8, s10\n\ts_subb_u32 s9, s9, s11\n\ts_add_u32 s6, s6, s10\n\ts_addc_u32 s7, s7, s11\n\ts_cmp_lg_u64 s[8:9], 0\n\ts_cbranch_scc0 .LBB0_346\n.LBB0_270: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_273 Depth 2\n ; Child Loop BB0_280 Depth 2\n ; Child Loop BB0_287 Depth 2\n ; Child Loop BB0_294 Depth 2\n ; Child Loop BB0_301 Depth 2\n ; Child Loop BB0_308 Depth 2\n ; Child Loop BB0_315 Depth 2\n ; Child Loop BB0_322 Depth 2\n ; Child Loop BB0_330 Depth 2\n ; Child Loop BB0_339 Depth 2\n ; Child Loop BB0_344 Depth 2\n\tv_cmp_lt_u64_e64 s2, s[8:9], 56\n ; implicit-def: $vgpr5_vgpr6\n ; implicit-def: $sgpr17\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b32 s2, s2, exec_lo\n\ts_cselect_b32 s10, s8, 56\n\ts_cselect_b32 s11, s9, 0\n\ts_cmp_gt_u32 s10, 7\n\ts_mov_b32 s2, -1\n\ts_cbranch_scc1 .LBB0_275\n; %bb.271: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v5, 0\n\tv_mov_b32_e32 v6, 0\n\ts_cmp_eq_u32 s10, 0\n\ts_cbranch_scc1 .LBB0_274\n; %bb.272: ; in Loop: Header=BB0_270 Depth=1\n\ts_lshl_b64 s[2:3], s[10:11], 3\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], s[6:7]\n.LBB0_273: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tglobal_load_u8 v3, v27, s[14:15]\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_add_u32 s14, s14, 1\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s2, s12\n\tv_or_b32_e32 v5, v3, v5\n\tv_or_b32_e32 v6, v4, v6\n\ts_cbranch_scc1 .LBB0_273\n.LBB0_274: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s2, 0\n\ts_mov_b32 s17, 0\n.LBB0_275: ; in Loop: Header=BB0_270 Depth=1\n\ts_and_not1_b32 vcc_lo, exec_lo, s2\n\ts_mov_b64 s[2:3], s[6:7]\n\ts_cbranch_vccnz .LBB0_277\n; %bb.276: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[5:6], v27, s[6:7]\n\ts_add_i32 s17, s10, -8\n\ts_add_u32 s2, s6, 8\n\ts_addc_u32 s3, s7, 0\n.LBB0_277: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s17, 7\n\ts_cbranch_scc1 .LBB0_282\n; %bb.278: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v7, 0\n\tv_mov_b32_e32 v8, 0\n\ts_cmp_eq_u32 s17, 0\n\ts_cbranch_scc1 .LBB0_281\n; %bb.279: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], 0\n.LBB0_280: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s18, s2, s14\n\ts_addc_u32 s19, s3, s15\n\ts_add_u32 s14, s14, 1\n\tglobal_load_u8 v3, v27, s[18:19]\n\ts_addc_u32 s15, s15, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_cmp_lg_u32 s17, s14\n\tv_or_b32_e32 v7, v3, v7\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v8, v4, v8\n\ts_cbranch_scc1 .LBB0_280\n.LBB0_281: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s16, 0\n\ts_cbranch_execz .LBB0_283\n\ts_branch .LBB0_284\n.LBB0_282: ; in Loop: Header=BB0_270 Depth=1\n ; implicit-def: $vgpr7_vgpr8\n ; implicit-def: $sgpr16\n.LBB0_283: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[7:8], v27, s[2:3]\n\ts_add_i32 s16, s17, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_284: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s16, 7\n\ts_cbranch_scc1 .LBB0_289\n; %bb.285: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v9, 0\n\tv_mov_b32_e32 v10, 0\n\ts_cmp_eq_u32 s16, 0\n\ts_cbranch_scc1 .LBB0_288\n; %bb.286: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], 0\n.LBB0_287: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s18, s2, s14\n\ts_addc_u32 s19, s3, s15\n\ts_add_u32 s14, s14, 1\n\tglobal_load_u8 v3, v27, s[18:19]\n\ts_addc_u32 s15, s15, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_cmp_lg_u32 s16, s14\n\tv_or_b32_e32 v9, v3, v9\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v10, v4, v10\n\ts_cbranch_scc1 .LBB0_287\n.LBB0_288: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s17, 0\n\ts_cbranch_execz .LBB0_290\n\ts_branch .LBB0_291\n.LBB0_289: ; in Loop: Header=BB0_270 Depth=1\n ; implicit-def: $sgpr17\n.LBB0_290: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[9:10], v27, s[2:3]\n\ts_add_i32 s17, s16, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_291: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s17, 7\n\ts_cbranch_scc1 .LBB0_296\n; %bb.292: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v11, 0\n\tv_mov_b32_e32 v12, 0\n\ts_cmp_eq_u32 s17, 0\n\ts_cbranch_scc1 .LBB0_295\n; %bb.293: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], 0\n.LBB0_294: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s18, s2, s14\n\ts_addc_u32 s19, s3, s15\n\ts_add_u32 s14, s14, 1\n\tglobal_load_u8 v3, v27, s[18:19]\n\ts_addc_u32 s15, s15, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_cmp_lg_u32 s17, s14\n\tv_or_b32_e32 v11, v3, v11\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v12, v4, v12\n\ts_cbranch_scc1 .LBB0_294\n.LBB0_295: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s16, 0\n\ts_cbranch_execz .LBB0_297\n\ts_branch .LBB0_298\n.LBB0_296: ; in Loop: Header=BB0_270 Depth=1\n ; implicit-def: $vgpr11_vgpr12\n ; implicit-def: $sgpr16\n.LBB0_297: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[11:12], v27, s[2:3]\n\ts_add_i32 s16, s17, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_298: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s16, 7\n\ts_cbranch_scc1 .LBB0_303\n; %bb.299: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v13, 0\n\tv_mov_b32_e32 v14, 0\n\ts_cmp_eq_u32 s16, 0\n\ts_cbranch_scc1 .LBB0_302\n; %bb.300: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], 0\n.LBB0_301: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s18, s2, s14\n\ts_addc_u32 s19, s3, s15\n\ts_add_u32 s14, s14, 1\n\tglobal_load_u8 v3, v27, s[18:19]\n\ts_addc_u32 s15, s15, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_cmp_lg_u32 s16, s14\n\tv_or_b32_e32 v13, v3, v13\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v14, v4, v14\n\ts_cbranch_scc1 .LBB0_301\n.LBB0_302: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s17, 0\n\ts_cbranch_execz .LBB0_304\n\ts_branch .LBB0_305\n.LBB0_303: ; in Loop: Header=BB0_270 Depth=1\n ; implicit-def: $sgpr17\n.LBB0_304: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[13:14], v27, s[2:3]\n\ts_add_i32 s17, s16, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_305: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s17, 7\n\ts_cbranch_scc1 .LBB0_310\n; %bb.306: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v15, 0\n\tv_mov_b32_e32 v16, 0\n\ts_cmp_eq_u32 s17, 0\n\ts_cbranch_scc1 .LBB0_309\n; %bb.307: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], 0\n.LBB0_308: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s18, s2, s14\n\ts_addc_u32 s19, s3, s15\n\ts_add_u32 s14, s14, 1\n\tglobal_load_u8 v3, v27, s[18:19]\n\ts_addc_u32 s15, s15, 0\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_cmp_lg_u32 s17, s14\n\tv_or_b32_e32 v15, v3, v15\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_or_b32_e32 v16, v4, v16\n\ts_cbranch_scc1 .LBB0_308\n.LBB0_309: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s16, 0\n\ts_cbranch_execz .LBB0_311\n\ts_branch .LBB0_312\n.LBB0_310: ; in Loop: Header=BB0_270 Depth=1\n ; implicit-def: $vgpr15_vgpr16\n ; implicit-def: $sgpr16\n.LBB0_311: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[15:16], v27, s[2:3]\n\ts_add_i32 s16, s17, -8\n\ts_add_u32 s2, s2, 8\n\ts_addc_u32 s3, s3, 0\n.LBB0_312: ; in Loop: Header=BB0_270 Depth=1\n\ts_cmp_gt_u32 s16, 7\n\ts_cbranch_scc1 .LBB0_317\n; %bb.313: ; in Loop: Header=BB0_270 Depth=1\n\tv_mov_b32_e32 v17, 0\n\tv_mov_b32_e32 v18, 0\n\ts_cmp_eq_u32 s16, 0\n\ts_cbranch_scc1 .LBB0_316\n; %bb.314: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b64 s[12:13], 0\n\ts_mov_b64 s[14:15], s[2:3]\n.LBB0_315: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tglobal_load_u8 v3, v27, s[14:15]\n\ts_add_i32 s16, s16, -1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e32 v26, 0xffff, v3\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], s12, v[26:27]\n\ts_add_u32 s12, s12, 8\n\ts_addc_u32 s13, s13, 0\n\ts_add_u32 s14, s14, 1\n\ts_addc_u32 s15, s15, 0\n\ts_cmp_lg_u32 s16, 0\n\tv_or_b32_e32 v17, v3, v17\n\tv_or_b32_e32 v18, v4, v18\n\ts_cbranch_scc1 .LBB0_315\n.LBB0_316: ; in Loop: Header=BB0_270 Depth=1\n\ts_cbranch_execz .LBB0_318\n\ts_branch .LBB0_319\n.LBB0_317: ; in Loop: Header=BB0_270 Depth=1\n.LBB0_318: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[17:18], v27, s[2:3]\n.LBB0_319: ; in Loop: Header=BB0_270 Depth=1\n\tv_dual_mov_b32 v26, v34 :: v_dual_mov_b32 v3, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v26\n\tv_mov_b32_e32 v4, 0\n\tv_cmp_eq_u32_e64 s2, s2, v26\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_325\n; %bb.320: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[21:22], v27, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v27, s[4:5] offset:40\n\tglobal_load_b64 v[19:20], v27, s[4:5]\n\ts_mov_b32 s12, exec_lo\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v22\n\tv_and_b32_e32 v3, v3, v21\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v30, v3, 24\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v30, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v19, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, v20, v4, vcc_lo\n\tglobal_load_b64 v[19:20], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v27, v[19:22], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[3:4], v[21:22]\n\ts_cbranch_execz .LBB0_324\n; %bb.321: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s13, 0\n\t.p2align\t6\n.LBB0_322: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[19:20], v27, s[4:5] offset:40\n\tglobal_load_b64 v[30:31], v27, s[4:5]\n\tv_dual_mov_b32 v22, v4 :: v_dual_mov_b32 v21, v3\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v19, v19, v21\n\ts_waitcnt vmcnt(0)\n\tv_mad_u64_u32 v[3:4], null, v19, 24, v[30:31]\n\tv_and_b32_e32 v30, v20, v22\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[19:20], null, v30, 24, v[4:5]\n\tv_mov_b32_e32 v4, v19\n\tglobal_load_b64 v[19:20], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[3:4], v27, v[19:22], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[3:4], v[21:22]\n\ts_or_b32 s13, vcc_lo, s13\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s13\n\ts_cbranch_execnz .LBB0_322\n; %bb.323: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s13\n.LBB0_324: ; in Loop: Header=BB0_270 Depth=1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s12\n.LBB0_325: ; in Loop: Header=BB0_270 Depth=1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_clause 0x1\n\tglobal_load_b64 v[30:31], v27, s[4:5] offset:40\n\tglobal_load_b128 v[19:22], v27, s[4:5]\n\tv_readfirstlane_b32 s12, v3\n\tv_readfirstlane_b32 s13, v4\n\ts_mov_b32 s16, exec_lo\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s14, v30\n\tv_readfirstlane_b32 s15, v31\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[14:15], s[12:13], s[14:15]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_327\n; %bb.326: ; in Loop: Header=BB0_270 Depth=1\n\tv_dual_mov_b32 v35, s16 :: v_dual_mov_b32 v36, 0\n\ts_mul_i32 s16, s15, 24\n\ts_mul_hi_u32 s17, s14, 24\n\tv_dual_mov_b32 v37, 2 :: v_dual_mov_b32 v38, 1\n\ts_add_i32 s17, s17, s16\n\ts_mul_i32 s16, s14, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v19, s16\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s17, v20, vcc_lo\n\tglobal_store_b128 v[3:4], v[35:38], off offset:8\n.LBB0_327: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_cmp_gt_u64_e64 vcc_lo, s[8:9], 56\n\tv_or_b32_e32 v3, v25, v29\n\tv_or_b32_e32 v30, v24, v28\n\ts_lshl_b64 s[16:17], s[14:15], 12\n\ts_lshl_b32 s3, s10, 2\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\ts_add_i32 s3, s3, 28\n\tv_dual_cndmask_b32 v4, v3, v25 :: v_dual_cndmask_b32 v3, v30, v24\n\tv_lshlrev_b64 v[24:25], 6, v[26:27]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v21, vcc_lo, v21, s16\n\tv_add_co_ci_u32_e32 v22, vcc_lo, s17, v22, vcc_lo\n\ts_and_b32 s3, s3, 0x1e0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v21, vcc_lo, v21, v24\n\tv_and_or_b32 v3, v3, 0xffffff1f, s3\n\tv_add_co_ci_u32_e32 v22, vcc_lo, v22, v25, vcc_lo\n\ts_clause 0x3\n\tglobal_store_b128 v[21:22], v[3:6], off\n\tglobal_store_b128 v[21:22], v[7:10], off offset:16\n\tglobal_store_b128 v[21:22], v[11:14], off offset:32\n\tglobal_store_b128 v[21:22], v[15:18], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_335\n; %bb.328: ; in Loop: Header=BB0_270 Depth=1\n\ts_clause 0x1\n\tglobal_load_b64 v[11:12], v27, s[4:5] offset:32 glc\n\tglobal_load_b64 v[3:4], v27, s[4:5] offset:40\n\tv_dual_mov_b32 v9, s12 :: v_dual_mov_b32 v10, s13\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s16, v3\n\tv_readfirstlane_b32 s17, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[16:17], s[16:17], s[12:13]\n\ts_mul_i32 s17, s17, 24\n\ts_mul_hi_u32 s18, s16, 24\n\ts_mul_i32 s16, s16, 24\n\ts_add_i32 s18, s18, s17\n\tv_add_co_u32 v7, vcc_lo, v19, s16\n\tv_add_co_ci_u32_e32 v8, vcc_lo, s18, v20, vcc_lo\n\ts_mov_b32 s16, exec_lo\n\tglobal_store_b64 v[7:8], v[11:12], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v27, v[9:12], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[5:6], v[11:12]\n\ts_cbranch_execz .LBB0_331\n; %bb.329: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s17, 0\n.LBB0_330: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_dual_mov_b32 v3, s12 :: v_dual_mov_b32 v4, s13\n\ts_sleep 1\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[3:4], v27, v[3:6], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[3:4], v[5:6]\n\tv_dual_mov_b32 v6, v4 :: v_dual_mov_b32 v5, v3\n\ts_or_b32 s17, vcc_lo, s17\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s17\n\ts_cbranch_execnz .LBB0_330\n.LBB0_331: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s16\n\tglobal_load_b64 v[3:4], v27, s[4:5] offset:16\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 s16, exec_lo\n\tv_mbcnt_lo_u32_b32 v5, s17, 0\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_cmpx_eq_u32_e32 0, v5\n\ts_cbranch_execz .LBB0_333\n; %bb.332: ; in Loop: Header=BB0_270 Depth=1\n\ts_bcnt1_i32_b32 s17, s17\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, s17\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[3:4], v[5:6], off offset:8\n.LBB0_333: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s16\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[3:4], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]\n\ts_cbranch_vccnz .LBB0_335\n; %bb.334: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b32 v26, v[3:4], off offset:24\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s16, v26\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[5:6], v[26:27], off\n\ts_and_b32 m0, s16, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_335: ; in Loop: Header=BB0_270 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s15, 24\n\ts_mul_hi_u32 s15, s14, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s15, s15, s3\n\ts_mul_i32 s3, s14, 24\n\tv_add_co_u32 v3, vcc_lo, v19, s3\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s15, v20, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v3, 20\n\tv_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo\n\ts_branch .LBB0_339\n\t.p2align\t6\n.LBB0_336: ; in Loop: Header=BB0_339 Depth=2\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v5\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_338\n; %bb.337: ; in Loop: Header=BB0_339 Depth=2\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_339\n\ts_branch .LBB0_341\n\t.p2align\t6\n.LBB0_338: ; in Loop: Header=BB0_270 Depth=1\n\ts_branch .LBB0_341\n.LBB0_339: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\tv_mov_b32_e32 v5, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_336\n; %bb.340: ; in Loop: Header=BB0_339 Depth=2\n\tglobal_load_b32 v5, v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v5, 1, v5\n\ts_branch .LBB0_336\n.LBB0_341: ; in Loop: Header=BB0_270 Depth=1\n\tglobal_load_b64 v[24:25], v[21:22], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_269\n; %bb.342: ; in Loop: Header=BB0_270 Depth=1\n\ts_clause 0x2\n\tglobal_load_b64 v[5:6], v27, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v27, s[4:5] offset:24 glc\n\tglobal_load_b64 v[7:8], v27, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v11, vcc_lo, v5, 1\n\tv_add_co_ci_u32_e32 v12, vcc_lo, 0, v6, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v11, s12\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s13, v12, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\tv_dual_cndmask_b32 v4, v4, v12 :: v_dual_cndmask_b32 v3, v3, v11\n\tv_and_b32_e32 v6, v4, v6\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_and_b32_e32 v5, v3, v5\n\tv_mul_hi_u32 v11, v5, 24\n\tv_mul_lo_u32 v5, v5, 24\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v7, vcc_lo, v7, v5\n\tv_mov_b32_e32 v5, v9\n\tv_mul_lo_u32 v6, v6, 24\n\tv_add_nc_u32_e32 v6, v11, v6\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo\n\tv_mov_b32_e32 v6, v10\n\tglobal_store_b64 v[7:8], v[9:10], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v27, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[5:6], v[9:10]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_269\n; %bb.343: ; in Loop: Header=BB0_270 Depth=1\n\ts_mov_b32 s2, 0\n.LBB0_344: ; Parent Loop BB0_270 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_sleep 1\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[9:10], v27, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[5:6]\n\tv_dual_mov_b32 v5, v9 :: v_dual_mov_b32 v6, v10\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_344\n\ts_branch .LBB0_269\n.LBB0_345:\n ; implicit-def: $vgpr24_vgpr25\n\ts_cbranch_execnz .LBB0_347\n\ts_branch .LBB0_374\n.LBB0_346:\n\ts_branch .LBB0_374\n.LBB0_347:\n\tv_mov_b32_e32 v7, v34\n\tv_mov_b32_e32 v9, 0\n\tv_mov_b32_e32 v10, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s2, v7\n\tv_cmp_eq_u32_e64 s2, s2, v7\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_353\n; %bb.348:\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s6, exec_lo\n\tglobal_load_b64 v[11:12], v3, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[4:5], v3, s[4:5] offset:40\n\tglobal_load_b64 v[8:9], v3, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v11\n\tv_and_b32_e32 v5, v5, v12\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v6, v4, 24\n\tv_mul_lo_u32 v5, v5, 24\n\tv_mul_lo_u32 v4, v4, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v5, v6, v5\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v4, vcc_lo, v8, v4\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo\n\tglobal_load_b64 v[9:10], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v3, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[9:10], v[11:12]\n\ts_cbranch_execz .LBB0_352\n; %bb.349:\n\ts_mov_b32 s7, 0\n\t.p2align\t6\n.LBB0_350: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[4:5], v3, s[4:5] offset:40\n\tglobal_load_b64 v[13:14], v3, s[4:5]\n\tv_dual_mov_b32 v12, v10 :: v_dual_mov_b32 v11, v9\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v4, v4, v11\n\tv_and_b32_e32 v10, v5, v12\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[8:9], null, v4, 24, v[13:14]\n\tv_mov_b32_e32 v4, v9\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[5:6], null, v10, 24, v[4:5]\n\tv_mov_b32_e32 v9, v5\n\tglobal_load_b64 v[9:10], v[8:9], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[9:10], v3, v[9:12], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[9:10], v[11:12]\n\ts_or_b32 s7, vcc_lo, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s7\n\ts_cbranch_execnz .LBB0_350\n; %bb.351:\n\ts_or_b32 exec_lo, exec_lo, s7\n.LBB0_352:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_353:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v8, 0\n\tv_readfirstlane_b32 s6, v9\n\tv_readfirstlane_b32 s7, v10\n\ts_mov_b32 s10, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[11:12], v8, s[4:5] offset:40\n\tglobal_load_b128 v[3:6], v8, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s8, v11\n\tv_readfirstlane_b32 s9, v12\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[8:9], s[6:7], s[8:9]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_355\n; %bb.354:\n\tv_dual_mov_b32 v9, s10 :: v_dual_mov_b32 v10, 0\n\ts_mul_i32 s10, s9, 24\n\ts_mul_hi_u32 s11, s8, 24\n\tv_dual_mov_b32 v11, 2 :: v_dual_mov_b32 v12, 1\n\ts_add_i32 s11, s11, s10\n\ts_mul_i32 s10, s8, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v13, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v14, vcc_lo, s11, v4, vcc_lo\n\tglobal_store_b128 v[13:14], v[9:12], off offset:8\n.LBB0_355:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[10:11], s[8:9], 12\n\ts_mov_b32 s12, 0\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v9, vcc_lo, v5, s10\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s11, v6, vcc_lo\n\tv_lshlrev_b64 v[5:6], 6, v[7:8]\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_mov_b32_e32 v11, 0\n\tv_and_or_b32 v0, v0, 0xffffff1f, 32\n\tv_add_co_u32 v9, vcc_lo, v9, v5\n\tv_add_co_ci_u32_e32 v10, vcc_lo, v10, v6, vcc_lo\n\tv_dual_mov_b32 v5, s12 :: v_dual_mov_b32 v8, s15\n\tv_dual_mov_b32 v6, s13 :: v_dual_mov_b32 v7, s14\n\tv_mov_b32_e32 v12, v11\n\ts_clause 0x4\n\tglobal_store_b64 v[9:10], v[0:1], off\n\tglobal_store_b128 v[9:10], v[5:8], off offset:8\n\tglobal_store_b128 v[9:10], v[5:8], off offset:24\n\tglobal_store_b128 v[9:10], v[5:8], off offset:40\n\tglobal_store_b64 v[9:10], v[11:12], off offset:56\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_363\n; %bb.356:\n\tv_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s6\n\tv_mov_b32_e32 v13, s7\n\ts_clause 0x1\n\tglobal_load_b64 v[14:15], v11, s[4:5] offset:32 glc\n\tglobal_load_b64 v[0:1], v11, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v0\n\tv_readfirstlane_b32 s11, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[10:11], s[10:11], s[6:7]\n\ts_mul_i32 s11, s11, 24\n\ts_mul_hi_u32 s12, s10, 24\n\ts_mul_i32 s10, s10, 24\n\ts_add_i32 s12, s12, s11\n\tv_add_co_u32 v0, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s12, v4, vcc_lo\n\ts_mov_b32 s10, exec_lo\n\tglobal_store_b64 v[0:1], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[7:8], v11, v[12:15], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[7:8], v[14:15]\n\ts_cbranch_execz .LBB0_359\n; %bb.357:\n\ts_mov_b32 s11, 0\n.LBB0_358: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v6, s7\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[7:8], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v11, v[5:8], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]\n\tv_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5\n\ts_or_b32 s11, vcc_lo, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s11\n\ts_cbranch_execnz .LBB0_358\n.LBB0_359:\n\ts_or_b32 exec_lo, exec_lo, s10\n\tv_mov_b32_e32 v0, 0\n\ts_mov_b32 s11, exec_lo\n\ts_mov_b32 s10, exec_lo\n\tv_mbcnt_lo_u32_b32 v5, s11, 0\n\tglobal_load_b64 v[0:1], v0, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v5\n\ts_cbranch_execz .LBB0_361\n; %bb.360:\n\ts_bcnt1_i32_b32 s11, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v6, 0 :: v_dual_mov_b32 v5, s11\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[5:6], off offset:8\n.LBB0_361:\n\ts_or_b32 exec_lo, exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[5:6]\n\ts_cbranch_vccnz .LBB0_363\n; %bb.362:\n\tglobal_load_b32 v0, v[0:1], off offset:24\n\tv_mov_b32_e32 v1, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v0\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[5:6], v[0:1], off\n\ts_and_b32 m0, s10, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_363:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s9, 24\n\ts_mul_hi_u32 s9, s8, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s9, s9, s3\n\ts_mul_i32 s3, s8, 24\n\tv_add_co_u32 v0, vcc_lo, v3, s3\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s9, v4, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v0, 20\n\tv_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo\n\ts_branch .LBB0_367\n\t.p2align\t6\n.LBB0_364: ; in Loop: Header=BB0_367 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v3\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_366\n; %bb.365: ; in Loop: Header=BB0_367 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_367\n\ts_branch .LBB0_369\n\t.p2align\t6\n.LBB0_366:\n\ts_branch .LBB0_369\n.LBB0_367: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v3, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_364\n; %bb.368: ; in Loop: Header=BB0_367 Depth=1\n\tglobal_load_b32 v3, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v3, 1, v3\n\ts_branch .LBB0_364\n.LBB0_369:\n\tglobal_load_b64 v[24:25], v[9:10], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_373\n; %bb.370:\n\tv_mov_b32_e32 v7, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[0:1], v7, s[4:5] offset:40\n\tglobal_load_b64 v[8:9], v7, s[4:5] offset:24 glc\n\tglobal_load_b64 v[5:6], v7, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v10, vcc_lo, v0, 1\n\tv_add_co_ci_u32_e32 v11, vcc_lo, 0, v1, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v10, s6\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v11, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\tv_dual_cndmask_b32 v4, v4, v11 :: v_dual_cndmask_b32 v3, v3, v10\n\tv_and_b32_e32 v1, v4, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v0, v3, v0\n\tv_mul_lo_u32 v1, v1, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v10, v0, 24\n\tv_mul_lo_u32 v0, v0, 24\n\tv_add_nc_u32_e32 v1, v10, v1\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v0, vcc_lo, v5, v0\n\tv_mov_b32_e32 v5, v8\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo\n\tv_mov_b32_e32 v6, v9\n\tglobal_store_b64 v[0:1], v[8:9], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v7, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[5:6], v[8:9]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_373\n; %bb.371:\n\ts_mov_b32 s2, 0\n.LBB0_372: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[0:1], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[8:9], v7, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[8:9], v[5:6]\n\tv_dual_mov_b32 v5, v8 :: v_dual_mov_b32 v6, v9\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_372\n.LBB0_373:\n\ts_or_b32 exec_lo, exec_lo, s3\n.LBB0_374:\n\ts_waitcnt vmcnt(0)\n\tv_dual_mov_b32 v0, v34 :: v_dual_mov_b32 v7, 0\n\t;;#ASMSTART\n\t;;#ASMEND\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_readfirstlane_b32 s2, v0\n\tv_mov_b32_e32 v8, 0\n\tv_cmp_eq_u32_e64 s2, s2, v0\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_380\n; %bb.375:\n\tv_mov_b32_e32 v1, 0\n\ts_mov_b32 s6, exec_lo\n\tglobal_load_b64 v[5:6], v1, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[7:8], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v6\n\tv_and_b32_e32 v3, v3, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_lo_u32 v4, v4, 24\n\tv_mul_hi_u32 v9, v3, 24\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v4, v9, v4\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v3, vcc_lo, v7, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, v8, v4, vcc_lo\n\tglobal_load_b64 v[3:4], v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[7:8], v1, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[7:8], v[5:6]\n\ts_cbranch_execz .LBB0_379\n; %bb.376:\n\ts_mov_b32 s7, 0\n\t.p2align\t6\n.LBB0_377: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[3:4], v1, s[4:5] offset:40\n\tglobal_load_b64 v[9:10], v1, s[4:5]\n\tv_dual_mov_b32 v5, v7 :: v_dual_mov_b32 v6, v8\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v3, v3, v5\n\tv_and_b32_e32 v4, v4, v6\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[7:8], null, v3, 24, v[9:10]\n\tv_mov_b32_e32 v3, v8\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u64_u32 v[8:9], null, v4, 24, v[3:4]\n\tglobal_load_b64 v[3:4], v[7:8], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[7:8], v1, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[7:8], v[5:6]\n\ts_or_b32 s7, vcc_lo, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s7\n\ts_cbranch_execnz .LBB0_377\n; %bb.378:\n\ts_or_b32 exec_lo, exec_lo, s7\n.LBB0_379:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_380:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v1, 0\n\tv_readfirstlane_b32 s6, v7\n\tv_readfirstlane_b32 s7, v8\n\ts_mov_b32 s10, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[9:10], v1, s[4:5] offset:40\n\tglobal_load_b128 v[3:6], v1, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s8, v9\n\tv_readfirstlane_b32 s9, v10\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[8:9], s[6:7], s[8:9]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_382\n; %bb.381:\n\tv_dual_mov_b32 v7, s10 :: v_dual_mov_b32 v8, 0\n\ts_mul_i32 s10, s9, 24\n\ts_mul_hi_u32 s11, s8, 24\n\tv_dual_mov_b32 v9, 2 :: v_dual_mov_b32 v10, 1\n\ts_add_i32 s11, s11, s10\n\ts_mul_i32 s10, s8, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v11, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v12, vcc_lo, s11, v4, vcc_lo\n\tglobal_store_b128 v[11:12], v[7:10], off offset:8\n.LBB0_382:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_lshl_b64 s[10:11], s[8:9], 12\n\tv_lshlrev_b64 v[0:1], 6, v[0:1]\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v5, vcc_lo, v5, s10\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s11, v6, vcc_lo\n\ts_mov_b32 s12, 0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v5, v0\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_mov_b32_e32 v9, 0\n\tv_and_or_b32 v24, v24, 0xffffff1f, 32\n\tv_add_co_ci_u32_e32 v1, vcc_lo, v6, v1, vcc_lo\n\tv_dual_mov_b32 v5, s12 :: v_dual_mov_b32 v8, s15\n\tv_dual_mov_b32 v6, s13 :: v_dual_mov_b32 v7, s14\n\tv_mov_b32_e32 v10, v9\n\ts_clause 0x4\n\tglobal_store_b64 v[0:1], v[24:25], off\n\tglobal_store_b128 v[0:1], v[5:8], off offset:8\n\tglobal_store_b128 v[0:1], v[5:8], off offset:24\n\tglobal_store_b128 v[0:1], v[5:8], off offset:40\n\tglobal_store_b64 v[0:1], v[9:10], off offset:56\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_390\n; %bb.383:\n\tv_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, s6\n\tv_mov_b32_e32 v13, s7\n\ts_clause 0x1\n\tglobal_load_b64 v[14:15], v11, s[4:5] offset:32 glc\n\tglobal_load_b64 v[5:6], v11, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v5\n\tv_readfirstlane_b32 s11, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[10:11], s[10:11], s[6:7]\n\ts_mul_i32 s11, s11, 24\n\ts_mul_hi_u32 s12, s10, 24\n\ts_mul_i32 s10, s10, 24\n\ts_add_i32 s12, s12, s11\n\tv_add_co_u32 v9, vcc_lo, v3, s10\n\tv_add_co_ci_u32_e32 v10, vcc_lo, s12, v4, vcc_lo\n\ts_mov_b32 s10, exec_lo\n\tglobal_store_b64 v[9:10], v[14:15], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[7:8], v11, v[12:15], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[7:8], v[14:15]\n\ts_cbranch_execz .LBB0_386\n; %bb.384:\n\ts_mov_b32 s11, 0\n.LBB0_385: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v5, s6 :: v_dual_mov_b32 v6, s7\n\ts_sleep 1\n\tglobal_store_b64 v[9:10], v[7:8], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v11, v[5:8], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[5:6], v[7:8]\n\tv_dual_mov_b32 v8, v6 :: v_dual_mov_b32 v7, v5\n\ts_or_b32 s11, vcc_lo, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s11\n\ts_cbranch_execnz .LBB0_385\n.LBB0_386:\n\ts_or_b32 exec_lo, exec_lo, s10\n\tv_mov_b32_e32 v5, 0\n\ts_mov_b32 s11, exec_lo\n\ts_mov_b32 s10, exec_lo\n\tv_mbcnt_lo_u32_b32 v7, s11, 0\n\tglobal_load_b64 v[5:6], v5, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v7\n\ts_cbranch_execz .LBB0_388\n; %bb.387:\n\ts_bcnt1_i32_b32 s11, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v7, s11\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[5:6], v[7:8], off offset:8\n.LBB0_388:\n\ts_or_b32 exec_lo, exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[7:8], v[5:6], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[7:8]\n\ts_cbranch_vccnz .LBB0_390\n; %bb.389:\n\tglobal_load_b32 v5, v[5:6], off offset:24\n\tv_mov_b32_e32 v6, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_and_b32 m0, s10, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_390:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s9, 24\n\ts_mul_hi_u32 s9, s8, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s9, s9, s3\n\ts_mul_i32 s3, s8, 24\n\tv_add_co_u32 v3, vcc_lo, v3, s3\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s9, v4, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v3, 20\n\tv_add_co_ci_u32_e32 v4, vcc_lo, 0, v4, vcc_lo\n\ts_branch .LBB0_394\n\t.p2align\t6\n.LBB0_391: ; in Loop: Header=BB0_394 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v5\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_393\n; %bb.392: ; in Loop: Header=BB0_394 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_394\n\ts_branch .LBB0_396\n\t.p2align\t6\n.LBB0_393:\n\ts_branch .LBB0_396\n.LBB0_394: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v5, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_391\n; %bb.395: ; in Loop: Header=BB0_394 Depth=1\n\tglobal_load_b32 v5, v[3:4], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v5, 1, v5\n\ts_branch .LBB0_391\n.LBB0_396:\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_400\n; %bb.397:\n\tv_mov_b32_e32 v9, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[5:6], v9, s[4:5] offset:40\n\tglobal_load_b64 v[10:11], v9, s[4:5] offset:24 glc\n\tglobal_load_b64 v[7:8], v9, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v12, vcc_lo, v5, 1\n\tv_add_co_ci_u32_e32 v13, vcc_lo, 0, v6, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v3, vcc_lo, v12, s6\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v13, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[3:4]\n\tv_dual_cndmask_b32 v4, v4, v13 :: v_dual_cndmask_b32 v3, v3, v12\n\tv_and_b32_e32 v6, v4, v6\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v5, v3, v5\n\tv_mul_lo_u32 v6, v6, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v12, v5, 24\n\tv_mul_lo_u32 v5, v5, 24\n\tv_add_nc_u32_e32 v6, v12, v6\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v7, vcc_lo, v7, v5\n\tv_mov_b32_e32 v5, v10\n\tv_add_co_ci_u32_e32 v8, vcc_lo, v8, v6, vcc_lo\n\tv_mov_b32_e32 v6, v11\n\tglobal_store_b64 v[7:8], v[10:11], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[5:6], v9, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[5:6], v[10:11]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_400\n; %bb.398:\n\ts_mov_b32 s2, 0\n.LBB0_399: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[7:8], v[5:6], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[10:11], v9, v[3:6], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[10:11], v[5:6]\n\tv_dual_mov_b32 v5, v10 :: v_dual_mov_b32 v6, v11\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_399\n.LBB0_400:\n\ts_or_b32 exec_lo, exec_lo, s3\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_readfirstlane_b32 s2, v34\n\tv_mov_b32_e32 v8, 0\n\tv_mov_b32_e32 v9, 0\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u32_e64 s2, s2, v34\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_406\n; %bb.401:\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s6, exec_lo\n\tglobal_load_b64 v[6:7], v3, s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_clause 0x1\n\tglobal_load_b64 v[4:5], v3, s[4:5] offset:40\n\tglobal_load_b64 v[8:9], v3, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_and_b32_e32 v4, v4, v6\n\tv_and_b32_e32 v5, v5, v7\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v10, v4, 24\n\tv_mul_lo_u32 v5, v5, 24\n\tv_mul_lo_u32 v4, v4, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v5, v10, v5\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v4, vcc_lo, v8, v4\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v5, vcc_lo, v9, v5, vcc_lo\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmpx_ne_u64_e64 v[8:9], v[6:7]\n\ts_cbranch_execz .LBB0_405\n; %bb.402:\n\ts_mov_b32 s7, 0\n\t.p2align\t6\n.LBB0_403: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\ts_clause 0x1\n\tglobal_load_b64 v[4:5], v3, s[4:5] offset:40\n\tglobal_load_b64 v[10:11], v3, s[4:5]\n\tv_dual_mov_b32 v6, v8 :: v_dual_mov_b32 v7, v9\n\ts_waitcnt vmcnt(1)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v4, v4, v6\n\tv_and_b32_e32 v5, v5, v7\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[8:9], null, v4, 24, v[10:11]\n\tv_mov_b32_e32 v4, v9\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_mad_u64_u32 v[9:10], null, v5, 24, v[4:5]\n\tglobal_load_b64 v[4:5], v[8:9], off glc\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_cmpswap_b64 v[8:9], v3, v[4:7], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e32 vcc_lo, v[8:9], v[6:7]\n\ts_or_b32 s7, vcc_lo, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s7\n\ts_cbranch_execnz .LBB0_403\n; %bb.404:\n\ts_or_b32 exec_lo, exec_lo, s7\n.LBB0_405:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s6\n.LBB0_406:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mov_b32_e32 v3, 0\n\tv_readfirstlane_b32 s6, v8\n\tv_readfirstlane_b32 s7, v9\n\ts_mov_b32 s10, exec_lo\n\ts_clause 0x1\n\tglobal_load_b64 v[10:11], v3, s[4:5] offset:40\n\tglobal_load_b128 v[4:7], v3, s[4:5]\n\ts_waitcnt vmcnt(1)\n\tv_readfirstlane_b32 s8, v10\n\tv_readfirstlane_b32 s9, v11\n\ts_delay_alu instid0(VALU_DEP_1)\n\ts_and_b64 s[8:9], s[6:7], s[8:9]\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_408\n; %bb.407:\n\tv_dual_mov_b32 v8, s10 :: v_dual_mov_b32 v9, 0\n\ts_mul_i32 s10, s9, 24\n\ts_mul_hi_u32 s11, s8, 24\n\tv_dual_mov_b32 v10, 2 :: v_dual_mov_b32 v11, 1\n\ts_add_i32 s11, s11, s10\n\ts_mul_i32 s10, s8, 24\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v12, vcc_lo, v4, s10\n\tv_add_co_ci_u32_e32 v13, vcc_lo, s11, v5, vcc_lo\n\tglobal_store_b128 v[12:13], v[8:11], off offset:8\n.LBB0_408:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mov_b32 s12, 0\n\ts_lshl_b64 s[10:11], s[8:9], 12\n\ts_mov_b32 s13, s12\n\ts_mov_b32 s14, s12\n\ts_mov_b32 s15, s12\n\tv_mov_b32_e32 v3, 0\n\ts_waitcnt vmcnt(0)\n\tv_add_co_u32 v6, vcc_lo, v6, s10\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s11, v7, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mov_b32_e32 v35, v3\n\tv_and_or_b32 v0, v0, 0xffffff1d, 34\n\tv_lshlrev_b64 v[8:9], 6, v[34:35]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v10, vcc_lo, v6, v8\n\tv_add_co_ci_u32_e32 v11, vcc_lo, v7, v9, vcc_lo\n\tv_mov_b32_e32 v6, s12\n\tv_dual_mov_b32 v8, s14 :: v_dual_mov_b32 v7, s13\n\tv_mov_b32_e32 v9, s15\n\ts_clause 0x3\n\tglobal_store_b128 v[10:11], v[0:3], off\n\tglobal_store_b128 v[10:11], v[6:9], off offset:16\n\tglobal_store_b128 v[10:11], v[6:9], off offset:32\n\tglobal_store_b128 v[10:11], v[6:9], off offset:48\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_416\n; %bb.409:\n\tv_dual_mov_b32 v8, 0 :: v_dual_mov_b32 v9, s6\n\tv_mov_b32_e32 v10, s7\n\ts_clause 0x1\n\tglobal_load_b64 v[11:12], v8, s[4:5] offset:32 glc\n\tglobal_load_b64 v[0:1], v8, s[4:5] offset:40\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v0\n\tv_readfirstlane_b32 s11, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b64 s[10:11], s[10:11], s[6:7]\n\ts_mul_i32 s11, s11, 24\n\ts_mul_hi_u32 s12, s10, 24\n\ts_mul_i32 s10, s10, 24\n\ts_add_i32 s12, s12, s11\n\tv_add_co_u32 v6, vcc_lo, v4, s10\n\tv_add_co_ci_u32_e32 v7, vcc_lo, s12, v5, vcc_lo\n\ts_mov_b32 s10, exec_lo\n\tglobal_store_b64 v[6:7], v[11:12], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[2:3], v8, v[9:12], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_ne_u64_e64 v[2:3], v[11:12]\n\ts_cbranch_execz .LBB0_412\n; %bb.410:\n\ts_mov_b32 s11, 0\n.LBB0_411: ; =>This Inner Loop Header: Depth=1\n\tv_dual_mov_b32 v0, s6 :: v_dual_mov_b32 v1, s7\n\ts_sleep 1\n\tglobal_store_b64 v[6:7], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v8, v[0:3], s[4:5] offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[0:1], v[2:3]\n\tv_dual_mov_b32 v3, v1 :: v_dual_mov_b32 v2, v0\n\ts_or_b32 s11, vcc_lo, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s11\n\ts_cbranch_execnz .LBB0_411\n.LBB0_412:\n\ts_or_b32 exec_lo, exec_lo, s10\n\tv_mov_b32_e32 v0, 0\n\ts_mov_b32 s11, exec_lo\n\ts_mov_b32 s10, exec_lo\n\tv_mbcnt_lo_u32_b32 v2, s11, 0\n\tglobal_load_b64 v[0:1], v0, s[4:5] offset:16\n\tv_cmpx_eq_u32_e32 0, v2\n\ts_cbranch_execz .LBB0_414\n; %bb.413:\n\ts_bcnt1_i32_b32 s11, s11\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_dual_mov_b32 v3, 0 :: v_dual_mov_b32 v2, s11\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off offset:8\n.LBB0_414:\n\ts_or_b32 exec_lo, exec_lo, s10\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[2:3]\n\ts_cbranch_vccnz .LBB0_416\n; %bb.415:\n\tglobal_load_b32 v0, v[0:1], off offset:24\n\tv_mov_b32_e32 v1, 0\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s10, v0\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[2:3], v[0:1], off\n\ts_and_b32 m0, s10, 0xff\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB0_416:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_mul_i32 s3, s9, 24\n\ts_mul_hi_u32 s9, s8, 24\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\ts_add_i32 s9, s9, s3\n\ts_mul_i32 s3, s8, 24\n\tv_add_co_u32 v0, vcc_lo, v4, s3\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s9, v5, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v0, 20\n\tv_add_co_ci_u32_e32 v1, vcc_lo, 0, v1, vcc_lo\n\ts_branch .LBB0_420\n\t.p2align\t6\n.LBB0_417: ; in Loop: Header=BB0_420 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_readfirstlane_b32 s3, v2\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_419\n; %bb.418: ; in Loop: Header=BB0_420 Depth=1\n\ts_sleep 1\n\ts_cbranch_execnz .LBB0_420\n\ts_branch .LBB0_422\n\t.p2align\t6\n.LBB0_419:\n\ts_branch .LBB0_422\n.LBB0_420: ; =>This Inner Loop Header: Depth=1\n\tv_mov_b32_e32 v2, 1\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_417\n; %bb.421: ; in Loop: Header=BB0_420 Depth=1\n\tglobal_load_b32 v2, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_and_b32_e32 v2, 1, v2\n\ts_branch .LBB0_417\n.LBB0_422:\n\ts_and_saveexec_b32 s3, s2\n\ts_cbranch_execz .LBB0_426\n; %bb.423:\n\tv_mov_b32_e32 v6, 0\n\ts_clause 0x2\n\tglobal_load_b64 v[2:3], v6, s[4:5] offset:40\n\tglobal_load_b64 v[7:8], v6, s[4:5] offset:24 glc\n\tglobal_load_b64 v[4:5], v6, s[4:5]\n\ts_waitcnt vmcnt(2)\n\tv_add_co_u32 v9, vcc_lo, v2, 1\n\tv_add_co_ci_u32_e32 v10, vcc_lo, 0, v3, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v0, vcc_lo, v9, s6\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s7, v10, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_cmp_eq_u64_e32 vcc_lo, 0, v[0:1]\n\tv_dual_cndmask_b32 v1, v1, v10 :: v_dual_cndmask_b32 v0, v0, v9\n\tv_and_b32_e32 v3, v1, v3\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_and_b32_e32 v2, v0, v2\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_hi_u32 v9, v2, 24\n\tv_mul_lo_u32 v2, v2, 24\n\tv_add_nc_u32_e32 v3, v9, v3\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(SKIP_1) | instid1(VALU_DEP_3)\n\tv_add_co_u32 v4, vcc_lo, v4, v2\n\tv_mov_b32_e32 v2, v7\n\tv_add_co_ci_u32_e32 v5, vcc_lo, v5, v3, vcc_lo\n\tv_mov_b32_e32 v3, v8\n\tglobal_store_b64 v[4:5], v[7:8], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[2:3], v6, v[0:3], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u64_e32 vcc_lo, v[2:3], v[7:8]\n\ts_and_b32 exec_lo, exec_lo, vcc_lo\n\ts_cbranch_execz .LBB0_426\n; %bb.424:\n\ts_mov_b32 s2, 0\n.LBB0_425: ; =>This Inner Loop Header: Depth=1\n\ts_sleep 1\n\tglobal_store_b64 v[4:5], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[7:8], v6, v[0:3], s[4:5] offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e32 vcc_lo, v[7:8], v[2:3]\n\tv_dual_mov_b32 v2, v7 :: v_dual_mov_b32 v3, v8\n\ts_or_b32 s2, vcc_lo, s2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s2\n\ts_cbranch_execnz .LBB0_425\n.LBB0_426:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tglobal_load_b32 v2, v[32:33], off\n\ts_load_b64 s[0:1], s[0:1], 0x18\n\tv_mov_b32_e32 v24, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[0:1], 2, v[23:24]\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v0, vcc_lo, s0, v0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s1, v1, vcc_lo\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b32 v[0:1], v2, off\n.LBB0_427:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z18compact2d_1D_arrayPiS_S_S_S_S_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 312\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 45\n\t\t.amdhsa_next_free_sgpr 24\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z18compact2d_1D_arrayPiS_S_S_S_S_i, .Lfunc_end0-_Z18compact2d_1D_arrayPiS_S_S_S_S_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 19556\n; NumSgprs: 26\n; NumVgprs: 45\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 3\n; VGPRBlocks: 5\n; NumSGPRsForWavesPerEU: 26\n; NumVGPRsForWavesPerEU: 45\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t.str,@object ; @.str\n\t.section\t.rodata.str1.1,\"aMS\",@progbits,1\n.str:\n\t.asciz\t\"gid : %d , index :%d , value : %d, prev_value : %d \\n\"\n\t.size\t.str, 53\n\n\t.type\t.str.1,@object ; @.str.1\n.str.1:\n\t.asciz\t\"column index : %d --- row length : %d \\n\"\n\t.size\t.str.1, 40\n\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 24\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 32\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 40\n .size: 8\n .value_kind: global_buffer\n - .offset: 48\n .size: 4\n .value_kind: by_value\n - .offset: 56\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 60\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 64\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 68\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 70\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 72\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 74\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 76\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 78\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 96\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 104\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 112\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 120\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 136\n .size: 8\n .value_kind: hidden_hostcall_buffer\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 312\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z18compact2d_1D_arrayPiS_S_S_S_S_i\n .private_segment_fixed_size: 0\n .sgpr_count: 26\n .sgpr_spill_count: 0\n .symbol: _Z18compact2d_1D_arrayPiS_S_S_S_S_i.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 45\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":96,"cells":{"id":{"kind":"string","value":"d90ecac23bb17b89dd7c7be0691c0d83d68ecf65_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z4convPfS_S_iii --------------------------\n .section .text._Z4convPfS_S_iii,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=24\"\n .align 128\n\n\n\n\n .global _Z4convPfS_S_iii\n .type _Z4convPfS_S_iii,@function\n .size _Z4convPfS_S_iii,(.L_x_38 - _Z4convPfS_S_iii)\n .other _Z4convPfS_S_iii,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z4convPfS_S_iii:\n.text._Z4convPfS_S_iii:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R0, SR_TID.X ;\n /*0020*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x178] ;\n /*0030*/ MOV R4, c[0x0][0x0] ;\n /*0040*/ IMAD.MOV.U32 R8, RZ, RZ, c[0x0][0x4] ;\n /*0050*/ S2R R2, SR_TID.Y ;\n /*0060*/ ULDC.64 UR6, c[0x0][0x118] ;\n /*0070*/ LEA.HI R3, R3, c[0x0][0x178], RZ, 0x1 ;\n /*0080*/ BSSY B0, `(.L_x_0) ;\n /*0090*/ S2R R11, SR_CTAID.Y ;\n /*00a0*/ SHF.R.S32.HI R3, RZ, 0x1, R3 ;\n /*00b0*/ S2R R9, SR_CTAID.X ;\n /*00c0*/ IADD3 R15, -R3.reuse, c[0x0][0x0], RZ ;\n /*00d0*/ IADD3 R5, -R3, c[0x0][0x4], RZ ;\n /*00e0*/ ISETP.GE.U32.AND P1, PT, R0, R15, PT ;\n /*00f0*/ ISETP.LT.U32.OR P0, PT, R2.reuse, R5.reuse, !P1 ;\n /*0100*/ ISETP.GE.U32.AND P2, PT, R2, R5, PT ;\n /*0110*/ IMAD R7, R11, R8, -c[0x0][0x4] ;\n /*0120*/ IMAD R5, R9, R4, -c[0x0][0x0] ;\n /*0130*/ IADD3 R7, R7, R2, RZ ;\n /*0140*/ IMAD.IADD R6, R5, 0x1, R0 ;\n /*0150*/ IMAD R5, R8, 0x2, R7 ;\n /*0160*/ IMAD R4, R4, 0x2, R6 ;\n /*0170*/ @P0 BRA `(.L_x_1) ;\n /*0180*/ LOP3.LUT R8, R6, R7, RZ, 0xfc, !PT ;\n /*0190*/ BSSY B1, `(.L_x_2) ;\n /*01a0*/ MOV R12, RZ ;\n /*01b0*/ ISETP.GE.AND P0, PT, R8, RZ, PT ;\n /*01c0*/ @!P0 BRA `(.L_x_3) ;\n /*01d0*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*01e0*/ IMAD R12, R7, c[0x0][0x17c], R6 ;\n /*01f0*/ IMAD.WIDE R12, R12, R13, c[0x0][0x160] ;\n /*0200*/ LDG.E R12, [R12.64] ;\n.L_x_3:\n /*0210*/ BSYNC B1 ;\n.L_x_2:\n /*0220*/ IADD3 R8, R3.reuse, -c[0x0][0x4], R2 ;\n /*0230*/ IADD3 R13, R3, -c[0x0][0x0], R0 ;\n /*0240*/ IMAD R13, R8, 0x6, R13 ;\n /*0250*/ STS [R13.X4], R12 ;\n.L_x_1:\n /*0260*/ BSYNC B0 ;\n.L_x_0:\n /*0270*/ ISETP.GE.U32.OR P0, PT, R0.reuse, R3.reuse, !P2 ;\n /*0280*/ BSSY B0, `(.L_x_4) ;\n /*0290*/ ISETP.GE.U32.AND P3, PT, R0, R3, PT ;\n /*02a0*/ @P0 BRA `(.L_x_5) ;\n /*02b0*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x17c], PT ;\n /*02c0*/ BSSY B1, `(.L_x_6) ;\n /*02d0*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ;\n /*02e0*/ ISETP.LT.OR P0, PT, R7, RZ, P0 ;\n /*02f0*/ @P0 BRA `(.L_x_7) ;\n /*0300*/ MOV R13, 0x4 ;\n /*0310*/ IMAD R12, R7, c[0x0][0x17c], R4 ;\n /*0320*/ IMAD.WIDE R12, R12, R13, c[0x0][0x160] ;\n /*0330*/ LDG.E R12, [R12.64] ;\n.L_x_7:\n /*0340*/ BSYNC B1 ;\n.L_x_6:\n /*0350*/ IADD3 R8, R3.reuse, -c[0x0][0x4], R2 ;\n /*0360*/ IADD3 R13, R3, c[0x0][0x0], R0 ;\n /*0370*/ IMAD R13, R8, 0x6, R13 ;\n /*0380*/ STS [R13.X4], R12 ;\n.L_x_5:\n /*0390*/ BSYNC B0 ;\n.L_x_4:\n /*03a0*/ ISETP.GE.U32.OR P0, PT, R2.reuse, R3.reuse, !P1 ;\n /*03b0*/ BSSY B0, `(.L_x_8) ;\n /*03c0*/ ISETP.GE.U32.AND P4, PT, R2, R3, PT ;\n /*03d0*/ @P0 BRA `(.L_x_9) ;\n /*03e0*/ ISETP.GE.AND P0, PT, R5, c[0x0][0x17c], PT ;\n /*03f0*/ BSSY B1, `(.L_x_10) ;\n /*0400*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ;\n /*0410*/ ISETP.LT.OR P0, PT, R6, RZ, P0 ;\n /*0420*/ @P0 BRA `(.L_x_11) ;\n /*0430*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*0440*/ IMAD R12, R5, c[0x0][0x17c], R6 ;\n /*0450*/ IMAD.WIDE R12, R12, R13, c[0x0][0x160] ;\n /*0460*/ LDG.E R12, [R12.64] ;\n.L_x_11:\n /*0470*/ BSYNC B1 ;\n.L_x_10:\n /*0480*/ IADD3 R15, R15, R0, RZ ;\n /*0490*/ IADD3 R8, R3, c[0x0][0x4], R2 ;\n /*04a0*/ IMAD R15, R8, 0x6, R15 ;\n /*04b0*/ STS [R15.X4], R12 ;\n.L_x_9:\n /*04c0*/ BSYNC B0 ;\n.L_x_8:\n /*04d0*/ ISETP.GE.U32.OR P0, PT, R0, R3, P4 ;\n /*04e0*/ BSSY B0, `(.L_x_12) ;\n /*04f0*/ @P0 BRA `(.L_x_13) ;\n /*0500*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x17c], PT ;\n /*0510*/ BSSY B1, `(.L_x_14) ;\n /*0520*/ IMAD.MOV.U32 R12, RZ, RZ, RZ ;\n /*0530*/ ISETP.GE.OR P0, PT, R5, c[0x0][0x17c], P0 ;\n /*0540*/ @P0 BRA `(.L_x_15) ;\n /*0550*/ IMAD.MOV.U32 R13, RZ, RZ, 0x4 ;\n /*0560*/ IMAD R12, R5, c[0x0][0x17c], R4 ;\n /*0570*/ IMAD.WIDE R12, R12, R13, c[0x0][0x160] ;\n /*0580*/ LDG.E R12, [R12.64] ;\n.L_x_15:\n /*0590*/ BSYNC B1 ;\n.L_x_14:\n /*05a0*/ IADD3 R8, R3.reuse, c[0x0][0x4], R2 ;\n /*05b0*/ IADD3 R13, R3, c[0x0][0x0], R0 ;\n /*05c0*/ IMAD R13, R8, 0x6, R13 ;\n /*05d0*/ STS [R13.X4], R12 ;\n.L_x_13:\n /*05e0*/ BSYNC B0 ;\n.L_x_12:\n /*05f0*/ IMAD R8, R11, c[0x0][0x4], R2 ;\n /*0600*/ MOV R11, 0x4 ;\n /*0610*/ IMAD R9, R9, c[0x0][0x0], R0 ;\n /*0620*/ IMAD R8, R8, c[0x0][0x17c], R9 ;\n /*0630*/ IMAD.WIDE.U32 R10, R8, R11, c[0x0][0x160] ;\n /*0640*/ LDG.E R10, [R10.64] ;\n /*0650*/ IADD3 R13, R3.reuse, R0, RZ ;\n /*0660*/ IMAD.IADD R15, R3, 0x1, R2 ;\n /*0670*/ BSSY B0, `(.L_x_16) ;\n /*0680*/ IMAD R12, R15, 0x18, RZ ;\n /*0690*/ IMAD.SHL.U32 R17, R13, 0x4, RZ ;\n /*06a0*/ IADD3 R9, R12, R17, RZ ;\n /*06b0*/ STS [R9], R10 ;\n /*06c0*/ @!P2 BRA `(.L_x_17) ;\n /*06d0*/ ISETP.GE.AND P0, PT, R7, RZ, PT ;\n /*06e0*/ BSSY B1, `(.L_x_18) ;\n /*06f0*/ IMAD.MOV.U32 R10, RZ, RZ, RZ ;\n /*0700*/ @!P0 BRA `(.L_x_19) ;\n /*0710*/ MOV R11, 0x4 ;\n /*0720*/ IMAD R10, R7, c[0x0][0x17c], R0 ;\n /*0730*/ IMAD.WIDE.U32 R10, R10, R11, c[0x0][0x160] ;\n /*0740*/ LDG.E R10, [R10.64] ;\n.L_x_19:\n /*0750*/ BSYNC B1 ;\n.L_x_18:\n /*0760*/ IADD3 R14, R3, -c[0x0][0x4], R2 ;\n /*0770*/ IMAD R17, R14, 0x18, R17 ;\n /*0780*/ STS [R17], R10 ;\n.L_x_17:\n /*0790*/ BSYNC B0 ;\n.L_x_16:\n /*07a0*/ BSSY B0, `(.L_x_20) ;\n /*07b0*/ @!P1 BRA `(.L_x_21) ;\n /*07c0*/ ISETP.GE.AND P0, PT, R6, RZ, PT ;\n /*07d0*/ BSSY B1, `(.L_x_22) ;\n /*07e0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n /*07f0*/ @!P0 BRA `(.L_x_23) ;\n /*0800*/ MOV R7, 0x4 ;\n /*0810*/ IMAD R6, R15, c[0x0][0x17c], R6 ;\n /*0820*/ IMAD.WIDE.U32 R6, R6, R7, c[0x0][0x160] ;\n /*0830*/ LDG.E R7, [R6.64] ;\n.L_x_23:\n /*0840*/ BSYNC B1 ;\n.L_x_22:\n /*0850*/ IADD3 R3, R3, -c[0x0][0x0], R0 ;\n /*0860*/ IMAD R12, R3, 0x4, R12 ;\n /*0870*/ STS [R12], R7 ;\n.L_x_21:\n /*0880*/ BSYNC B0 ;\n.L_x_20:\n /*0890*/ BSSY B0, `(.L_x_24) ;\n /*08a0*/ @P3 BRA `(.L_x_25) ;\n /*08b0*/ ISETP.GE.AND P0, PT, R4, c[0x0][0x17c], PT ;\n /*08c0*/ BSSY B1, `(.L_x_26) ;\n /*08d0*/ MOV R6, RZ ;\n /*08e0*/ @P0 BRA `(.L_x_27) ;\n /*08f0*/ IMAD R6, R13, c[0x0][0x17c], R4 ;\n /*0900*/ IMAD.MOV.U32 R7, RZ, RZ, 0x4 ;\n /*0910*/ IMAD.WIDE.U32 R6, R6, R7, c[0x0][0x160] ;\n /*0920*/ LDG.E R6, [R6.64] ;\n.L_x_27:\n /*0930*/ BSYNC B1 ;\n.L_x_26:\n /*0940*/ MOV R4, c[0x0][0x0] ;\n /*0950*/ IMAD R3, R4, 0x4, R9 ;\n /*0960*/ STS [R3], R6 ;\n.L_x_25:\n /*0970*/ BSYNC B0 ;\n.L_x_24:\n /*0980*/ BSSY B0, `(.L_x_28) ;\n /*0990*/ @P4 BRA `(.L_x_29) ;\n /*09a0*/ ULDC UR4, c[0x0][0x17c] ;\n /*09b0*/ BSSY B1, `(.L_x_30) ;\n /*09c0*/ UIADD3 UR4, -UR4, URZ, URZ ;\n /*09d0*/ MOV R4, RZ ;\n /*09e0*/ ISETP.GT.AND P0, PT, R5, UR4, PT ;\n /*09f0*/ @P0 BRA `(.L_x_31) ;\n /*0a00*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ;\n /*0a10*/ IMAD R5, R5, c[0x0][0x17c], R0 ;\n /*0a20*/ IMAD.WIDE.U32 R4, R5, R4, c[0x0][0x160] ;\n /*0a30*/ LDG.E R4, [R4.64] ;\n.L_x_31:\n /*0a40*/ BSYNC B1 ;\n.L_x_30:\n /*0a50*/ MOV R6, c[0x0][0x4] ;\n /*0a60*/ IMAD R9, R6, 0x18, R9 ;\n /*0a70*/ STS [R9], R4 ;\n.L_x_29:\n /*0a80*/ BSYNC B0 ;\n.L_x_28:\n /*0a90*/ IMAD.MOV.U32 R3, RZ, RZ, c[0x0][0x178] ;\n /*0aa0*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0ab0*/ MOV R10, RZ ;\n /*0ac0*/ ISETP.GE.AND P0, PT, R3, 0x1, PT ;\n /*0ad0*/ @!P0 BRA `(.L_x_32) ;\n /*0ae0*/ IMAD.MOV.U32 R9, RZ, RZ, c[0x0][0x178] ;\n /*0af0*/ LEA R6, R0, 0x8, 0x2 ;\n /*0b00*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n /*0b10*/ MOV R10, RZ ;\n /*0b20*/ IADD3 R19, R9.reuse, -0x1, RZ ;\n /*0b30*/ LOP3.LUT R9, R9, 0x3, RZ, 0xc0, !PT ;\n /*0b40*/ IADD3 R3, -R9, c[0x0][0x178], RZ ;\n.L_x_36:\n /*0b50*/ ISETP.GE.U32.AND P1, PT, R19, 0x3, PT ;\n /*0b60*/ IMAD R21, R7.reuse, c[0x0][0x178], RZ ;\n /*0b70*/ IADD3 R20, R2, R7, RZ ;\n /*0b80*/ UMOV UR4, URZ ;\n /*0b90*/ IADD3 R7, R7, 0x1, RZ ;\n /*0ba0*/ ISETP.GE.AND P0, PT, R7, c[0x0][0x178], PT ;\n /*0bb0*/ @!P1 BRA `(.L_x_33) ;\n /*0bc0*/ IMAD.MOV.U32 R4, RZ, RZ, 0x4 ;\n /*0bd0*/ MOV R12, R3 ;\n /*0be0*/ IMAD R11, R20, 0x18, R6 ;\n /*0bf0*/ UMOV UR4, URZ ;\n /*0c00*/ IMAD.WIDE R4, R21, R4, c[0x0][0x168] ;\n.L_x_34:\n /*0c10*/ LDG.E R13, [R4.64] ;\n /*0c20*/ LDG.E R16, [R4.64+0x4] ;\n /*0c30*/ LDG.E R18, [R4.64+0x8] ;\n /*0c40*/ LDG.E R17, [R4.64+0xc] ;\n /*0c50*/ IADD3 R12, R12, -0x4, RZ ;\n /*0c60*/ UIADD3 UR4, UR4, 0x4, URZ ;\n /*0c70*/ LDS R14, [R11+-0x8] ;\n /*0c80*/ ISETP.NE.AND P1, PT, R12, RZ, PT ;\n /*0c90*/ LDS R15, [R11+-0x4] ;\n /*0ca0*/ IADD3 R4, P2, R4, 0x10, RZ ;\n /*0cb0*/ IMAD.X R5, RZ, RZ, R5, P2 ;\n /*0cc0*/ FFMA R13, R13, R14, R10 ;\n /*0cd0*/ LDS R10, [R11] ;\n /*0ce0*/ FFMA R13, R16, R15, R13 ;\n /*0cf0*/ LDS R14, [R11+0x4] ;\n /*0d00*/ IADD3 R11, R11, 0x10, RZ ;\n /*0d10*/ FFMA R10, R18, R10, R13 ;\n /*0d20*/ FFMA R10, R17, R14, R10 ;\n /*0d30*/ @P1 BRA `(.L_x_34) ;\n.L_x_33:\n /*0d40*/ ISETP.NE.AND P1, PT, R9, RZ, PT ;\n /*0d50*/ @!P1 BRA `(.L_x_35) ;\n /*0d60*/ IADD3 R4, R21, UR4, RZ ;\n /*0d70*/ MOV R5, 0x4 ;\n /*0d80*/ IMAD.WIDE R4, R4, R5, c[0x0][0x168] ;\n /*0d90*/ LDG.E R13, [R4.64] ;\n /*0da0*/ IADD3 R11, R0, UR4, RZ ;\n /*0db0*/ ISETP.NE.AND P1, PT, R9, 0x1, PT ;\n /*0dc0*/ IMAD R11, R20, 0x6, R11 ;\n /*0dd0*/ IMAD.SHL.U32 R15, R11, 0x4, RZ ;\n /*0de0*/ LDS R11, [R15] ;\n /*0df0*/ FFMA R10, R13, R11, R10 ;\n /*0e00*/ @!P1 BRA `(.L_x_35) ;\n /*0e10*/ ISETP.NE.AND P1, PT, R9, 0x2, PT ;\n /*0e20*/ LDG.E R11, [R4.64+0x4] ;\n /*0e30*/ LDS R12, [R15+0x4] ;\n /*0e40*/ @P1 LDG.E R13, [R4.64+0x8] ;\n /*0e50*/ @P1 LDS R14, [R15+0x8] ;\n /*0e60*/ FFMA R10, R11, R12, R10 ;\n /*0e70*/ @P1 FFMA R10, R13, R14, R10 ;\n.L_x_35:\n /*0e80*/ @!P0 BRA `(.L_x_36) ;\n.L_x_32:\n /*0e90*/ MOV R9, 0x4 ;\n /*0ea0*/ IMAD.WIDE R8, R8, R9, c[0x0][0x170] ;\n /*0eb0*/ STG.E [R8.64], R10 ;\n /*0ec0*/ EXIT ;\n.L_x_37:\n /*0ed0*/ BRA `(.L_x_37);\n /*0ee0*/ NOP;\n /*0ef0*/ NOP;\n /*0f00*/ NOP;\n /*0f10*/ NOP;\n /*0f20*/ NOP;\n /*0f30*/ NOP;\n /*0f40*/ NOP;\n /*0f50*/ NOP;\n /*0f60*/ NOP;\n /*0f70*/ NOP;\n.L_x_38:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z4convPfS_S_iii ; -- Begin function _Z4convPfS_S_iii\n\t.globl\t_Z4convPfS_S_iii\n\t.p2align\t8\n\t.type\t_Z4convPfS_S_iii,@function\n_Z4convPfS_S_iii: ; @_Z4convPfS_S_iii\n; %bb.0:\n\ts_clause 0x1\n\ts_load_b32 s2, s[0:1], 0x34\n\ts_load_b256 s[16:23], s[0:1], 0x0\n\tv_and_b32_e32 v1, 0x3ff, v0\n\tv_bfe_u32 v0, v0, 10, 10\n\ts_add_i32 s1, s15, -1\n\ts_add_i32 s0, s14, -1\n\ts_waitcnt lgkmcnt(0)\n\ts_lshr_b32 s5, s2, 16\n\ts_lshr_b32 s3, s22, 31\n\ts_and_b32 s6, s2, 0xffff\n\ts_add_i32 s2, s22, s3\n\tv_mad_u64_u32 v[6:7], null, s1, s5, v[0:1]\n\ts_ashr_i32 s7, s2, 1\n\tv_mad_u64_u32 v[4:5], null, s0, s6, v[1:2]\n\ts_sub_i32 s8, s6, s7\n\ts_sub_i32 s1, s5, s7\n\tv_cmp_le_u32_e32 vcc_lo, s8, v1\n\tv_cmp_le_u32_e64 s0, s1, v0\n\tv_cmp_gt_u32_e64 s2, s8, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, vcc_lo, s0\n\ts_and_saveexec_b32 s3, s0\n\ts_cbranch_execz .LBB0_4\n; %bb.1:\n\tv_or_b32_e32 v2, v6, v4\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_cmp_lt_i32_e64 s0, -1, v2\n\tv_mov_b32_e32 v2, 0\n\ts_and_saveexec_b32 s4, s0\n\ts_cbranch_execz .LBB0_3\n; %bb.2:\n\tv_mad_u64_u32 v[2:3], null, v6, s23, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v3, 31, v2\n\tv_lshlrev_b64 v[2:3], 2, v[2:3]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v2, s0, s16, v2\n\tv_add_co_ci_u32_e64 v3, s0, s17, v3, s0\n\tglobal_load_b32 v2, v[2:3], off\n.LBB0_3:\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_add_nc_u32_e32 v3, s7, v0\n\tv_add_nc_u32_e32 v5, s7, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_subrev_nc_u32_e32 v3, s5, v3\n\tv_subrev_nc_u32_e32 v5, s6, v5\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v3, v3, 24\n\tv_lshl_add_u32 v3, v5, 2, v3\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v3, v2\n.LBB0_4:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_cmp_le_u32_e64 s1, s1, v0\n\tv_cmp_gt_u32_e64 s0, s7, v1\n\tv_lshl_add_u32 v5, s6, 1, v4\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s0, s0, s1\n\ts_and_saveexec_b32 s4, s0\n\ts_cbranch_execz .LBB0_8\n; %bb.5:\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_2)\n\tv_cmp_gt_i32_e64 s0, s23, v5\n\tv_cmp_lt_i32_e64 s3, -1, v6\n\tv_mov_b32_e32 v2, 0\n\ts_and_b32 s0, s0, s3\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s3, s0\n\ts_cbranch_execz .LBB0_7\n; %bb.6:\n\tv_mad_u64_u32 v[2:3], null, v6, s23, v[5:6]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v3, 31, v2\n\tv_lshlrev_b64 v[2:3], 2, v[2:3]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v2, s0, s16, v2\n\tv_add_co_ci_u32_e64 v3, s0, s17, v3, s0\n\tglobal_load_b32 v2, v[2:3], off\n.LBB0_7:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_add_nc_u32_e32 v3, s7, v0\n\tv_add3_u32 v7, s6, s7, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_subrev_nc_u32_e32 v3, s5, v3\n\tv_mul_lo_u32 v3, v3, 24\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshl_add_u32 v3, v7, 2, v3\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v3, v2\n.LBB0_8:\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_cmp_le_u32_e64 s3, s7, v0\n\tv_lshl_add_u32 v8, s5, 1, v6\n\tv_cmp_gt_u32_e64 s0, s7, v0\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_or_b32 s2, s3, s2\n\ts_xor_b32 s2, s2, -1\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s9, s2\n\ts_cbranch_execz .LBB0_12\n; %bb.9:\n\tv_cmp_lt_i32_e64 s2, -1, v4\n\tv_cmp_gt_i32_e64 s4, s23, v8\n\tv_mov_b32_e32 v2, 0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s2, s2, s4\n\ts_and_saveexec_b32 s4, s2\n\ts_cbranch_execz .LBB0_11\n; %bb.10:\n\tv_mad_u64_u32 v[2:3], null, v8, s23, v[4:5]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v3, 31, v2\n\tv_lshlrev_b64 v[2:3], 2, v[2:3]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v2, s2, s16, v2\n\tv_add_co_ci_u32_e64 v3, s2, s17, v3, s2\n\tglobal_load_b32 v2, v[2:3], off\n.LBB0_11:\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_add3_u32 v3, s5, s7, v0\n\tv_add_nc_u32_e32 v7, s8, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v3, v3, 24\n\tv_lshl_add_u32 v3, v7, 2, v3\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v3, v2\n.LBB0_12:\n\ts_or_b32 exec_lo, exec_lo, s9\n\tv_cmp_gt_u32_e64 s2, s7, v1\n\ts_xor_b32 s3, s3, -1\n ; implicit-def: $vgpr10\n ; implicit-def: $vgpr9\n\ts_delay_alu instid0(VALU_DEP_1) | instid1(SALU_CYCLE_1)\n\ts_and_b32 s3, s2, s3\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)\n\ts_and_saveexec_b32 s4, s3\n\ts_xor_b32 s4, exec_lo, s4\n\ts_cbranch_execz .LBB0_16\n; %bb.13:\n\tv_max_i32_e32 v2, v5, v8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_cmp_gt_i32_e64 s3, s23, v2\n\tv_mov_b32_e32 v2, 0\n\ts_and_saveexec_b32 s8, s3\n\ts_cbranch_execz .LBB0_15\n; %bb.14:\n\tv_mad_u64_u32 v[2:3], null, v8, s23, v[5:6]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v3, 31, v2\n\tv_lshlrev_b64 v[2:3], 2, v[2:3]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_add_co_u32 v2, s3, s16, v2\n\tv_add_co_ci_u32_e64 v3, s3, s17, v3, s3\n\tglobal_load_b32 v2, v[2:3], off\n.LBB0_15:\n\ts_or_b32 exec_lo, exec_lo, s8\n\tv_add_nc_u32_e32 v10, s7, v0\n\tv_add_nc_u32_e32 v9, s7, v1\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_nc_u32_e32 v3, s5, v10\n\tv_add_nc_u32_e32 v7, s6, v9\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v3, v3, 24\n\tv_lshl_add_u32 v3, v7, 2, v3\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v3, v2\n.LBB0_16:\n\ts_and_not1_saveexec_b32 s3, s4\n; %bb.17:\n\tv_add_nc_u32_e32 v10, s7, v0\n\tv_add_nc_u32_e32 v9, s7, v1\n; %bb.18:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_mad_u64_u32 v[2:3], null, s15, s5, v[0:1]\n\ts_mul_i32 s14, s14, s6\n\tv_mov_b32_e32 v3, 0\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v2, v2, s23\n\tv_add3_u32 v2, s14, v1, v2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[11:12], 2, v[2:3]\n\tv_add_co_u32 v11, s3, s16, v11\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v12, s3, s17, v12, s3\n\tglobal_load_b32 v12, v[11:12], off\n\tv_mul_lo_u32 v11, v10, 24\n\tv_lshl_add_u32 v7, v9, 2, v11\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v7, v12\n\ts_and_saveexec_b32 s3, s1\n\ts_cbranch_execz .LBB0_22\n; %bb.19:\n\ts_mov_b32 s4, exec_lo\n\tv_cmpx_lt_i32_e32 -1, v6\n\ts_cbranch_execz .LBB0_21\n; %bb.20:\n\tv_mad_u64_u32 v[12:13], null, v6, s23, v[1:2]\n\tv_mov_b32_e32 v13, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[12:13], 2, v[12:13]\n\tv_add_co_u32 v12, s1, s16, v12\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v13, s1, s17, v13, s1\n\tglobal_load_b32 v3, v[12:13], off\n.LBB0_21:\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_subrev_nc_u32_e32 v6, s5, v10\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_lo_u32 v6, v6, 24\n\tv_lshl_add_u32 v6, v9, 2, v6\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v6, v3\n.LBB0_22:\n\ts_or_b32 exec_lo, exec_lo, s3\n\ts_and_saveexec_b32 s1, vcc_lo\n\ts_cbranch_execz .LBB0_26\n; %bb.23:\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s3, exec_lo\n\tv_cmpx_lt_i32_e32 -1, v4\n\ts_cbranch_execz .LBB0_25\n; %bb.24:\n\tv_mad_u64_u32 v[12:13], null, v10, s23, v[4:5]\n\tv_mov_b32_e32 v13, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], 2, v[12:13]\n\tv_add_co_u32 v3, vcc_lo, s16, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo\n\tglobal_load_b32 v3, v[3:4], off\n.LBB0_25:\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_subrev_nc_u32_e32 v4, s6, v9\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_lshl_add_u32 v4, v4, 2, v11\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v4, v3\n.LBB0_26:\n\ts_or_b32 exec_lo, exec_lo, s1\n\ts_and_saveexec_b32 s1, s2\n\ts_cbranch_execz .LBB0_30\n; %bb.27:\n\tv_mov_b32_e32 v3, 0\n\ts_mov_b32 s2, exec_lo\n\tv_cmpx_gt_i32_e64 s23, v5\n\ts_cbranch_execz .LBB0_29\n; %bb.28:\n\tv_mad_u64_u32 v[3:4], null, v9, s23, v[5:6]\n\tv_mov_b32_e32 v4, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], 2, v[3:4]\n\tv_add_co_u32 v3, vcc_lo, s16, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo\n\tglobal_load_b32 v3, v[3:4], off\n.LBB0_29:\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_lshl_add_u32 v4, s6, 2, v7\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v4, v3\n.LBB0_30:\n\ts_or_b32 exec_lo, exec_lo, s1\n\ts_and_saveexec_b32 s1, s0\n\ts_cbranch_execz .LBB0_34\n; %bb.31:\n\ts_sub_i32 s0, 0, s23\n\tv_mov_b32_e32 v3, 0\n\tv_cmp_ge_i32_e32 vcc_lo, s0, v8\n\ts_and_saveexec_b32 s0, vcc_lo\n\ts_cbranch_execz .LBB0_33\n; %bb.32:\n\tv_mad_u64_u32 v[3:4], null, v8, s23, v[1:2]\n\tv_mov_b32_e32 v4, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[3:4], 2, v[3:4]\n\tv_add_co_u32 v3, vcc_lo, s16, v3\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s17, v4, vcc_lo\n\tglobal_load_b32 v3, v[3:4], off\n.LBB0_33:\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_mad_u64_u32 v[4:5], null, s5, 24, v[7:8]\n\ts_waitcnt vmcnt(0)\n\tds_store_b32 v4, v3\n.LBB0_34:\n\ts_or_b32 exec_lo, exec_lo, s1\n\ts_cmp_lt_i32 s22, 1\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_cbranch_scc1 .LBB0_44\n; %bb.35:\n\tv_lshlrev_b32_e32 v1, 2, v1\n\ts_and_b32 s4, s22, 7\n\ts_cmp_gt_u32 s22, 7\n\ts_mov_b32 s1, 0\n\ts_cselect_b32 s5, -1, 0\n\ts_and_b32 s6, s22, 0x7ffffff8\n\ts_cmp_lg_u32 s4, 0\n\tv_mad_u32_u24 v1, v0, 24, v1\n\tv_mov_b32_e32 v0, 0\n\ts_cselect_b32 s7, -1, 0\n\ts_add_u32 s8, s18, 28\n\ts_addc_u32 s9, s19, 0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s10, s1\n\ts_branch .LBB0_37\n.LBB0_36: ; in Loop: Header=BB0_37 Depth=1\n\tv_add_nc_u32_e32 v1, 24, v1\n\ts_add_i32 s10, s10, 1\n\ts_add_i32 s0, s0, s22\n\ts_cmp_eq_u32 s10, s22\n\ts_cbranch_scc1 .LBB0_45\n.LBB0_37: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_39 Depth 2\n ; Child Loop BB0_43 Depth 2\n\ts_and_not1_b32 vcc_lo, exec_lo, s5\n\ts_cbranch_vccnz .LBB0_41\n; %bb.38: ; in Loop: Header=BB0_37 Depth=1\n\ts_lshl_b64 s[2:3], s[0:1], 2\n\tv_mov_b32_e32 v3, v1\n\ts_add_u32 s2, s8, s2\n\ts_addc_u32 s3, s9, s3\n\ts_mov_b32 s11, 0\n\t.p2align\t6\n.LBB0_39: ; Parent Loop BB0_37 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_add_u32 s12, s2, 0xffffffe4\n\ts_addc_u32 s13, s3, -1\n\tds_load_2addr_b32 v[4:5], v3 offset1:1\n\ts_load_b256 s[24:31], s[12:13], 0x0\n\tds_load_2addr_b32 v[6:7], v3 offset0:2 offset1:3\n\tds_load_2addr_b32 v[8:9], v3 offset0:4 offset1:5\n\tds_load_2addr_b32 v[10:11], v3 offset0:6 offset1:7\n\ts_add_i32 s11, s11, 8\n\ts_add_u32 s2, s2, 32\n\ts_addc_u32 s3, s3, 0\n\ts_cmp_eq_u32 s6, s11\n\ts_waitcnt lgkmcnt(0)\n\tv_dual_fmac_f32 v0, s24, v4 :: v_dual_add_nc_u32 v3, 32, v3\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v0, s25, v5\n\tv_fmac_f32_e32 v0, s26, v6\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v0, s27, v7\n\tv_fmac_f32_e32 v0, s28, v8\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v0, s29, v9\n\tv_fmac_f32_e32 v0, s30, v10\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_fmac_f32_e32 v0, s31, v11\n\ts_cbranch_scc0 .LBB0_39\n; %bb.40: ; in Loop: Header=BB0_37 Depth=1\n\ts_and_not1_b32 vcc_lo, exec_lo, s7\n\ts_cbranch_vccz .LBB0_42\n\ts_branch .LBB0_36\n.LBB0_41: ; in Loop: Header=BB0_37 Depth=1\n\ts_mov_b32 s11, 0\n\ts_and_not1_b32 vcc_lo, exec_lo, s7\n\ts_cbranch_vccnz .LBB0_36\n.LBB0_42: ; in Loop: Header=BB0_37 Depth=1\n\ts_add_i32 s2, s11, s0\n\ts_mov_b32 s3, s1\n\ts_mov_b32 s12, s4\n\ts_lshl_b64 s[2:3], s[2:3], 2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_add_u32 s2, s18, s2\n\ts_addc_u32 s3, s19, s3\n\ts_lshl_b32 s11, s11, 2\n.LBB0_43: ; Parent Loop BB0_37 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\tv_add_nc_u32_e32 v3, s11, v1\n\ts_load_b32 s13, s[2:3], 0x0\n\ts_add_u32 s2, s2, 4\n\ts_addc_u32 s3, s3, 0\n\ts_add_i32 s12, s12, -1\n\tds_load_b32 v3, v3\n\ts_add_i32 s11, s11, 4\n\ts_cmp_lg_u32 s12, 0\n\ts_waitcnt lgkmcnt(0)\n\tv_fmac_f32_e32 v0, s13, v3\n\ts_cbranch_scc1 .LBB0_43\n\ts_branch .LBB0_36\n.LBB0_44:\n\tv_mov_b32_e32 v0, 0\n.LBB0_45:\n\tv_ashrrev_i32_e32 v3, 31, v2\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[1:2], 2, v[2:3]\n\tv_add_co_u32 v1, vcc_lo, s20, v1\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v2, vcc_lo, s21, v2, vcc_lo\n\tglobal_store_b32 v[1:2], v0, off\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z4convPfS_S_iii\n\t\t.amdhsa_group_segment_fixed_size 144\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 296\n\t\t.amdhsa_user_sgpr_count 14\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 1\n\t\t.amdhsa_next_free_vgpr 14\n\t\t.amdhsa_next_free_sgpr 32\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z4convPfS_S_iii, .Lfunc_end0-_Z4convPfS_S_iii\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 1816\n; NumSgprs: 34\n; NumVgprs: 14\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 144 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 1\n; NumSGPRsForWavesPerEU: 34\n; NumVGPRsForWavesPerEU: 14\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 14\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 1\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .offset: 24\n .size: 4\n .value_kind: by_value\n - .offset: 28\n .size: 4\n .value_kind: by_value\n - .offset: 32\n .size: 4\n .value_kind: by_value\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 44\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 48\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 52\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 54\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 56\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 58\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 60\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 62\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 96\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 104\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 144\n .kernarg_segment_align: 8\n .kernarg_segment_size: 296\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z4convPfS_S_iii\n .private_segment_fixed_size: 0\n .sgpr_count: 34\n .sgpr_spill_count: 0\n .symbol: _Z4convPfS_S_iii.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 14\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":97,"cells":{"id":{"kind":"string","value":"3174e8d267d8c6a6317486156725edb44ab4c3cf_O1"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z11nbodyKernelP8Particlefi --------------------------\n .section .text._Z11nbodyKernelP8Particlefi,\"ax\",@progbits\n .sectionflags @\"SHF_BARRIERS=1\"\n .sectioninfo @\"SHI_REGISTERS=32\"\n .align 128\n\n\n\n\n .global _Z11nbodyKernelP8Particlefi\n .type _Z11nbodyKernelP8Particlefi,@function\n .size _Z11nbodyKernelP8Particlefi,(.L_x_19 - _Z11nbodyKernelP8Particlefi)\n .other _Z11nbodyKernelP8Particlefi,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z11nbodyKernelP8Particlefi:\n.text._Z11nbodyKernelP8Particlefi:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ S2R R25, SR_CTAID.X ;\n /*0020*/ MOV R2, 0x20 ;\n /*0030*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0040*/ BSSY B0, `(.L_x_0) ;\n /*0050*/ S2R R12, SR_TID.X ;\n /*0060*/ IMAD R25, R25, c[0x0][0x0], R12 ;\n /*0070*/ SHF.L.U32 R12, R12, 0x5, RZ ;\n /*0080*/ IMAD.WIDE R2, R25.reuse, R2, c[0x0][0x160] ;\n /*0090*/ ISETP.GE.AND P0, PT, R25, c[0x0][0x16c], PT ;\n /*00a0*/ @P0 BRA `(.L_x_1) ;\n /*00b0*/ LDG.E.128 R4, [R2.64] ;\n /*00c0*/ LDG.E.128 R8, [R2.64+0x10] ;\n /*00d0*/ STS.128 [R12], R4 ;\n /*00e0*/ STS.128 [R12+0x10], R8 ;\n.L_x_1:\n /*00f0*/ BSYNC B0 ;\n.L_x_0:\n /*0100*/ BAR.SYNC.DEFER_BLOCKING 0x0 ;\n /*0110*/ @P0 EXIT ;\n /*0120*/ LDS.128 R8, [R12] ;\n /*0130*/ ISETP.GE.AND P0, PT, R25, 0x1, PT ;\n /*0140*/ BSSY B0, `(.L_x_2) ;\n /*0150*/ MOV R0, RZ ;\n /*0160*/ LDS.128 R4, [R12+0x10] ;\n /*0170*/ MOV R23, RZ ;\n /*0180*/ CS2R R20, SRZ ;\n /*0190*/ @!P0 BRA `(.L_x_3) ;\n /*01a0*/ IADD3 R0, R25.reuse, -0x1, RZ ;\n /*01b0*/ BSSY B1, `(.L_x_4) ;\n /*01c0*/ LOP3.LUT R22, R25, 0x3, RZ, 0xc0, !PT ;\n /*01d0*/ CS2R R20, SRZ ;\n /*01e0*/ ISETP.GE.U32.AND P0, PT, R0, 0x3, PT ;\n /*01f0*/ MOV R0, RZ ;\n /*0200*/ MOV R23, RZ ;\n /*0210*/ @!P0 BRA `(.L_x_5) ;\n /*0220*/ IADD3 R24, R25, -R22, RZ ;\n /*0230*/ MOV R21, RZ ;\n /*0240*/ MOV R0, RZ ;\n.L_x_6:\n /*0250*/ SHF.L.U32 R26, R0, 0x5, RZ ;\n /*0260*/ IADD3 R24, R24, -0x4, RZ ;\n /*0270*/ IADD3 R0, R0, 0x4, RZ ;\n /*0280*/ LDS.128 R12, [R26] ;\n /*0290*/ FADD R13, -R9, R13 ;\n /*02a0*/ FADD R12, -R8, R12 ;\n /*02b0*/ FADD R14, -R10, R14 ;\n /*02c0*/ FMUL R17, R13, R13 ;\n /*02d0*/ FFMA R17, R12, R12, R17 ;\n /*02e0*/ FFMA R17, R14, R14, R17 ;\n /*02f0*/ FADD R27, R17, 1.00000001335143196e-10 ;\n /*0300*/ LDS.128 R16, [R26+0x20] ;\n /*0310*/ FSETP.GEU.AND P0, PT, |R27|, 1.175494350822287508e-38, PT ;\n /*0320*/ @!P0 FMUL R27, R27, 16777216 ;\n /*0330*/ MUFU.RSQ R28, R27 ;\n /*0340*/ @!P0 FMUL R28, R28, 4096 ;\n /*0350*/ FMUL R29, R28, R28 ;\n /*0360*/ FADD R17, -R9, R17 ;\n /*0370*/ FADD R16, -R8, R16 ;\n /*0380*/ FADD R18, -R10, R18 ;\n /*0390*/ FMUL R28, R28, R29 ;\n /*03a0*/ FMUL R15, R15, R28 ;\n /*03b0*/ FFMA R20, R13, R15, R20 ;\n /*03c0*/ FMUL R13, R17, R17 ;\n /*03d0*/ FFMA R21, R12, R15.reuse, R21 ;\n /*03e0*/ FFMA R23, R14, R15, R23 ;\n /*03f0*/ FFMA R13, R16, R16, R13 ;\n /*0400*/ FFMA R13, R18, R18, R13 ;\n /*0410*/ FADD R27, R13, 1.00000001335143196e-10 ;\n /*0420*/ LDS.128 R12, [R26+0x40] ;\n /*0430*/ FSETP.GEU.AND P0, PT, |R27|, 1.175494350822287508e-38, PT ;\n /*0440*/ @!P0 FMUL R27, R27, 16777216 ;\n /*0450*/ MUFU.RSQ R28, R27 ;\n /*0460*/ @!P0 FMUL R28, R28, 4096 ;\n /*0470*/ FMUL R29, R28, R28 ;\n /*0480*/ FADD R13, -R9, R13 ;\n /*0490*/ FADD R12, -R8, R12 ;\n /*04a0*/ FADD R14, -R10, R14 ;\n /*04b0*/ FMUL R28, R28, R29 ;\n /*04c0*/ FMUL R19, R19, R28 ;\n /*04d0*/ FFMA R20, R17, R19, R20 ;\n /*04e0*/ FMUL R17, R13, R13 ;\n /*04f0*/ FFMA R21, R16, R19.reuse, R21 ;\n /*0500*/ FFMA R23, R18, R19, R23 ;\n /*0510*/ FFMA R17, R12, R12, R17 ;\n /*0520*/ FFMA R17, R14, R14, R17 ;\n /*0530*/ FADD R27, R17, 1.00000001335143196e-10 ;\n /*0540*/ LDS.128 R16, [R26+0x60] ;\n /*0550*/ FSETP.GEU.AND P0, PT, |R27|, 1.175494350822287508e-38, PT ;\n /*0560*/ @!P0 FMUL R27, R27, 16777216 ;\n /*0570*/ MUFU.RSQ R28, R27 ;\n /*0580*/ @!P0 FMUL R28, R28, 4096 ;\n /*0590*/ FMUL R29, R28, R28 ;\n /*05a0*/ FADD R17, -R9, R17 ;\n /*05b0*/ FADD R16, -R8, R16 ;\n /*05c0*/ FADD R18, -R10, R18 ;\n /*05d0*/ FMUL R28, R28, R29 ;\n /*05e0*/ FMUL R15, R15, R28 ;\n /*05f0*/ FFMA R20, R13, R15, R20 ;\n /*0600*/ FMUL R13, R17, R17 ;\n /*0610*/ FFMA R21, R12, R15.reuse, R21 ;\n /*0620*/ FFMA R23, R14, R15, R23 ;\n /*0630*/ FFMA R13, R16, R16, R13 ;\n /*0640*/ FFMA R13, R18, R18, R13 ;\n /*0650*/ FADD R13, R13, 1.00000001335143196e-10 ;\n /*0660*/ FSETP.GEU.AND P0, PT, |R13|, 1.175494350822287508e-38, PT ;\n /*0670*/ @!P0 FMUL R13, R13, 16777216 ;\n /*0680*/ MUFU.RSQ R12, R13 ;\n /*0690*/ @!P0 FMUL R12, R12, 4096 ;\n /*06a0*/ ISETP.NE.AND P0, PT, R24, RZ, PT ;\n /*06b0*/ FMUL R15, R12, R12 ;\n /*06c0*/ FMUL R12, R12, R15 ;\n /*06d0*/ FMUL R12, R19, R12 ;\n /*06e0*/ FFMA R21, R16, R12.reuse, R21 ;\n /*06f0*/ FFMA R20, R17, R12.reuse, R20 ;\n /*0700*/ FFMA R23, R18, R12, R23 ;\n /*0710*/ @P0 BRA `(.L_x_6) ;\n.L_x_5:\n /*0720*/ BSYNC B1 ;\n.L_x_4:\n /*0730*/ ISETP.NE.AND P0, PT, R22, RZ, PT ;\n /*0740*/ @!P0 BRA `(.L_x_3) ;\n /*0750*/ SHF.L.U32 R16, R0, 0x5, RZ ;\n.L_x_7:\n /*0760*/ LDS.128 R12, [R16] ;\n /*0770*/ IADD3 R22, R22, -0x1, RZ ;\n /*0780*/ IADD3 R0, R0, 0x1, RZ ;\n /*0790*/ IADD3 R16, R16, 0x20, RZ ;\n /*07a0*/ FADD R13, -R9, R13 ;\n /*07b0*/ FADD R12, -R8, R12 ;\n /*07c0*/ FADD R14, -R10, R14 ;\n /*07d0*/ FMUL R17, R13, R13 ;\n /*07e0*/ FFMA R17, R12, R12, R17 ;\n /*07f0*/ FFMA R17, R14, R14, R17 ;\n /*0800*/ FADD R17, R17, 1.00000001335143196e-10 ;\n /*0810*/ FSETP.GEU.AND P0, PT, |R17|, 1.175494350822287508e-38, PT ;\n /*0820*/ @!P0 FMUL R17, R17, 16777216 ;\n /*0830*/ MUFU.RSQ R18, R17 ;\n /*0840*/ @!P0 FMUL R18, R18, 4096 ;\n /*0850*/ ISETP.NE.AND P0, PT, R22, RZ, PT ;\n /*0860*/ FMUL R19, R18, R18 ;\n /*0870*/ FMUL R18, R18, R19 ;\n /*0880*/ FMUL R15, R15, R18 ;\n /*0890*/ FFMA R21, R12, R15.reuse, R21 ;\n /*08a0*/ FFMA R20, R13, R15.reuse, R20 ;\n /*08b0*/ FFMA R23, R14, R15, R23 ;\n /*08c0*/ @P0 BRA `(.L_x_7) ;\n.L_x_3:\n /*08d0*/ BSYNC B0 ;\n.L_x_2:\n /*08e0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x16c], PT ;\n /*08f0*/ BSSY B0, `(.L_x_8) ;\n /*0900*/ @P0 BRA `(.L_x_9) ;\n /*0910*/ ISETP.NE.AND P0, PT, R25, R0, PT ;\n /*0920*/ BSSY B1, `(.L_x_10) ;\n /*0930*/ @!P0 BRA `(.L_x_11) ;\n /*0940*/ SHF.L.U32 R12, R0, 0x5, RZ ;\n /*0950*/ LDS.128 R12, [R12] ;\n /*0960*/ FADD R13, -R9, R13 ;\n /*0970*/ FADD R16, -R8, R12 ;\n /*0980*/ FADD R14, -R10, R14 ;\n /*0990*/ FMUL R17, R13, R13 ;\n /*09a0*/ FFMA R17, R16, R16, R17 ;\n /*09b0*/ FFMA R17, R14, R14, R17 ;\n /*09c0*/ FADD R17, R17, 1.00000001335143196e-10 ;\n /*09d0*/ FSETP.GEU.AND P0, PT, |R17|, 1.175494350822287508e-38, PT ;\n /*09e0*/ @!P0 FMUL R17, R17, 16777216 ;\n /*09f0*/ MUFU.RSQ R18, R17 ;\n /*0a00*/ @!P0 FMUL R18, R18, 4096 ;\n /*0a10*/ FMUL R19, R18, R18 ;\n /*0a20*/ FMUL R18, R18, R19 ;\n /*0a30*/ FMUL R15, R15, R18 ;\n /*0a40*/ FFMA R21, R16, R15.reuse, R21 ;\n /*0a50*/ FFMA R20, R13, R15.reuse, R20 ;\n /*0a60*/ FFMA R23, R14, R15, R23 ;\n.L_x_11:\n /*0a70*/ BSYNC B1 ;\n.L_x_10:\n /*0a80*/ IADD3 R0, R0, 0x1, RZ ;\n.L_x_9:\n /*0a90*/ BSYNC B0 ;\n.L_x_8:\n /*0aa0*/ ISETP.GE.AND P0, PT, R0, c[0x0][0x16c], PT ;\n /*0ab0*/ BSSY B0, `(.L_x_12) ;\n /*0ac0*/ @P0 BRA `(.L_x_13) ;\n /*0ad0*/ IADD3 R12, -R0, c[0x0][0x16c], RZ ;\n /*0ae0*/ BSSY B1, `(.L_x_14) ;\n /*0af0*/ MOV R22, R0 ;\n /*0b00*/ LOP3.LUT P0, R16, R12, 0x3, RZ, 0xc0, !PT ;\n /*0b10*/ @!P0 BRA `(.L_x_15) ;\n /*0b20*/ SHF.L.U32 R17, R0, 0x5, RZ ;\n /*0b30*/ MOV R22, R0 ;\n.L_x_16:\n /*0b40*/ LDS.128 R12, [R17] ;\n /*0b50*/ IADD3 R16, R16, -0x1, RZ ;\n /*0b60*/ IADD3 R22, R22, 0x1, RZ ;\n /*0b70*/ IADD3 R17, R17, 0x20, RZ ;\n /*0b80*/ FADD R13, -R9, R13 ;\n /*0b90*/ FADD R12, -R8, R12 ;\n /*0ba0*/ FADD R14, -R10, R14 ;\n /*0bb0*/ FMUL R19, R13, R13 ;\n /*0bc0*/ FFMA R19, R12, R12, R19 ;\n /*0bd0*/ FFMA R19, R14, R14, R19 ;\n /*0be0*/ FADD R19, R19, 1.00000001335143196e-10 ;\n /*0bf0*/ FSETP.GEU.AND P0, PT, |R19|, 1.175494350822287508e-38, PT ;\n /*0c00*/ @!P0 FMUL R19, R19, 16777216 ;\n /*0c10*/ MUFU.RSQ R18, R19 ;\n /*0c20*/ @!P0 FMUL R18, R18, 4096 ;\n /*0c30*/ ISETP.NE.AND P0, PT, R16, RZ, PT ;\n /*0c40*/ FMUL R25, R18, R18 ;\n /*0c50*/ FMUL R18, R18, R25 ;\n /*0c60*/ FMUL R15, R15, R18 ;\n /*0c70*/ FFMA R21, R12, R15.reuse, R21 ;\n /*0c80*/ FFMA R20, R13, R15.reuse, R20 ;\n /*0c90*/ FFMA R23, R14, R15, R23 ;\n /*0ca0*/ @P0 BRA `(.L_x_16) ;\n.L_x_15:\n /*0cb0*/ BSYNC B1 ;\n.L_x_14:\n /*0cc0*/ LOP3.LUT R0, RZ, R0, RZ, 0x33, !PT ;\n /*0cd0*/ IADD3 R0, R0, c[0x0][0x16c], RZ ;\n /*0ce0*/ ISETP.GE.U32.AND P0, PT, R0, 0x3, PT ;\n /*0cf0*/ @!P0 BRA `(.L_x_13) ;\n /*0d00*/ LEA R0, R22, 0x40, 0x5 ;\n.L_x_17:\n /*0d10*/ LDS.128 R16, [R0+-0x40] ;\n /*0d20*/ IADD3 R22, R22, 0x4, RZ ;\n /*0d30*/ FADD R17, -R9, R17 ;\n /*0d40*/ FADD R16, -R8, R16 ;\n /*0d50*/ FADD R18, -R10, R18 ;\n /*0d60*/ FMUL R13, R17, R17 ;\n /*0d70*/ FFMA R13, R16, R16, R13 ;\n /*0d80*/ FFMA R13, R18, R18, R13 ;\n /*0d90*/ FADD R24, R13, 1.00000001335143196e-10 ;\n /*0da0*/ LDS.128 R12, [R0+-0x20] ;\n /*0db0*/ FSETP.GEU.AND P0, PT, |R24|, 1.175494350822287508e-38, PT ;\n /*0dc0*/ @!P0 FMUL R24, R24, 16777216 ;\n /*0dd0*/ MUFU.RSQ R25, R24 ;\n /*0de0*/ @!P0 FMUL R25, R25, 4096 ;\n /*0df0*/ FMUL R26, R25, R25 ;\n /*0e00*/ FADD R13, -R9, R13 ;\n /*0e10*/ FADD R12, -R8, R12 ;\n /*0e20*/ FADD R14, -R10, R14 ;\n /*0e30*/ FMUL R26, R25, R26 ;\n /*0e40*/ FMUL R19, R19, R26 ;\n /*0e50*/ FFMA R20, R17, R19, R20 ;\n /*0e60*/ FMUL R17, R13, R13 ;\n /*0e70*/ FFMA R21, R16, R19.reuse, R21 ;\n /*0e80*/ FFMA R23, R18, R19, R23 ;\n /*0e90*/ FFMA R17, R12, R12, R17 ;\n /*0ea0*/ FFMA R17, R14, R14, R17 ;\n /*0eb0*/ FADD R24, R17, 1.00000001335143196e-10 ;\n /*0ec0*/ LDS.128 R16, [R0] ;\n /*0ed0*/ FSETP.GEU.AND P0, PT, |R24|, 1.175494350822287508e-38, PT ;\n /*0ee0*/ @!P0 FMUL R24, R24, 16777216 ;\n /*0ef0*/ MUFU.RSQ R25, R24 ;\n /*0f00*/ @!P0 FMUL R25, R25, 4096 ;\n /*0f10*/ FMUL R26, R25, R25 ;\n /*0f20*/ FADD R17, -R9, R17 ;\n /*0f30*/ FADD R16, -R8, R16 ;\n /*0f40*/ FADD R18, -R10, R18 ;\n /*0f50*/ FMUL R26, R25, R26 ;\n /*0f60*/ FMUL R15, R15, R26 ;\n /*0f70*/ FFMA R20, R13, R15, R20 ;\n /*0f80*/ FMUL R13, R17, R17 ;\n /*0f90*/ FFMA R21, R12, R15.reuse, R21 ;\n /*0fa0*/ FFMA R23, R14, R15, R23 ;\n /*0fb0*/ FFMA R13, R16, R16, R13 ;\n /*0fc0*/ FFMA R13, R18, R18, R13 ;\n /*0fd0*/ FADD R24, R13, 1.00000001335143196e-10 ;\n /*0fe0*/ LDS.128 R12, [R0+0x20] ;\n /*0ff0*/ FSETP.GEU.AND P0, PT, |R24|, 1.175494350822287508e-38, PT ;\n /*1000*/ IADD3 R0, R0, 0x80, RZ ;\n /*1010*/ @!P0 FMUL R24, R24, 16777216 ;\n /*1020*/ MUFU.RSQ R25, R24 ;\n /*1030*/ @!P0 FMUL R25, R25, 4096 ;\n /*1040*/ FMUL R26, R25, R25 ;\n /*1050*/ FADD R13, -R9, R13 ;\n /*1060*/ FADD R12, -R8, R12 ;\n /*1070*/ FADD R14, -R10, R14 ;\n /*1080*/ FMUL R26, R25, R26 ;\n /*1090*/ FMUL R19, R19, R26 ;\n /*10a0*/ FFMA R20, R17, R19, R20 ;\n /*10b0*/ FMUL R17, R13, R13 ;\n /*10c0*/ FFMA R21, R16, R19.reuse, R21 ;\n /*10d0*/ FFMA R23, R18, R19, R23 ;\n /*10e0*/ FFMA R17, R12, R12, R17 ;\n /*10f0*/ FFMA R17, R14, R14, R17 ;\n /*1100*/ FADD R17, R17, 1.00000001335143196e-10 ;\n /*1110*/ FSETP.GEU.AND P0, PT, |R17|, 1.175494350822287508e-38, PT ;\n /*1120*/ @!P0 FMUL R17, R17, 16777216 ;\n /*1130*/ MUFU.RSQ R16, R17 ;\n /*1140*/ @!P0 FMUL R16, R16, 4096 ;\n /*1150*/ ISETP.GE.AND P0, PT, R22, c[0x0][0x16c], PT ;\n /*1160*/ FMUL R19, R16, R16 ;\n /*1170*/ FMUL R16, R16, R19 ;\n /*1180*/ FMUL R15, R15, R16 ;\n /*1190*/ FFMA R21, R12, R15.reuse, R21 ;\n /*11a0*/ FFMA R20, R13, R15.reuse, R20 ;\n /*11b0*/ FFMA R23, R14, R15, R23 ;\n /*11c0*/ @!P0 BRA `(.L_x_17) ;\n.L_x_13:\n /*11d0*/ BSYNC B0 ;\n.L_x_12:\n /*11e0*/ FFMA R4, R21, c[0x0][0x168], R4 ;\n /*11f0*/ FFMA R5, R20, c[0x0][0x168], R5 ;\n /*1200*/ FFMA R6, R23, c[0x0][0x168], R6 ;\n /*1210*/ FFMA R8, R4, c[0x0][0x168], R8 ;\n /*1220*/ FFMA R9, R5, c[0x0][0x168], R9 ;\n /*1230*/ FFMA R10, R6, c[0x0][0x168], R10 ;\n /*1240*/ STG.E.128 [R2.64+0x10], R4 ;\n /*1250*/ STG.E.128 [R2.64], R8 ;\n /*1260*/ EXIT ;\n.L_x_18:\n /*1270*/ BRA `(.L_x_18);\n /*1280*/ NOP;\n /*1290*/ NOP;\n /*12a0*/ NOP;\n /*12b0*/ NOP;\n /*12c0*/ NOP;\n /*12d0*/ NOP;\n /*12e0*/ NOP;\n /*12f0*/ NOP;\n.L_x_19:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z11nbodyKernelP8Particlefi ; -- Begin function _Z11nbodyKernelP8Particlefi\n\t.globl\t_Z11nbodyKernelP8Particlefi\n\t.p2align\t8\n\t.type\t_Z11nbodyKernelP8Particlefi,@function\n_Z11nbodyKernelP8Particlefi: ; @_Z11nbodyKernelP8Particlefi\n; %bb.0:\n\ts_clause 0x2\n\ts_load_b32 s2, s[0:1], 0x1c\n\ts_load_b32 s3, s[0:1], 0xc\n\ts_load_b64 s[4:5], s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s2, s2, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[8:9], null, s15, s2, v[0:1]\n\tv_cmp_gt_i32_e32 vcc_lo, s3, v8\n\tv_ashrrev_i32_e32 v9, 31, v8\n\ts_and_saveexec_b32 s6, vcc_lo\n\ts_cbranch_execz .LBB0_2\n; %bb.1:\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[1:2], 5, v[8:9]\n\tv_add_co_u32 v5, s2, s4, v1\n\ts_delay_alu instid0(VALU_DEP_1)\n\tv_add_co_ci_u32_e64 v6, s2, s5, v2, s2\n\ts_clause 0x1\n\tglobal_load_b128 v[1:4], v[5:6], off offset:16\n\tglobal_load_b128 v[10:13], v[5:6], off\n\tv_lshl_add_u32 v5, v0, 5, 0\n\ts_waitcnt vmcnt(1)\n\tds_store_b128 v5, v[1:4] offset:16\n\ts_waitcnt vmcnt(0)\n\tds_store_b128 v5, v[10:13]\n.LBB0_2:\n\ts_or_b32 exec_lo, exec_lo, s6\n\ts_waitcnt lgkmcnt(0)\n\ts_barrier\n\tbuffer_gl0_inv\n\ts_and_saveexec_b32 s2, vcc_lo\n\ts_cbranch_execz .LBB0_9\n; %bb.3:\n\tv_lshl_add_u32 v2, v0, 5, 0\n\tv_dual_mov_b32 v11, 0 :: v_dual_mov_b32 v12, 0\n\tv_mov_b32_e32 v10, 0\n\ts_cmp_lt_i32 s3, 1\n\tds_load_2addr_b32 v[4:5], v2 offset1:1\n\tds_load_2addr_b32 v[6:7], v2 offset0:2 offset1:3\n\tds_load_2addr_b32 v[0:1], v2 offset0:4 offset1:5\n\tds_load_2addr_b32 v[2:3], v2 offset0:6 offset1:7\n\ts_mov_b32 s2, 0\n\ts_cbranch_scc1 .LBB0_8\n; %bb.4:\n\tv_dual_mov_b32 v10, 0 :: v_dual_mov_b32 v13, v8\n\tv_dual_mov_b32 v12, 0 :: v_dual_mov_b32 v11, 0\n\ts_set_inst_prefetch_distance 0x1\n\ts_branch .LBB0_6\n\t.p2align\t6\n.LBB0_5: ; in Loop: Header=BB0_6 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s6\n\tv_add_nc_u32_e32 v13, -1, v13\n\ts_add_i32 s3, s3, -1\n\ts_add_i32 s2, s2, 32\n\ts_cmp_eq_u32 s3, 0\n\ts_cbranch_scc1 .LBB0_8\n.LBB0_6: ; =>This Inner Loop Header: Depth=1\n\ts_mov_b32 s6, exec_lo\n\tv_cmpx_ne_u32_e32 0, v13\n\ts_cbranch_execz .LBB0_5\n; %bb.7: ; in Loop: Header=BB0_6 Depth=1\n\tv_mov_b32_e32 v16, s2\n\tds_load_2addr_b32 v[14:15], v16 offset1:1\n\tds_load_2addr_b32 v[16:17], v16 offset0:2 offset1:3\n\ts_waitcnt lgkmcnt(1)\n\tv_dual_sub_f32 v15, v15, v5 :: v_dual_sub_f32 v14, v14, v4\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_f32_e32 v16, v16, v6\n\ts_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v18, v15, v15\n\tv_fmac_f32_e32 v18, v14, v14\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_fmac_f32_e32 v18, v16, v16\n\tv_add_f32_e32 v18, 0x2edbe6ff, v18\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_2)\n\tv_mul_f32_e32 v19, 0x4b800000, v18\n\tv_cmp_gt_f32_e32 vcc_lo, 0x800000, v18\n\tv_cndmask_b32_e32 v18, v18, v19, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_2) | instid1(VALU_DEP_1)\n\tv_rsq_f32_e32 v18, v18\n\ts_waitcnt_depctr 0xfff\n\tv_mul_f32_e32 v19, 0x45800000, v18\n\tv_cndmask_b32_e32 v18, v18, v19, vcc_lo\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v19, v18, v18\n\tv_mul_f32_e32 v18, v18, v19\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_mul_f32_e32 v17, v17, v18\n\tv_fmac_f32_e32 v12, v15, v17\n\tv_fmac_f32_e32 v10, v14, v17\n\tv_fmac_f32_e32 v11, v16, v17\n\ts_branch .LBB0_5\n.LBB0_8:\n\ts_set_inst_prefetch_distance 0x2\n\ts_load_b32 s0, s[0:1], 0x8\n\tv_lshlrev_b64 v[8:9], 5, v[8:9]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v8, vcc_lo, s4, v8\n\tv_add_co_ci_u32_e32 v9, vcc_lo, s5, v9, vcc_lo\n\ts_waitcnt lgkmcnt(0)\n\tv_fma_f32 v0, s0, v10, v0\n\tv_fmac_f32_e32 v1, s0, v12\n\tv_fma_f32 v2, s0, v11, v2\n\ts_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)\n\tv_fma_f32 v4, s0, v0, v4\n\tv_fmac_f32_e32 v5, s0, v1\n\ts_delay_alu instid0(VALU_DEP_3)\n\tv_fma_f32 v6, s0, v2, v6\n\ts_clause 0x1\n\tglobal_store_b128 v[8:9], v[4:7], off\n\tglobal_store_b128 v[8:9], v[0:3], off offset:16\n.LBB0_9:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z11nbodyKernelP8Particlefi\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 272\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 20\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z11nbodyKernelP8Particlefi, .Lfunc_end0-_Z11nbodyKernelP8Particlefi\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 576\n; NumSgprs: 18\n; NumVgprs: 20\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 2\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 20\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .offset: 8\n .size: 4\n .value_kind: by_value\n - .offset: 12\n .size: 4\n .value_kind: by_value\n - .offset: 16\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 20\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 24\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 28\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 30\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 32\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 34\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 36\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 38\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 56\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 64\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 80\n .size: 2\n .value_kind: hidden_grid_dims\n - .offset: 136\n .size: 4\n .value_kind: hidden_dynamic_lds_size\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 272\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z11nbodyKernelP8Particlefi\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z11nbodyKernelP8Particlefi.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 20\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":98,"cells":{"id":{"kind":"string","value":"be0c16235f897968f7cd857cdd5464a7bbf175f7_O2"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z19graphColoringKernelPiS_S_S_ --------------------------\n .section .text._Z19graphColoringKernelPiS_S_S_,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=14\"\n .align 128\n\n\n\n\n .global _Z19graphColoringKernelPiS_S_S_\n .type _Z19graphColoringKernelPiS_S_S_,@function\n .size _Z19graphColoringKernelPiS_S_S_,(.L_x_6 - _Z19graphColoringKernelPiS_S_S_)\n .other _Z19graphColoringKernelPiS_S_S_,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z19graphColoringKernelPiS_S_S_:\n.text._Z19graphColoringKernelPiS_S_S_:\n /*0000*/ IMAD.MOV.U32 R1, RZ, RZ, c[0x0][0x28] ;\n /*0010*/ S2R R0, SR_CTAID.X ;\n /*0020*/ S2R R3, SR_TID.X ;\n /*0030*/ IMAD R0, R0, c[0x0][0x0], R3 ;\n /*0040*/ ISETP.GT.AND P0, PT, R0, 0x3fff, PT ;\n /*0050*/ @P0 EXIT ;\n /*0060*/ IMAD.MOV.U32 R3, RZ, RZ, 0x4 ;\n /*0070*/ ULDC.64 UR4, c[0x0][0x118] ;\n /*0080*/ IMAD.WIDE R2, R0, R3, c[0x0][0x170] ;\n /*0090*/ LDG.E R6, [R2.64] ;\n /*00a0*/ BSSY B0, `(.L_x_0) ;\n /*00b0*/ SHF.R.S32.HI R11, RZ, 0x1f, R0 ;\n /*00c0*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n /*00d0*/ ISETP.GE.AND P0, PT, R6, 0x1, PT ;\n /*00e0*/ @!P0 BRA `(.L_x_1) ;\n /*00f0*/ LEA R2, P0, R0, c[0x0][0x178], 0x2 ;\n /*0100*/ LEA.HI.X R3, R0, c[0x0][0x17c], R11, 0x2, P0 ;\n /*0110*/ LDG.E R8, [R2.64] ;\n /*0120*/ IMAD.MOV.U32 R9, RZ, RZ, RZ ;\n /*0130*/ IMAD.MOV.U32 R7, RZ, RZ, RZ ;\n.L_x_4:\n /*0140*/ IMAD.IADD R2, R8, 0x1, R9 ;\n /*0150*/ IMAD.MOV.U32 R5, RZ, RZ, 0x4 ;\n /*0160*/ IMAD.WIDE R2, R2, R5, c[0x0][0x160] ;\n /*0170*/ LDG.E R2, [R2.64] ;\n /*0180*/ IMAD.WIDE R4, R2, R5, c[0x0][0x168] ;\n /*0190*/ LDG.E R4, [R4.64] ;\n /*01a0*/ IADD3 R9, R9, 0x1, RZ ;\n /*01b0*/ BSSY B1, `(.L_x_2) ;\n /*01c0*/ ISETP.GE.AND P2, PT, R9, R6, PT ;\n /*01d0*/ IMAD.IADD R10, R7.reuse, 0x1, -R4 ;\n /*01e0*/ IADD3 R7, R7, -0x1, RZ ;\n /*01f0*/ ISETP.NE.AND P0, PT, R10, RZ, PT ;\n.L_x_3:\n /*0200*/ PLOP3.LUT P1, PT, P0, PT, PT, 0x80, 0x0 ;\n /*0210*/ PLOP3.LUT P0, PT, PT, PT, PT, 0x80, 0x0 ;\n /*0220*/ IADD3 R7, R7, 0x1, RZ ;\n /*0230*/ @!P1 BRA `(.L_x_3) ;\n /*0240*/ BSYNC B1 ;\n.L_x_2:\n /*0250*/ @!P2 BRA `(.L_x_4) ;\n.L_x_1:\n /*0260*/ BSYNC B0 ;\n.L_x_0:\n /*0270*/ LEA R2, P0, R0, c[0x0][0x168], 0x2 ;\n /*0280*/ LEA.HI.X R3, R0, c[0x0][0x16c], R11, 0x2, P0 ;\n /*0290*/ STG.E [R2.64], R7 ;\n /*02a0*/ EXIT ;\n.L_x_5:\n /*02b0*/ BRA `(.L_x_5);\n /*02c0*/ NOP;\n /*02d0*/ NOP;\n /*02e0*/ NOP;\n /*02f0*/ NOP;\n /*0300*/ NOP;\n /*0310*/ NOP;\n /*0320*/ NOP;\n /*0330*/ NOP;\n /*0340*/ NOP;\n /*0350*/ NOP;\n /*0360*/ NOP;\n /*0370*/ NOP;\n.L_x_6:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.protected\t_Z19graphColoringKernelPiS_S_S_ ; -- Begin function _Z19graphColoringKernelPiS_S_S_\n\t.globl\t_Z19graphColoringKernelPiS_S_S_\n\t.p2align\t8\n\t.type\t_Z19graphColoringKernelPiS_S_S_,@function\n_Z19graphColoringKernelPiS_S_S_: ; @_Z19graphColoringKernelPiS_S_S_\n; %bb.0:\n\ts_load_b32 s2, s[0:1], 0x2c\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s2, s2, 0xffff\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_mad_u64_u32 v[1:2], null, s15, s2, v[0:1]\n\ts_mov_b32 s2, exec_lo\n\tv_cmpx_gt_i32_e32 0x4000, v1\n\ts_cbranch_execz .LBB0_8\n; %bb.1:\n\ts_load_b256 s[0:7], s[0:1], 0x0\n\tv_ashrrev_i32_e32 v2, 31, v1\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[0:1], 2, v[1:2]\n\ts_waitcnt lgkmcnt(0)\n\tv_add_co_u32 v2, vcc_lo, s4, v0\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v3, vcc_lo, s5, v1, vcc_lo\n\ts_mov_b32 s5, 0\n\ts_mov_b32 s4, exec_lo\n\tglobal_load_b32 v2, v[2:3], off\n\tv_mov_b32_e32 v3, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmpx_lt_i32_e32 0, v2\n\ts_cbranch_execz .LBB0_7\n; %bb.2:\n\tv_add_co_u32 v3, vcc_lo, s6, v0\n\tv_add_co_ci_u32_e32 v4, vcc_lo, s7, v1, vcc_lo\n\ts_mov_b32 s6, 0\n\tglobal_load_b32 v4, v[3:4], off\n\tv_mov_b32_e32 v3, 0\n\t.p2align\t6\n.LBB0_3: ; =>This Loop Header: Depth=1\n ; Child Loop BB0_4 Depth 2\n\ts_waitcnt vmcnt(0)\n\tv_add_nc_u32_e32 v5, s6, v4\n\ts_mov_b32 s7, 0\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_ashrrev_i32_e32 v6, 31, v5\n\tv_lshlrev_b64 v[5:6], 2, v[5:6]\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_2)\n\tv_add_co_u32 v5, vcc_lo, s0, v5\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s1, v6, vcc_lo\n\tglobal_load_b32 v5, v[5:6], off\n\ts_waitcnt vmcnt(0)\n\tv_ashrrev_i32_e32 v6, 31, v5\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_lshlrev_b64 v[5:6], 2, v[5:6]\n\tv_add_co_u32 v5, vcc_lo, s2, v5\n\ts_delay_alu instid0(VALU_DEP_2)\n\tv_add_co_ci_u32_e32 v6, vcc_lo, s3, v6, vcc_lo\n\tglobal_load_b32 v5, v[5:6], off\n\tv_add_nc_u32_e32 v6, -1, v3\n.LBB0_4: ; Parent Loop BB0_3 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_waitcnt vmcnt(0)\n\ts_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1)\n\tv_dual_mov_b32 v6, v5 :: v_dual_add_nc_u32 v3, 1, v6\n\tv_cmp_ne_u32_e32 vcc_lo, v5, v3\n\ts_or_b32 s7, vcc_lo, s7\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_and_not1_b32 exec_lo, exec_lo, s7\n\ts_cbranch_execnz .LBB0_4\n; %bb.5: ; in Loop: Header=BB0_3 Depth=1\n\ts_or_b32 exec_lo, exec_lo, s7\n\ts_add_i32 s6, s6, 1\n\ts_delay_alu instid0(SALU_CYCLE_1) | instskip(SKIP_1) | instid1(SALU_CYCLE_1)\n\tv_cmp_eq_u32_e32 vcc_lo, s6, v2\n\ts_or_b32 s5, vcc_lo, s5\n\ts_and_not1_b32 exec_lo, exec_lo, s5\n\ts_cbranch_execnz .LBB0_3\n; %bb.6:\n\ts_or_b32 exec_lo, exec_lo, s5\n.LBB0_7:\n\ts_delay_alu instid0(SALU_CYCLE_1)\n\ts_or_b32 exec_lo, exec_lo, s4\n\tv_add_co_u32 v0, vcc_lo, s2, v0\n\tv_add_co_ci_u32_e32 v1, vcc_lo, s3, v1, vcc_lo\n\tglobal_store_b32 v[0:1], v3, off\n.LBB0_8:\n\ts_nop 0\n\ts_sendmsg sendmsg(MSG_DEALLOC_VGPRS)\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z19graphColoringKernelPiS_S_S_\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 0\n\t\t.amdhsa_kernarg_size 288\n\t\t.amdhsa_user_sgpr_count 15\n\t\t.amdhsa_user_sgpr_dispatch_ptr 0\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 0\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 0\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 0\n\t\t.amdhsa_system_sgpr_workgroup_id_z 0\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 0\n\t\t.amdhsa_next_free_vgpr 7\n\t\t.amdhsa_next_free_sgpr 16\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end0:\n\t.size\t_Z19graphColoringKernelPiS_S_S_, .Lfunc_end0-_Z19graphColoringKernelPiS_S_S_\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 360\n; NumSgprs: 18\n; NumVgprs: 7\n; ScratchSize: 0\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 2\n; VGPRBlocks: 0\n; NumSGPRsForWavesPerEU: 18\n; NumVGPRsForWavesPerEU: 7\n; Occupancy: 16\n; WaveLimiterHint : 1\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 0\n; COMPUTE_PGM_RSRC2:USER_SGPR: 15\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 0\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 0\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 0\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.section\t\".note.GNU-stack\",\"\",@progbits\n\t.amdgpu_metadata\n---\namdhsa.kernels:\n - .args:\n - .address_space: global\n .offset: 0\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 8\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 16\n .size: 8\n .value_kind: global_buffer\n - .address_space: global\n .offset: 24\n .size: 8\n .value_kind: global_buffer\n - .offset: 32\n .size: 4\n .value_kind: hidden_block_count_x\n - .offset: 36\n .size: 4\n .value_kind: hidden_block_count_y\n - .offset: 40\n .size: 4\n .value_kind: hidden_block_count_z\n - .offset: 44\n .size: 2\n .value_kind: hidden_group_size_x\n - .offset: 46\n .size: 2\n .value_kind: hidden_group_size_y\n - .offset: 48\n .size: 2\n .value_kind: hidden_group_size_z\n - .offset: 50\n .size: 2\n .value_kind: hidden_remainder_x\n - .offset: 52\n .size: 2\n .value_kind: hidden_remainder_y\n - .offset: 54\n .size: 2\n .value_kind: hidden_remainder_z\n - .offset: 72\n .size: 8\n .value_kind: hidden_global_offset_x\n - .offset: 80\n .size: 8\n .value_kind: hidden_global_offset_y\n - .offset: 88\n .size: 8\n .value_kind: hidden_global_offset_z\n - .offset: 96\n .size: 2\n .value_kind: hidden_grid_dims\n .group_segment_fixed_size: 0\n .kernarg_segment_align: 8\n .kernarg_segment_size: 288\n .language: OpenCL C\n .language_version:\n - 2\n - 0\n .max_flat_workgroup_size: 1024\n .name: _Z19graphColoringKernelPiS_S_S_\n .private_segment_fixed_size: 0\n .sgpr_count: 18\n .sgpr_spill_count: 0\n .symbol: _Z19graphColoringKernelPiS_S_S_.kd\n .uniform_work_group_size: 1\n .uses_dynamic_stack: false\n .vgpr_count: 7\n .vgpr_spill_count: 0\n .wavefront_size: 32\n .workgroup_processor_mode: 1\namdhsa.target: amdgcn-amd-amdhsa--gfx1100\namdhsa.version:\n - 1\n - 2\n...\n\n\t.end_amdgpu_metadata\n"}}},{"rowIdx":99,"cells":{"id":{"kind":"string","value":"28a33a4e1b76977eae59139d0f97e06b6364e65b_O0"},"cuda":{"kind":"string","value":" .headerflags @\"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)\"\n .elftype @\"ET_EXEC\"\n\n\n//--------------------- .text._Z7findMaxPiS_i --------------------------\n .section .text._Z7findMaxPiS_i,\"ax\",@progbits\n .sectioninfo @\"SHI_REGISTERS=21\"\n .align 128\n\n\n\n\n .global _Z7findMaxPiS_i\n .type _Z7findMaxPiS_i,@function\n .size _Z7findMaxPiS_i,(.L_x_5 - _Z7findMaxPiS_i)\n .other _Z7findMaxPiS_i,@\"STO_CUDA_ENTRY STV_DEFAULT\"\n_Z7findMaxPiS_i:\n.text._Z7findMaxPiS_i:\n /*0000*/ MOV R1, c[0x0][0x28] ;\n /*0010*/ MOV R14, c[0x0][0x118] ;\n /*0020*/ MOV R15, c[0x0][0x11c] ;\n /*0030*/ MOV R2, RZ ;\n /*0040*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*0050*/ MOV R6, R2 ;\n /*0060*/ MOV R7, R3 ;\n /*0070*/ MOV R6, R6 ;\n /*0080*/ MOV R7, R7 ;\n /*0090*/ MOV R2, 0x8 ;\n /*00a0*/ LDC.64 R2, c[0x0][R2+0x160] ;\n /*00b0*/ MOV R9, R2 ;\n /*00c0*/ MOV R10, R3 ;\n /*00d0*/ MOV R9, R9 ;\n /*00e0*/ MOV R10, R10 ;\n /*00f0*/ MOV R0, 0x10 ;\n /*0100*/ LDC R0, c[0x0][R0+0x160] ;\n /*0110*/ MOV R5, R0 ;\n /*0120*/ S2R R0, SR_CTAID.X ;\n /*0130*/ MOV R0, R0 ;\n /*0140*/ MOV R2, c[0x0][0x0] ;\n /*0150*/ S2R R3, SR_TID.X ;\n /*0160*/ MOV R3, R3 ;\n /*0170*/ IMAD R4, R2, R0, R3 ;\n /*0180*/ MOV R6, R6 ;\n /*0190*/ MOV R7, R7 ;\n /*01a0*/ MOV R2, R6 ;\n /*01b0*/ MOV R3, R7 ;\n /*01c0*/ MOV R2, R2 ;\n /*01d0*/ MOV R3, R3 ;\n /*01e0*/ R2UR UR4, R14 ;\n /*01f0*/ R2UR UR5, R15 ;\n /*0200*/ LDG.E R8, [R2.64] ;\n /*0210*/ ISETP.LT.AND P0, PT, R5, 0x1, PT ;\n /*0220*/ MOV R0, R9 ;\n /*0230*/ MOV R2, R10 ;\n /*0240*/ MOV R5, R5 ;\n /*0250*/ MOV R3, R4 ;\n /*0260*/ MOV R6, R6 ;\n /*0270*/ MOV R7, R7 ;\n /*0280*/ MOV R8, R8 ;\n /*0290*/ @P0 BRA `(.L_x_0) ;\n /*02a0*/ IADD3 R9, R5, -0x1, RZ ;\n /*02b0*/ LOP3.LUT R4, R5, 0x3, RZ, 0xc0, !PT ;\n /*02c0*/ ISETP.LT.U32.AND P0, PT, R9, 0x3, PT ;\n /*02d0*/ MOV R12, RZ ;\n /*02e0*/ MOV R4, R4 ;\n /*02f0*/ MOV R12, R12 ;\n /*0300*/ @P0 BRA `(.L_x_1) ;\n /*0310*/ IADD3 R9, R5, -R4, RZ ;\n /*0320*/ IMAD.WIDE R10, R3, 0x4, RZ ;\n /*0330*/ MOV R13, R10 ;\n /*0340*/ MOV R18, R11 ;\n /*0350*/ IADD3 R13, P0, R6, R13, RZ ;\n /*0360*/ IADD3.X R18, R7, R18, RZ, P0, !PT ;\n /*0370*/ IMAD.WIDE R10, R5, 0x4, RZ ;\n /*0380*/ MOV R12, RZ ;\n /*0390*/ MOV R9, R9 ;\n /*03a0*/ MOV R13, R13 ;\n /*03b0*/ MOV R18, R18 ;\n /*03c0*/ MOV R16, R10 ;\n /*03d0*/ MOV R10, R11 ;\n /*03e0*/ MOV R11, R16 ;\n /*03f0*/ MOV R10, R10 ;\n /*0400*/ MOV R12, R12 ;\n.L_x_2:\n /*0410*/ MOV R16, R13 ;\n /*0420*/ MOV R17, R18 ;\n /*0430*/ MOV R16, R16 ;\n /*0440*/ MOV R17, R17 ;\n /*0450*/ R2UR UR4, R14 ;\n /*0460*/ R2UR UR5, R15 ;\n /*0470*/ LDG.E R16, [R16.64] ;\n /*0480*/ IMNMX R8, R16, R8, !PT ;\n /*0490*/ IADD3 R13, P0, R13, R11, RZ ;\n /*04a0*/ IADD3.X R18, R18, R10, RZ, P0, !PT ;\n /*04b0*/ MOV R16, R13 ;\n /*04c0*/ MOV R17, R18 ;\n /*04d0*/ MOV R16, R16 ;\n /*04e0*/ MOV R17, R17 ;\n /*04f0*/ R2UR UR4, R14 ;\n /*0500*/ R2UR UR5, R15 ;\n /*0510*/ LDG.E R16, [R16.64] ;\n /*0520*/ IMNMX R8, R16, R8, !PT ;\n /*0530*/ IADD3 R13, P0, R13, R11, RZ ;\n /*0540*/ IADD3.X R18, R18, R10, RZ, P0, !PT ;\n /*0550*/ MOV R16, R13 ;\n /*0560*/ MOV R17, R18 ;\n /*0570*/ MOV R16, R16 ;\n /*0580*/ MOV R17, R17 ;\n /*0590*/ R2UR UR4, R14 ;\n /*05a0*/ R2UR UR5, R15 ;\n /*05b0*/ LDG.E R16, [R16.64] ;\n /*05c0*/ IMNMX R8, R16, R8, !PT ;\n /*05d0*/ IADD3 R16, P0, R13, R11, RZ ;\n /*05e0*/ IADD3.X R17, R18, R10, RZ, P0, !PT ;\n /*05f0*/ IADD3 R13, P0, R16, R11, RZ ;\n /*0600*/ IADD3.X R18, R17, R10, RZ, P0, !PT ;\n /*0610*/ MOV R16, R16 ;\n /*0620*/ MOV R17, R17 ;\n /*0630*/ MOV R16, R16 ;\n /*0640*/ MOV R17, R17 ;\n /*0650*/ R2UR UR4, R14 ;\n /*0660*/ R2UR UR5, R15 ;\n /*0670*/ LDG.E R16, [R16.64] ;\n /*0680*/ IMNMX R8, R16, R8, !PT ;\n /*0690*/ IADD3 R12, R12, 0x4, RZ ;\n /*06a0*/ IADD3 R9, R9, -0x4, RZ ;\n /*06b0*/ ISETP.NE.AND P0, PT, R9, RZ, PT ;\n /*06c0*/ MOV R13, R13 ;\n /*06d0*/ MOV R18, R18 ;\n /*06e0*/ MOV R8, R8 ;\n /*06f0*/ MOV R12, R12 ;\n /*0700*/ MOV R9, R9 ;\n /*0710*/ @P0 BRA `(.L_x_2) ;\n.L_x_1:\n /*0720*/ ISETP.EQ.AND P0, PT, R4, RZ, PT ;\n /*0730*/ @P0 BRA `(.L_x_0) ;\n /*0740*/ IMAD R10, R12, R5, R3 ;\n /*0750*/ IMAD.WIDE R10, R10, 0x4, RZ ;\n /*0760*/ MOV R9, R10 ;\n /*0770*/ MOV R11, R11 ;\n /*0780*/ IADD3 R9, P0, R6, R9, RZ ;\n /*0790*/ IADD3.X R11, R7, R11, RZ, P0, !PT ;\n /*07a0*/ IMAD.WIDE R6, R5, 0x4, RZ ;\n /*07b0*/ MOV R5, R9 ;\n /*07c0*/ MOV R11, R11 ;\n /*07d0*/ MOV R9, R6 ;\n /*07e0*/ MOV R10, R7 ;\n /*07f0*/ MOV R9, R9 ;\n /*0800*/ MOV R10, R10 ;\n.L_x_3:\n /*0810*/ MOV R6, R5 ;\n /*0820*/ MOV R7, R11 ;\n /*0830*/ MOV R6, R6 ;\n /*0840*/ MOV R7, R7 ;\n /*0850*/ R2UR UR4, R14 ;\n /*0860*/ R2UR UR5, R15 ;\n /*0870*/ LDG.E R6, [R6.64] ;\n /*0880*/ IMNMX R6, R6, R8, !PT ;\n /*0890*/ IADD3 R5, P0, R5, R9, RZ ;\n /*08a0*/ IADD3.X R7, R11, R10, RZ, P0, !PT ;\n /*08b0*/ IADD3 R4, R4, -0x1, RZ ;\n /*08c0*/ ISETP.NE.AND P0, PT, R4, RZ, PT ;\n /*08d0*/ MOV R8, R6 ;\n /*08e0*/ MOV R5, R5 ;\n /*08f0*/ MOV R11, R7 ;\n /*0900*/ MOV R4, R4 ;\n /*0910*/ @P0 BRA `(.L_x_3) ;\n.L_x_0:\n /*0920*/ MOV R4, R0 ;\n /*0930*/ MOV R5, R2 ;\n /*0940*/ IMAD.WIDE R2, R3, 0x4, RZ ;\n /*0950*/ MOV R0, R2 ;\n /*0960*/ MOV R3, R3 ;\n /*0970*/ IADD3 R2, P0, R4, R0, RZ ;\n /*0980*/ IADD3.X R3, R5, R3, RZ, P0, !PT ;\n /*0990*/ MOV R2, R2 ;\n /*09a0*/ MOV R3, R3 ;\n /*09b0*/ MOV R2, R2 ;\n /*09c0*/ MOV R3, R3 ;\n /*09d0*/ R2UR UR4, R14 ;\n /*09e0*/ R2UR UR5, R15 ;\n /*09f0*/ STG.E [R2.64], R8 ;\n /*0a00*/ EXIT ;\n.L_x_4:\n /*0a10*/ BRA `(.L_x_4);\n /*0a20*/ NOP;\n /*0a30*/ NOP;\n /*0a40*/ NOP;\n /*0a50*/ NOP;\n /*0a60*/ NOP;\n /*0a70*/ NOP;\n /*0a80*/ NOP;\n /*0a90*/ NOP;\n /*0aa0*/ NOP;\n /*0ab0*/ NOP;\n /*0ac0*/ NOP;\n /*0ad0*/ NOP;\n /*0ae0*/ NOP;\n /*0af0*/ NOP;\n.L_x_5:\n"},"hip":{"kind":"string","value":"\t.text\n\t.amdgcn_target \"amdgcn-amd-amdhsa--gfx1100\"\n\t.weak\t__cxa_pure_virtual ; -- Begin function __cxa_pure_virtual\n\t.p2align\t2\n\t.type\t__cxa_pure_virtual,@function\n__cxa_pure_virtual: ; @__cxa_pure_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB0_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB0_1\n.Lfunc_end0:\n\t.size\t__cxa_pure_virtual, .Lfunc_end0-__cxa_pure_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.weak\t__cxa_deleted_virtual ; -- Begin function __cxa_deleted_virtual\n\t.p2align\t2\n\t.type\t__cxa_deleted_virtual,@function\n__cxa_deleted_virtual: ; @__cxa_deleted_virtual\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB1_1: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB1_1\n.Lfunc_end1:\n\t.size\t__cxa_deleted_virtual, .Lfunc_end1-__cxa_deleted_virtual\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 56\n; NumSgprs: 1\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hsa_signal_add\n\t.type\t__ockl_hsa_signal_add,@function\n__ockl_hsa_signal_add: ; @__ockl_hsa_signal_add\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v6, s32 offset:48 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v4, s32 offset:36 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s32 offset:32 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v2\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v1, s32 offset:28 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[3:4], s32 offset:20 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tscratch_store_b64 off, v[3:4], s32 offset:12 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s32 offset:4 ; 8-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 3\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n ; implicit-def: $vgpr6 : SGPR spill to VGPR lane\n\tv_writelane_b32 v6, s1, 0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 1\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_3\n; %bb.2:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 4\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s1, 2\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 3\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_17\n\ts_branch .LBB2_4\n.LBB2_3:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 1\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 0\n\tv_writelane_b32 v6, s2, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 5\n\tv_writelane_b32 v6, s1, 6\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 7\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_13\n\ts_branch .LBB2_6\n.LBB2_4:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 5\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 9\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_15\n\ts_branch .LBB2_18\n.LBB2_5:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 10\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 11\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 0\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_3\n.LBB2_6:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 12\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_7\n\ts_branch .LBB2_14\n.LBB2_7:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s2, v6, 4\n\ts_mov_b32 s1, 0\n\tv_writelane_b32 v6, s2, 13\n\tv_writelane_b32 v6, s1, 14\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 15\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_9\n; %bb.8:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 4\n\tscratch_load_b32 v0, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_lt_i32_e64 s2, v0, s0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 13\n\tv_writelane_b32 v6, s0, 14\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_9:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s3, v6, 15\n\ts_or_b32 exec_lo, exec_lo, s3\n\tv_readlane_b32 s1, v6, 4\n\tv_readlane_b32 s2, v6, 13\n\tv_readlane_b32 s0, v6, 14\n\ts_and_b32 s0, s0, exec_lo\n\ts_and_not1_b32 s1, s1, exec_lo\n\ts_and_b32 s2, s2, exec_lo\n\ts_or_b32 s1, s1, s2\n\tv_writelane_b32 v6, s1, 5\n\tv_writelane_b32 v6, s0, 6\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_13\n.LBB2_10:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 16\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 17\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n.LBB2_11:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v6, 17\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 19\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_19\n; %bb.12:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_19\n.LBB2_13:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v6, 7\n\ts_or_b32 exec_lo, exec_lo, s2\n\tv_readlane_b32 s0, v6, 5\n\tv_readlane_b32 s1, v6, 6\n\tv_writelane_b32 v6, s1, 16\n\tv_writelane_b32 v6, s1, 17\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v6, s1, 18\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_11\n\ts_branch .LBB2_10\n.LBB2_14:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_branch .LBB2_7\n.LBB2_15:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v6, 9\n\ts_or_b32 exec_lo, exec_lo, s1\n\tv_readlane_b32 s0, v6, 8\n\ts_and_b32 s0, s0, exec_lo\n\tv_writelane_b32 v6, s0, 2\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_17\n.LBB2_16:\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_branch .LBB2_5\n.LBB2_17:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 3\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v6, 2\n\tv_writelane_b32 v6, s1, 11\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v6, s0, 10\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB2_5\n\ts_branch .LBB2_16\n.LBB2_18:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\tscratch_load_b64 v[0:1], off, s32 offset:4 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s32 offset:20 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_add_u64 v[0:1], v[2:3], off\n\ts_waitcnt_vscnt null, 0x0\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 0\n\ts_xor_b32 s0, exec_lo, -1\n\tv_writelane_b32 v6, s0, 8\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_branch .LBB2_15\n.LBB2_19:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[0:1], v[0:1], off offset:16\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s1, v[0:1], s[0:1]\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v6, s0, 20\n\ts_or_saveexec_b32 s5, -1\n\tscratch_store_b32 off, v6, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s5\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB2_21\n; %bb.20:\n\tscratch_load_b64 v[1:2], off, s32 offset:40 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s32 offset:12 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[3:4], off offset:24\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_store_b64 v[1:2], v[3:4], off\n\tv_readfirstlane_b32 s0, v0\n\ts_mov_b32 s1, 0xff\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n.LBB2_21:\n\ts_or_saveexec_b32 s5, -1\n\tscratch_load_b32 v6, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s5\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v6, 20\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v6, off, s32 offset:48 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end2:\n\t.size\t__ockl_hsa_signal_add, .Lfunc_end2-__ockl_hsa_signal_add\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 1952\n; NumSgprs: 33\n; NumVgprs: 7\n; ScratchSize: 56\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_internal\n\t.type\t__ockl_hostcall_internal,@function\n__ockl_hostcall_internal: ; @__ockl_hostcall_internal\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s18, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v24, s33 offset:308 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v25, s33 offset:312 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v26, s33 offset:316 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x150\n\tv_writelane_b32 v24, s30, 0\n\tv_writelane_b32 v24, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:132 ; 4-byte Folded Spill\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s6, 0\n\tv_writelane_b32 v26, s7, 1\n\tscratch_store_b32 off, v18, s33 offset:128 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v16\n\tscratch_load_b32 v16, off, s33 offset:128 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:124 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v14\n\tscratch_load_b32 v14, off, s33 offset:124 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:120 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v12\n\tscratch_load_b32 v12, off, s33 offset:120 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:116 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v10\n\tscratch_load_b32 v10, off, s33 offset:116 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:112 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v8\n\tscratch_load_b32 v8, off, s33 offset:112 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:108 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v6\n\tscratch_load_b32 v6, off, s33 offset:108 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:104 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v4\n\tscratch_load_b32 v4, off, s33 offset:104 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v18, v2\n\tscratch_load_b32 v2, off, s33 offset:100 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v18, s33 offset:96 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v1, s33 offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v1, v0\n\tscratch_load_b32 v0, off, s33 offset:92 ; 4-byte Folded Reload\n\tv_writelane_b32 v26, s15, 2\n\tv_writelane_b32 v26, s14, 3\n\tv_writelane_b32 v26, s13, 4\n\tv_writelane_b32 v26, s12, 5\n\tv_writelane_b32 v26, s10, 6\n\tv_writelane_b32 v26, s11, 7\n\tv_writelane_b32 v26, s8, 8\n\tv_writelane_b32 v26, s9, 9\n\tv_writelane_b32 v26, s4, 10\n\tv_writelane_b32 v26, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\ts_waitcnt vmcnt(8)\n\tv_mov_b32_e32 v18, v16\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr15 killed $vgpr15 def $vgpr15_vgpr16 killed $exec\n\ts_waitcnt vmcnt(7)\n\tv_mov_b32_e32 v16, v14\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\ts_waitcnt vmcnt(6)\n\tv_mov_b32_e32 v14, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\ts_waitcnt vmcnt(5)\n\tv_mov_b32_e32 v12, v10\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\ts_waitcnt vmcnt(4)\n\tv_mov_b32_e32 v10, v8\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\ts_waitcnt vmcnt(3)\n\tv_mov_b32_e32 v8, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[17:18], s33 offset:84 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[15:16], s33 offset:76 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[13:14], s33 offset:68 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[11:12], s33 offset:60 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[9:10], s33 offset:52 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[7:8], s33 offset:44 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[5:6], s33 offset:36 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:28 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s0, -1\n\tv_mbcnt_lo_u32_b32 v0, s0, s1\n\tv_mbcnt_hi_u32_b32 v0, s0, v0\n\t;;#ASMSTART\n\t;;#ASMEND\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b32 off, v3, s33 offset:24 ; 4-byte Folded Spill\n\tv_readfirstlane_b32 s0, v0\n\tscratch_store_b64 off, v[1:2], s33 offset:16 ; 8-byte Folded Spill\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, s1\n\tv_writelane_b32 v26, s0, 12\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v0, 0\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 13\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_6\n; %bb.1:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_mov_b64 s[2:3], 24\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:160 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b64 s[2:3], 40\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:152 ; 8-byte Folded Spill\n\tglobal_load_b64 v[5:6], v[0:1], off\n\tglobal_load_b64 v[10:11], v[0:1], off offset:40\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s1, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s1, v4, s1, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s0, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 15\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_5\n.LBB3_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 14\n\tscratch_load_b64 v[2:3], off, s33 offset:144 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:160 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:152 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[5:6], v[4:5], off\n\tglobal_load_b64 v[10:11], v[7:8], off\n\tv_mov_b32_e32 v8, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v11\n\tv_and_b32_e64 v4, v4, v8\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v7, v10\n\tv_and_b32_e64 v12, v7, v9\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_mov_b32_e32 v4, v12\n\ts_mov_b32 s2, 24\n\tv_mad_u64_u32 v[10:11], s0, v4, s2, 0\n\tv_mov_b32_e32 v14, v11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr14 killed $vgpr14 def $vgpr14_vgpr15 killed $exec\n\tv_mov_b32_e32 v15, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[12:13], s0, v[12:13]\n\tv_mov_b32_e32 v4, v12\n\tv_mad_u64_u32 v[12:13], s2, v4, s2, v[14:15]\n ; kill: def $vgpr12 killed $vgpr12 killed $vgpr12_vgpr13 killed $exec\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr12 killed $vgpr12 def $vgpr12_vgpr13 killed $exec\n\tv_mov_b32_e32 v13, v4\n\tv_lshlrev_b64 v[13:14], s0, v[12:13]\n\tv_mov_b32_e32 v7, v14\n\tv_mov_b32_e32 v11, v10\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\tv_mov_b32_e32 v4, v12\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v10, v13\n\tv_mov_b32_e32 v7, v11\n\tv_or_b32_e64 v10, v7, v10\n ; kill: def $vgpr10 killed $vgpr10 def $vgpr10_vgpr11 killed $exec\n\tv_mov_b32_e32 v11, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v11\n\tv_add_co_u32 v4, s0, v4, v7\n\tv_add_co_ci_u32_e64 v6, s0, v5, v6, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tglobal_load_b64 v[4:5], v[4:5], off glc\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v10, v5\n ; kill: def $vgpr4 killed $vgpr4 killed $vgpr4_vgpr5 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\tv_cmp_eq_u64_e64 s0, v[0:1], v[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:144 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:168 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 16\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_2\n; %bb.3:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 16\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.4:\n\tscratch_load_b64 v[0:1], off, s33 offset:168 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:136 ; 8-byte Folded Spill\n.LBB3_5:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:136 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:8 ; 8-byte Folded Spill\n.LBB3_6:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[4:5], s0, v[4:5]\n\tv_mov_b32_e32 v2, v4\n\tv_readfirstlane_b32 s4, v3\n\tv_readfirstlane_b32 s2, v2\n ; implicit-def: $sgpr5\n ; implicit-def: $sgpr3\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s5\n\ts_lshl_b64 s[2:3], s[2:3], s0\n\ts_mov_b32 s0, 0\n ; kill: def $sgpr4 killed $sgpr4 def $sgpr4_sgpr5\n\ts_mov_b32 s5, s0\n\ts_or_b64 s[2:3], s[2:3], s[4:5]\n\tv_writelane_b32 v26, s2, 17\n\tv_writelane_b32 v26, s3, 18\n\tglobal_load_b64 v[2:3], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:200 ; 8-byte Folded Spill\n\ts_mov_b64 s[6:7], 40\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s7\n\tv_add_co_u32 v2, s4, v2, s4\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s4\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tglobal_load_b64 v[3:4], v[0:1], off offset:40\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v4\n\tv_and_b32_e64 v2, s0, v2\n\ts_mov_b32 s0, s2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_and_b32_e64 v3, s0, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tscratch_store_b64 off, v[5:6], s33 offset:184 ; 8-byte Folded Spill\n\tglobal_load_b64 v[1:2], v[0:1], off offset:8\n\ts_mov_b32 s0, 12\n\tv_lshlrev_b64 v[4:5], s0, v[3:4]\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s0, v0, v3\n\tv_add_co_ci_u32_e64 v2, s0, v1, v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], exec\n\tv_writelane_b32 v26, s2, 19\n\tv_writelane_b32 v26, s3, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 21\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_8\n; %bb.7:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 19\n\tv_readlane_b32 s1, v26, 20\n\tscratch_load_b32 v2, off, s33 offset:96 ; 4-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v0\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[3:4], s2, v5, s3, 0\n\tv_mov_b32_e32 v9, v4\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s2\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v5\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[0:1], s2, v[0:1]\n\tv_mov_b32_e32 v5, v0\n\tv_mad_u64_u32 v[0:1], s3, v5, s3, v[9:10]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v5, s3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_lshlrev_b64 v[9:10], s2, v[0:1]\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v4, v3\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n\tv_mov_b32_e32 v3, v9\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v5, v1, v3\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s2, v0, v4\n\tv_add_co_ci_u32_e64 v3, s2, v1, v3, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tglobal_store_b32 v[0:1], v2, off offset:16\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tglobal_store_b64 v[0:1], v[2:3], off offset:8\n\tv_mov_b32_e32 v2, 1\n\tglobal_store_b32 v[0:1], v2, off offset:20\n.LBB3_8:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[2:3], off, s33 offset:84 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:76 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:68 ; 8-byte Folded Reload\n\tscratch_load_b64 v[8:9], off, s33 offset:60 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:52 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[14:15], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[16:17], off, s33 offset:28 ; 8-byte Folded Reload\n\tscratch_load_b64 v[22:23], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:24 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v18, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\ts_mov_b32 s0, 6\n\ts_waitcnt vmcnt(0)\n\tv_lshlrev_b64 v[20:21], s0, v[0:1]\n\tv_mov_b32_e32 v0, v22\n\tv_mov_b32_e32 v19, v20\n\tv_mov_b32_e32 v1, v23\n\tv_mov_b32_e32 v18, v21\n\tv_add_co_u32 v0, s0, v0, v19\n\tv_add_co_ci_u32_e64 v18, s0, v1, v18, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v18\n\tscratch_store_b64 off, v[0:1], s33 offset:216 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[16:17], off\n\ts_mov_b64 s[4:5], 8\n\tv_mov_b32_e32 v16, v0\n\ts_mov_b32 s2, s4\n\tv_mov_b32_e32 v17, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v16, s2, v16, s2\n\tv_add_co_ci_u32_e64 v18, s0, v17, s0, s2\n ; kill: def $vgpr16 killed $vgpr16 def $vgpr16_vgpr17 killed $exec\n\tv_mov_b32_e32 v17, v18\n\tscratch_store_b64 off, v[16:17], s33 offset:208 ; 8-byte Folded Spill\n\tglobal_store_b64 v[0:1], v[14:15], off offset:8\n\tglobal_store_b64 v[0:1], v[12:13], off offset:16\n\tglobal_store_b64 v[0:1], v[10:11], off offset:24\n\tglobal_store_b64 v[0:1], v[8:9], off offset:32\n\tglobal_store_b64 v[0:1], v[6:7], off offset:40\n\tglobal_store_b64 v[0:1], v[4:5], off offset:48\n\tglobal_store_b64 v[0:1], v[2:3], off offset:56\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 22\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_13\n; %bb.9:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[5:6], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[7:8], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_mov_b64 s[4:5], 32\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:240 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:32 glc\n\ts_waitcnt vmcnt(1)\n\tglobal_load_b64 v[7:8], v[7:8], off\n\ts_mov_b32 s0, s3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v8\n\tv_and_b32_e64 v4, v4, s0\n\ts_mov_b32 s1, s2\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n\tv_and_b32_e64 v7, v7, s1\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v4, v7\n\ts_mov_b32 s3, 24\n\tv_mad_u64_u32 v[9:10], s2, v4, s3, 0\n\tv_mov_b32_e32 v11, v10\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s2\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v4\n\ts_mov_b32 s2, 32\n\tv_lshrrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v4, v7\n\tv_mad_u64_u32 v[7:8], s3, v4, s3, v[11:12]\n ; kill: def $vgpr7 killed $vgpr7 killed $vgpr7_vgpr8 killed $exec\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n\tv_mov_b32_e32 v4, s3\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v4\n\tv_lshlrev_b64 v[7:8], s2, v[7:8]\n\tv_mov_b32_e32 v11, v8\n ; kill: def $vgpr9 killed $vgpr9 killed $vgpr9_vgpr10 killed $exec\n\ts_mov_b32 s2, 0\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, 0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v4, v10\n\tv_or_b32_e64 v4, v4, v11\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v7, v9\n\tv_or_b32_e64 v8, v7, v8\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v7, v8\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v6, v9\n\tv_add_co_u32 v4, s2, v4, v7\n\tv_add_co_ci_u32_e64 v6, s2, v5, v6, s2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\tscratch_store_b64 off, v[4:5], s33 offset:232 ; 8-byte Folded Spill\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s1\n\tv_mov_b32_e32 v10, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:32 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 23\n\tv_writelane_b32 v26, s0, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 25\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_14\n.LBB3_10: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 24\n\tv_readlane_b32 s1, v26, 23\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[2:3], off, s33 offset:224 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:240 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:232 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[4:5], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s1, s3\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v10, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v26, s1, 23\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 24\n\tscratch_store_b64 off, v[0:1], s33 offset:224 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 26\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_10\n; %bb.11:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.12:\n\ts_branch .LBB3_14\n.LBB3_13:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_branch .LBB3_15\n.LBB3_14:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s15, v26, 2\n\tv_readlane_b32 s14, v26, 3\n\tv_readlane_b32 s13, v26, 4\n\tv_readlane_b32 s12, v26, 5\n\tv_readlane_b32 s10, v26, 6\n\tv_readlane_b32 s11, v26, 7\n\tv_readlane_b32 s8, v26, 8\n\tv_readlane_b32 s9, v26, 9\n\tv_readlane_b32 s6, v26, 0\n\tv_readlane_b32 s7, v26, 1\n\tv_readlane_b32 s4, v26, 10\n\tv_readlane_b32 s5, v26, 11\n\tscratch_load_b32 v31, off, s33 offset:132 ; 4-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[0:1], off offset:16\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hsa_signal_add@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hsa_signal_add@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v3, 0\n\tv_mov_b32_e32 v4, 3\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_branch .LBB3_13\n.LBB3_15:\n\tscratch_load_b64 v[6:7], off, s33 offset:200 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[3:4], s0, v2, s1, 0\n\tv_mov_b32_e32 v8, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v2\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[0:1]\n\tv_mov_b32_e32 v2, v0\n\tv_mad_u64_u32 v[0:1], s1, v2, s1, v[8:9]\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v2, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_lshlrev_b64 v[1:2], s0, v[0:1]\n\tv_mov_b32_e32 v5, v2\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\tv_mov_b32_e32 v0, v4\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v1, v3\n\tv_or_b32_e64 v4, v1, v2\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v0\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v1, s0, v1, v3\n\tv_add_co_ci_u32_e64 v0, s0, v0, v2, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b64 s[2:3], 20\n\tv_mov_b32_e32 v0, v1\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v1, v2\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v0, s1, v0, s1\n\tv_add_co_ci_u32_e64 v2, s0, v1, s0, s1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:248 ; 8-byte Folded Spill\n.LBB3_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\ts_mov_b32 s0, 1\n\tv_mov_b32_e32 v0, 1\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 27\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_18\n; %bb.17: ; in Loop: Header=BB3_16 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:248 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b32 v0, v[0:1], off glc\n\ts_waitcnt vmcnt(0)\n\tbuffer_gl1_inv\n\tbuffer_gl0_inv\n\ts_mov_b32 s0, 1\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s33 offset:256 ; 4-byte Folded Spill\n.LBB3_18: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 27\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s33 offset:256 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_readfirstlane_b32 s1, v0\n\ts_mov_b32 s0, -1\n\ts_mov_b32 s2, 0\n\ts_cmp_eq_u32 s1, s2\n\tv_writelane_b32 v26, s0, 28\n\ts_mov_b32 s17, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_cbranch_scc1 .LBB3_20\n; %bb.19: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_sleep 1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v26, s0, 28\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n.LBB3_20: ; in Loop: Header=BB3_16 Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 28\n\tv_cndmask_b32_e64 v0, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v0, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n\ts_cbranch_vccnz .LBB3_16\n; %bb.21:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v26, 12\n\tscratch_load_b64 v[0:1], off, s33 offset:208 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:216 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[2:3], v[2:3], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:268 ; 8-byte Folded Spill\n\tglobal_load_b64 v[0:1], v[0:1], off\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:260 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v26, s0, 29\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_27\n; %bb.22:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v26, 17\n\tv_readlane_b32 s3, v26, 18\n\tscratch_load_b64 v[0:1], off, s33 offset:16 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:192 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tglobal_load_b64 v[11:12], v[2:3], off\n\ts_mov_b64 s[4:5], 1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v11\n\ts_mov_b32 s1, s4\n\tv_mov_b32_e32 v3, v12\n\ts_mov_b32 s0, s5\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v4, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v4, v2\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v5, v3\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v4, s1, v4, s1\n\tv_add_co_ci_u32_e64 v6, s0, v5, s0, s1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_eq_u64_e64 s0, v[4:5], s[0:1]\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v5\n\tv_cndmask_b32_e64 v10, v6, v7, s0\n\tv_mov_b32_e32 v3, v2\n\tv_mov_b32_e32 v2, v4\n\tv_cndmask_b32_e64 v4, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v8, v4\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v2, v8\n\tv_mov_b32_e32 v3, v9\n\tscratch_store_b64 off, v[2:3], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b64 s[2:3], 24\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v3, v1\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v2, s1, v2, s1\n\tv_add_co_ci_u32_e64 v5, s0, v3, s0, s1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v5\n\tscratch_store_b64 off, v[2:3], s33 offset:292 ; 8-byte Folded Spill\n\tglobal_load_b64 v[2:3], v[0:1], off offset:24 glc\n\tglobal_load_b64 v[6:7], v[0:1], off\n\tv_mov_b32_e32 v5, v9\n\tv_mov_b32_e32 v13, v12\n\tv_and_b32_e64 v5, v5, v13\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v11\n\tv_and_b32_e64 v8, v8, v9\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b32 s1, 24\n\tv_mad_u64_u32 v[11:12], s0, v5, s1, 0\n\tv_mov_b32_e32 v13, v12\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s0\n ; kill: def $vgpr13 killed $vgpr13 def $vgpr13_vgpr14 killed $exec\n\tv_mov_b32_e32 v14, v5\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v5, v8\n\tv_mad_u64_u32 v[8:9], s1, v5, s1, v[13:14]\n ; kill: def $vgpr8 killed $vgpr8 killed $vgpr8_vgpr9 killed $exec\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v5, s1\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v5\n\tv_lshlrev_b64 v[8:9], s0, v[8:9]\n\tv_mov_b32_e32 v13, v9\n ; kill: def $vgpr11 killed $vgpr11 killed $vgpr11_vgpr12 killed $exec\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v5, 0\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\tv_mov_b32_e32 v5, v12\n\tv_or_b32_e64 v5, v5, v13\n\tv_mov_b32_e32 v9, v8\n\tv_mov_b32_e32 v8, v11\n\tv_or_b32_e64 v11, v8, v9\n ; kill: def $vgpr11 killed $vgpr11 def $vgpr11_vgpr12 killed $exec\n\tv_mov_b32_e32 v12, v5\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v5, v6\n\tv_mov_b32_e32 v8, v11\n\tv_mov_b32_e32 v6, v7\n\tv_mov_b32_e32 v7, v12\n\tv_add_co_u32 v5, s0, v5, v8\n\tv_add_co_ci_u32_e64 v7, s0, v6, v7, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[5:6], s33 offset:284 ; 8-byte Folded Spill\n\tglobal_store_b64 v[5:6], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off offset:24 glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s2, v[0:1], v[2:3]\n\tv_cmp_ne_u64_e64 s1, v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v26, s2, 30\n\tv_writelane_b32 v26, s0, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n ; implicit-def: $vgpr26 : SGPR spill to VGPR lane\n\tv_writelane_b32 v26, s0, 0\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB3_26\n.LBB3_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v25, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v25, 31\n\tv_readlane_b32 s1, v25, 30\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\tscratch_load_b64 v[2:3], off, s33 offset:276 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b64 v[4:5], off, s33 offset:300 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:284 ; 8-byte Folded Reload\n\ts_sleep 1\n\ts_waitcnt vmcnt(0)\n\tglobal_store_b64 v[6:7], v[2:3], off\n\tv_mov_b32_e32 v8, v3\n\tv_mov_b32_e32 v9, v2\n\tv_mov_b32_e32 v10, v5\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5_vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v7, v8\n\ts_waitcnt_vscnt null, 0x0\n\tglobal_atomic_cmpswap_b64 v[0:1], v[0:1], v[4:7], off glc\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u64_e64 s1, v[0:1], v[2:3]\n\ts_or_b32 s0, s1, s0\n\tv_writelane_b32 v25, s1, 30\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v25, s1, 31\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v25, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\tscratch_store_b64 off, v[0:1], s33 offset:276 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v26, s1, 1\n\ts_or_saveexec_b32 s17, -1\n\tscratch_store_b32 off, v26, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s17\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB3_23\n; %bb.24:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.25:\n.LBB3_26:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 0\n\ts_or_b32 exec_lo, exec_lo, s0\n.LBB3_27:\n\ts_or_saveexec_b32 s17, -1\n\tscratch_load_b32 v26, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s17\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v26, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[3:4], off, s33 offset:260 ; 8-byte Folded Reload\n\tscratch_load_b64 v[1:2], off, s33 offset:268 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v3\n\tv_mov_b32_e32 v3, v4\n\tv_readlane_b32 s30, v24, 0\n\tv_readlane_b32 s31, v24, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v24, off, s33 offset:308 ; 4-byte Folded Reload\n\tscratch_load_b32 v25, off, s33 offset:312 ; 4-byte Folded Reload\n\tscratch_load_b32 v26, off, s33 offset:316 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffeb0\n\ts_mov_b32 s33, s18\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end3:\n\t.size\t__ockl_hostcall_internal, .Lfunc_end3-__ockl_hostcall_internal\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 5344\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 392\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_hostcall_preview\n\t.type\t__ockl_hostcall_preview,@function\n__ockl_hostcall_preview: ; @__ockl_hostcall_preview\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v27, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tv_writelane_b32 v27, s33, 0\n\tv_writelane_b32 v27, s30, 1\n\tv_writelane_b32 v27, s31, 2\n\tv_mov_b32_e32 v18, v16\n\tv_mov_b32_e32 v17, v15\n\tv_mov_b32_e32 v16, v14\n\tv_mov_b32_e32 v15, v13\n\tv_mov_b32_e32 v14, v12\n\tv_mov_b32_e32 v13, v11\n\tv_mov_b32_e32 v12, v10\n\tv_mov_b32_e32 v11, v9\n\tv_mov_b32_e32 v10, v8\n\tv_mov_b32_e32 v9, v7\n\tv_mov_b32_e32 v8, v6\n\tv_mov_b32_e32 v7, v5\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v5, v3\n\tv_mov_b32_e32 v4, v2\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s0, s[0:1], 0x0\n\ts_mov_b32 s1, 0x1f4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_i32 s0, s1\n\ts_mov_b32 s1, 0x50\n\ts_mov_b32 s0, 24\n\ts_cselect_b32 s0, s0, s1\n\ts_load_b64 s[0:1], s[8:9], s0 offset:0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_mov_b32 s3, s0\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s2, s0\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_internal@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_internal@rel32@hi+12\n\tv_mov_b32_e32 v0, s3\n\tv_mov_b32_e32 v1, s2\n\tv_readlane_b32 s30, v27, 1\n\tv_readlane_b32 s31, v27, 2\n\tv_readlane_b32 s33, v27, 0\n\ts_xor_saveexec_b32 s2, -1\n\tscratch_load_b32 v27, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s2\n\ts_setpc_b64 s[0:1]\n.Lfunc_end4:\n\t.size\t__ockl_hostcall_preview, .Lfunc_end4-__ockl_hostcall_preview\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 272\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 400\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_stderr_begin\n\t.type\t__ockl_fprintf_stderr_begin,@function\n__ockl_fprintf_stderr_begin: ; @__ockl_fprintf_stderr_begin\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s16, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 16\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v1, 33\n\tv_mov_b32_e32 v3, 1\n\tv_mov_b32_e32 v16, 0\n\tv_mov_b32_e32 v2, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, -16\n\ts_mov_b32 s33, s16\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end5:\n\t.size\t__ockl_fprintf_stderr_begin, .Lfunc_end5-__ockl_fprintf_stderr_begin\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 228\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 416\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_string_n\n\t.type\t__ockl_fprintf_append_string_n,@function\n__ockl_fprintf_append_string_n: ; @__ockl_fprintf_append_string_n\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s20, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v32, s33 offset:704 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v33, s33 offset:708 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v34, s33 offset:712 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0x2d0\n\tv_writelane_b32 v32, s30, 0\n\tv_writelane_b32 v32, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:68 ; 4-byte Folded Spill\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s6, 0\n\tv_writelane_b32 v34, s7, 1\n\tscratch_store_b32 off, v6, s33 offset:60 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v5, s33 offset:56 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v4, s33 offset:64 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v6, v3\n\tscratch_load_b32 v3, off, s33 offset:64 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v4, v2\n\tscratch_load_b32 v2, off, s33 offset:60 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v4, s33 offset:52 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v7, v1\n\tscratch_load_b32 v1, off, s33 offset:56 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v5, v0\n\tscratch_load_b32 v0, off, s33 offset:52 ; 4-byte Folded Reload\n\tv_writelane_b32 v34, s15, 2\n\tv_writelane_b32 v34, s14, 3\n\tv_writelane_b32 v34, s13, 4\n\tv_writelane_b32 v34, s12, 5\n\tv_writelane_b32 v34, s10, 6\n\tv_writelane_b32 v34, s11, 7\n\tv_writelane_b32 v34, s8, 8\n\tv_writelane_b32 v34, s9, 9\n\tv_writelane_b32 v34, s4, 10\n\tv_writelane_b32 v34, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v4, v1\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v7\n\tscratch_store_b64 off, v[3:4], s33 offset:44 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v3, v0\n\tscratch_store_b64 off, v[3:4], s33 offset:36 ; 8-byte Folded Spill\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\tv_cmp_eq_u32_e64 s0, v2, s0\n\tv_mov_b32_e32 v4, v6\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v2, v4, s1\n\tv_mov_b32_e32 v3, v5\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v5, v3, s1\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v2, v6\n\tv_cndmask_b32_e64 v4, v2, v4, s0\n\tv_mov_b32_e32 v2, v5\n\tv_cndmask_b32_e64 v2, v2, v3, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b64 off, v[2:3], s33 offset:28 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], 0\n\tv_cmp_ne_u64_e64 s0, v[0:1], s[0:1]\n ; implicit-def: $sgpr4_sgpr5_sgpr6_sgpr7\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tv_mov_b32_e32 v2, s6\n\tv_mov_b32_e32 v3, s7\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_3\n\ts_branch .LBB6_2\n.LBB6_1:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v34, 2\n\tv_readlane_b32 s14, v34, 3\n\tv_readlane_b32 s13, v34, 4\n\tv_readlane_b32 s12, v34, 5\n\tv_readlane_b32 s10, v34, 6\n\tv_readlane_b32 s11, v34, 7\n\tv_readlane_b32 s8, v34, 8\n\tv_readlane_b32 s9, v34, 9\n\tv_readlane_b32 s6, v34, 0\n\tv_readlane_b32 s7, v34, 1\n\tv_readlane_b32 s4, v34, 10\n\tv_readlane_b32 s5, v34, 11\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v3\n\tv_and_b32_e64 v4, v0, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v4, v1\n\ts_mov_b64 s[0:1], 32\n\ts_mov_b32 s2, s1\n\tv_or_b32_e64 v4, v4, s2\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_or_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\tv_mov_b32_e32 v16, 0\n\tscratch_store_b32 off, v16, s33 offset:88 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v16\n\tv_mov_b32_e32 v4, v16\n\tv_mov_b32_e32 v5, v16\n\tv_mov_b32_e32 v6, v16\n\tv_mov_b32_e32 v7, v16\n\tv_mov_b32_e32 v8, v16\n\tv_mov_b32_e32 v9, v16\n\tv_mov_b32_e32 v10, v16\n\tv_mov_b32_e32 v11, v16\n\tv_mov_b32_e32 v12, v16\n\tv_mov_b32_e32 v13, v16\n\tv_mov_b32_e32 v14, v16\n\tv_mov_b32_e32 v15, v16\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_mov_b32_e32 v6, v1\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v4, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v6\n\tv_mov_b32_e32 v2, v5\n\tv_mov_b32_e32 v3, v4\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_branch .LBB6_63\n.LBB6_2:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b64 v[4:5], off, s33 offset:36 ; 8-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:44 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:28 ; 8-byte Folded Reload\n\ts_mov_b64 s[0:1], 2\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v8, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v0, v2\n\tv_and_b32_e64 v2, v0, s0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v8\n\tscratch_store_b64 off, v[2:3], s33 offset:124 ; 8-byte Folded Spill\n\ts_mov_b64 s[0:1], -3\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v2, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v0, v0, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v10, v1\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\ts_mov_b64 s[2:3], 0\n\ts_mov_b32 s0, s3\n\ts_mov_b32 s1, s2\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v9, s1\n\tv_mov_b32_e32 v8, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v10\n\tv_mov_b32_e32 v2, v9\n\tv_mov_b32_e32 v3, v8\n\ts_mov_b32 s0, 0\n\tv_writelane_b32 v34, s0, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:92 ; 16-byte Folded Spill\n\ts_branch .LBB6_4\n.LBB6_3:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b128 v[0:3], off, s33 offset:12 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:72 ; 16-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 14\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_63\n\ts_branch .LBB6_1\n.LBB6_4: ; =>This Loop Header: Depth=1\n ; Child Loop BB6_8 Depth 2\n ; Child Loop BB6_16 Depth 2\n ; Child Loop BB6_24 Depth 2\n ; Child Loop BB6_32 Depth 2\n ; Child Loop BB6_40 Depth 2\n ; Child Loop BB6_48 Depth 2\n ; Child Loop BB6_56 Depth 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 13\n\tscratch_load_b64 v[6:7], off, s33 offset:124 ; 8-byte Folded Reload\n\tscratch_load_b128 v[8:11], off, s33 offset:92 ; 16-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:116 ; 8-byte Folded Reload\n\tscratch_load_b64 v[0:1], off, s33 offset:108 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:176 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[3:4], s33 offset:168 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 15\n\ts_mov_b64 s[2:3], 56\n\tv_cmp_gt_u64_e64 s0, v[3:4], s[2:3]\n\tv_mov_b32_e32 v1, v9\n\tv_mov_b32_e32 v2, v8\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v8, v2\n\tv_mov_b32_e32 v9, v1\n\tv_mov_b32_e32 v0, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or_b32_e64 v0, v0, v5\n\tv_mov_b32_e32 v5, v8\n\tv_or_b32_e64 v5, v5, v6\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mov_b32_e32 v0, v6\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v5\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_cmp_lt_u64_e64 s1, v[3:4], s[2:3]\n\tv_mov_b32_e32 v0, v4\n\ts_mov_b32 s0, s3\n\tv_cndmask_b32_e64 v5, s0, v0, s1\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, s2\n\tv_cndmask_b32_e64 v0, s0, v0, s1\n\tscratch_store_b32 off, v0, s33 offset:164 ; 4-byte Folded Spill\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:156 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:148 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_6\n; %bb.5: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s0, 18\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_11\n\ts_branch .LBB6_8\n.LBB6_6: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 16\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 20\n\tscratch_load_b64 v[0:1], off, s33 offset:140 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:132 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 21\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_12\n; %bb.7: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:212 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:208 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:200 ; 8-byte Folded Spill\n\ts_branch .LBB6_12\n.LBB6_8: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\tv_readlane_b32 s2, v34, 17\n\tscratch_load_b64 v[4:5], off, s33 offset:192 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:176 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 17\n\tv_writelane_b32 v34, s1, 18\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:192 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:220 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_8\n; %bb.9: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.10: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:220 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:184 ; 8-byte Folded Spill\n.LBB6_11: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:184 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:140 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 20\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:132 ; 8-byte Folded Spill\n\ts_branch .LBB6_6\n.LBB6_12: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:212 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:208 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:200 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:256 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:252 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:244 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_14\n; %bb.13: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s0, 25\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_19\n\ts_branch .LBB6_16\n.LBB6_14: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 23\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 27\n\tscratch_load_b64 v[0:1], off, s33 offset:236 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:228 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 28\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_20\n; %bb.15: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:292 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:288 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:280 ; 8-byte Folded Spill\n\ts_branch .LBB6_20\n.LBB6_16: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\tv_readlane_b32 s2, v34, 24\n\tscratch_load_b64 v[4:5], off, s33 offset:272 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:252 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:244 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 24\n\tv_writelane_b32 v34, s1, 25\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:272 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:300 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_16\n; %bb.17: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.18: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:300 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:264 ; 8-byte Folded Spill\n.LBB6_19: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:244 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:264 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:236 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 27\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:228 ; 8-byte Folded Spill\n\ts_branch .LBB6_14\n.LBB6_20: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:292 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:288 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:280 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:336 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:332 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:324 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_22\n; %bb.21: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s0, 0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_27\n\ts_branch .LBB6_24\n.LBB6_22: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v33, 30\n\ts_or_saveexec_b32 s0, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v34, 2\n\tscratch_load_b64 v[0:1], off, s33 offset:316 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:308 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 3\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_28\n; %bb.23: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:372 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:368 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:360 ; 8-byte Folded Spill\n\ts_branch .LBB6_28\n.LBB6_24: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 0\n\tv_readlane_b32 s2, v33, 31\n\tscratch_load_b64 v[4:5], off, s33 offset:352 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:332 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:324 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v33, s2, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tv_writelane_b32 v34, s1, 0\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:352 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:380 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 4\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_24\n; %bb.25: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.26: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:380 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:344 ; 8-byte Folded Spill\n.LBB6_27: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:324 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:344 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:316 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:308 ; 8-byte Folded Spill\n\ts_branch .LBB6_22\n.LBB6_28: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:372 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:368 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:360 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:416 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:412 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:404 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 5\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_30\n; %bb.29: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s0, 7\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 8\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_35\n\ts_branch .LBB6_32\n.LBB6_30: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 5\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 9\n\tscratch_load_b64 v[0:1], off, s33 offset:396 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:388 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 10\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_36\n; %bb.31: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:452 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:448 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:440 ; 8-byte Folded Spill\n\ts_branch .LBB6_36\n.LBB6_32: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 7\n\tv_readlane_b32 s2, v34, 6\n\tscratch_load_b64 v[4:5], off, s33 offset:432 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:412 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:404 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 6\n\tv_writelane_b32 v34, s1, 7\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:432 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:460 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 11\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_32\n; %bb.33: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.34: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:460 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:424 ; 8-byte Folded Spill\n.LBB6_35: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:404 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:424 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:396 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 9\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:388 ; 8-byte Folded Spill\n\ts_branch .LBB6_30\n.LBB6_36: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:452 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:448 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:440 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:496 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:492 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:484 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 12\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_38\n; %bb.37: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s0, 14\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 15\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_43\n\ts_branch .LBB6_40\n.LBB6_38: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 12\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 16\n\tscratch_load_b64 v[0:1], off, s33 offset:476 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:468 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 17\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_44\n; %bb.39: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:532 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:528 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:520 ; 8-byte Folded Spill\n\ts_branch .LBB6_44\n.LBB6_40: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\tv_readlane_b32 s2, v34, 13\n\tscratch_load_b64 v[4:5], off, s33 offset:512 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:492 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:484 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 13\n\tv_writelane_b32 v34, s1, 14\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:512 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:540 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 18\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_40\n; %bb.41: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 18\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.42: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:540 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:504 ; 8-byte Folded Spill\n.LBB6_43: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:484 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:504 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:476 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 16\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:468 ; 8-byte Folded Spill\n\ts_branch .LBB6_38\n.LBB6_44: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 17\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:532 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:528 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:520 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:576 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:572 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:564 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n ; implicit-def: $sgpr4_sgpr5\n\tv_mov_b32_e32 v2, s4\n\tv_mov_b32_e32 v3, s5\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n ; implicit-def: $sgpr1\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_46\n; %bb.45: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s0, 21\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 22\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_51\n\ts_branch .LBB6_48\n.LBB6_46: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 19\n\ts_or_saveexec_b32 s0, s0\n\tv_readlane_b32 s1, v34, 23\n\tscratch_load_b64 v[0:1], off, s33 offset:556 ; 8-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:548 ; 8-byte Folded Reload\n\tv_mov_b32_e32 v2, s1\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 24\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_52\n; %bb.47: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[4:5], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(1)\n\tflat_load_u8 v0, v[4:5]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v3, v[4:5] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v3, v7\n\tv_or_b32_e64 v3, v3, v8\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v6\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v7, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v3\n\tflat_load_u8 v3, v[4:5] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v9, s2, v3\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v3, s0\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v3, v[4:5] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v6, s1, v3\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[7:8], s2, v[6:7]\n\tflat_load_u8 v3, v[4:5] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v9, s1, v3\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v6, v[4:5] offset:6\n\tv_mov_b32_e32 v3, 0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[7:8], s0, v[6:7]\n\tflat_load_u8 v9, v[4:5] offset:7\n ; kill: def $vgpr9 killed $vgpr9 def $vgpr9_vgpr10 killed $exec\n\tv_mov_b32_e32 v10, v3\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[9:10], s0, v[9:10]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v11, v10\n\tv_mov_b32_e32 v6, v8\n\tv_or3_b32 v3, v3, v6, v11\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v6, v9\n\tv_mov_b32_e32 v1, v7\n\tv_or3_b32 v0, v0, v1, v6\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, -8\n\tv_add_nc_u32_e64 v2, v2, s0\n\ts_mov_b64 s[2:3], 8\n\tv_mov_b32_e32 v3, v4\n\ts_mov_b32 s1, s2\n\tv_mov_b32_e32 v4, v5\n\ts_mov_b32 s0, s3\n\tv_add_co_u32 v3, s1, v3, s1\n\tv_add_co_ci_u32_e64 v5, s0, v4, s0, s1\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v5\n\tscratch_store_b64 off, v[3:4], s33 offset:612 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v2, s33 offset:608 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:600 ; 8-byte Folded Spill\n\ts_branch .LBB6_52\n.LBB6_48: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 21\n\tv_readlane_b32 s2, v34, 20\n\tscratch_load_b64 v[4:5], off, s33 offset:592 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:572 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:564 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 20\n\tv_writelane_b32 v34, s1, 21\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:592 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:620 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 25\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_48\n; %bb.49: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 25\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.50: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:620 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:584 ; 8-byte Folded Spill\n.LBB6_51: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:564 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:584 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[2:3], s33 offset:556 ; 8-byte Folded Spill\n\tv_writelane_b32 v34, s0, 23\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[0:1], s33 offset:548 ; 8-byte Folded Spill\n\ts_branch .LBB6_46\n.LBB6_52: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 24\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[1:2], off, s33 offset:612 ; 8-byte Folded Reload\n\tscratch_load_b32 v0, off, s33 offset:608 ; 4-byte Folded Reload\n\tscratch_load_b64 v[3:4], off, s33 offset:600 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[3:4], s33 offset:648 ; 8-byte Folded Spill\n\tscratch_store_b32 off, v0, s33 offset:644 ; 4-byte Folded Spill\n\tscratch_store_b64 off, v[1:2], s33 offset:636 ; 8-byte Folded Spill\n\ts_mov_b32 s0, 8\n\tv_cmp_lt_u32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v34, s1, 26\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_54\n; %bb.53: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\tscratch_load_b32 v0, off, s33 offset:644 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_ne_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 0\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s0, 28\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v34, s0, 29\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB6_59\n\ts_branch .LBB6_56\n.LBB6_54: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 26\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:628 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v34, s0, 30\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB6_60\n; %bb.55: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[2:3], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tflat_load_u8 v0, v[2:3]\n\ts_mov_b32 s1, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s1, v0\n\ts_mov_b32 s0, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s0\n\tflat_load_u8 v4, v[2:3] offset:1\n\ts_mov_b32 s2, 8\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v5, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v4\n\tv_mov_b32_e32 v7, v1\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v4, v4, v7\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v5\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:2\n\ts_mov_b32 s2, 16\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v6, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tflat_load_u8 v4, v[2:3] offset:3\n\ts_mov_b32 s2, 24\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b32_e64 v8, s2, v4\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v4, s0\n ; kill: def $vgpr8 killed $vgpr8 def $vgpr8_vgpr9 killed $exec\n\tv_mov_b32_e32 v9, v4\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:4\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s2, 32\n\tv_lshlrev_b64 v[6:7], s2, v[4:5]\n\tflat_load_u8 v4, v[2:3] offset:5\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v4, s1, v4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, s0\n\ts_mov_b32 s0, 40\n\tv_lshlrev_b64 v[8:9], s0, v[4:5]\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v10, v9\n\tv_mov_b32_e32 v5, v7\n\tv_or3_b32 v4, v4, v5, v10\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v5, v8\n\tv_mov_b32_e32 v1, v6\n\tv_or3_b32 v0, v0, v1, v5\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tflat_load_u8 v4, v[2:3] offset:6\n\tv_mov_b32_e32 v6, 0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v6\n\ts_mov_b32 s0, 48\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[4:5], s0, v[4:5]\n\tflat_load_u8 v2, v[2:3] offset:7\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n\ts_mov_b32 s0, 56\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_lshlrev_b64 v[6:7], s0, v[2:3]\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v8, v7\n\tv_mov_b32_e32 v3, v5\n\tv_or3_b32 v2, v2, v3, v8\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v3, v6\n\tv_mov_b32_e32 v1, v4\n\tv_or3_b32 v0, v0, v1, v3\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tscratch_store_b64 off, v[0:1], s33 offset:672 ; 8-byte Folded Spill\n\ts_branch .LBB6_60\n.LBB6_56: ; Parent Loop BB6_4 Depth=1\n ; => This Inner Loop Header: Depth=2\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 28\n\tv_readlane_b32 s2, v34, 27\n\tscratch_load_b64 v[4:5], off, s33 offset:664 ; 8-byte Folded Reload\n\tscratch_load_b32 v2, off, s33 offset:644 ; 4-byte Folded Reload\n\tscratch_load_b64 v[6:7], off, s33 offset:636 ; 8-byte Folded Reload\n\ts_mov_b32 s1, 0\n\ts_mov_b32 s6, s0\n\ts_mov_b32 s7, s1\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v6\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v1, v7\n\ts_mov_b32 s3, s7\n\tv_add_co_u32 v0, s4, v0, s4\n\tv_add_co_ci_u32_e64 v3, s3, v1, s3, s4\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s3, 0xffff\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_and_b32_e64 v0, s3, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s1\n\ts_mov_b32 s1, 3\n\ts_lshl_b32 s1, s0, s1\n\tv_lshlrev_b64 v[0:1], s1, v[0:1]\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v6, v5\n\tv_or_b32_e64 v3, v3, v6\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v4\n\tv_or_b32_e64 v0, v0, v1\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s1, 1\n\ts_add_i32 s1, s0, s1\n\tv_cmp_eq_u32_e64 s0, s1, v2\n\ts_or_b32 s0, s0, s2\n\ts_mov_b32 s2, s0\n\tv_writelane_b32 v34, s2, 27\n\tv_writelane_b32 v34, s1, 28\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v2, v0\n\tscratch_store_b64 off, v[2:3], s33 offset:664 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[0:1], s33 offset:680 ; 8-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 31\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:4 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_56\n; %bb.57: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 31\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.58: ; in Loop: Header=BB6_4 Depth=1\n\tscratch_load_b64 v[0:1], off, s33 offset:680 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:656 ; 8-byte Folded Spill\n.LBB6_59: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s33 offset:656 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s33 offset:628 ; 8-byte Folded Spill\n\ts_branch .LBB6_54\n.LBB6_60: ; in Loop: Header=BB6_4 Depth=1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v33, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v34, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v33, 2\n\tv_readlane_b32 s14, v33, 3\n\tv_readlane_b32 s13, v33, 4\n\tv_readlane_b32 s12, v33, 5\n\tv_readlane_b32 s10, v33, 6\n\tv_readlane_b32 s11, v33, 7\n\tv_readlane_b32 s8, v33, 8\n\tv_readlane_b32 s9, v33, 9\n\tv_readlane_b32 s6, v33, 0\n\tv_readlane_b32 s7, v33, 1\n\tv_readlane_b32 s4, v33, 10\n\tv_readlane_b32 s5, v33, 11\n\tscratch_load_b64 v[0:1], off, s33 offset:156 ; 8-byte Folded Reload\n\tscratch_load_b32 v31, off, s33 offset:68 ; 4-byte Folded Reload\n\tscratch_load_b64 v[19:20], off, s33 offset:648 ; 8-byte Folded Reload\n\tscratch_load_b64 v[21:22], off, s33 offset:576 ; 8-byte Folded Reload\n\tscratch_load_b64 v[23:24], off, s33 offset:496 ; 8-byte Folded Reload\n\tscratch_load_b64 v[25:26], off, s33 offset:416 ; 8-byte Folded Reload\n\tscratch_load_b64 v[27:28], off, s33 offset:336 ; 8-byte Folded Reload\n\tscratch_load_b64 v[29:30], off, s33 offset:256 ; 8-byte Folded Reload\n\tscratch_load_b64 v[2:3], off, s33 offset:148 ; 8-byte Folded Reload\n\tscratch_load_b64 v[17:18], off, s33 offset:672 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(9)\n\tv_mov_b32_e32 v1, v0\n\ts_mov_b32 s0, 28\n\tv_mov_b32_e32 v0, 2\n\tv_lshl_add_u32 v1, v1, v0, s0\n\ts_mov_b32 s0, 0x1e0\n\tv_and_b32_e64 v5, v1, s0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v1, 0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v1\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\ts_waitcnt vmcnt(1)\n\tv_mov_b32_e32 v1, v3\n\tv_and_b32_e64 v1, v1, s2\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_mov_b32_e32 v4, v2\n\tv_and_b32_e64 v7, v4, s0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v4, v6\n\tv_or_b32_e64 v1, v1, v4\n\tv_mov_b32_e32 v4, v7\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\tv_or_b32_e64 v4, v4, v5\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v1, v4\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr34 : SGPR spill to VGPR lane\n\tv_writelane_b32 v34, s0, 0\n\tv_lshrrev_b64 v[2:3], s0, v[2:3]\n ; kill: def $vgpr2 killed $vgpr2 killed $vgpr2_vgpr3 killed $exec\n\tv_lshrrev_b64 v[3:4], s0, v[29:30]\n\tv_mov_b32_e32 v4, v3\n\tv_lshrrev_b64 v[5:6], s0, v[27:28]\n\tv_mov_b32_e32 v6, v5\n\tv_lshrrev_b64 v[7:8], s0, v[25:26]\n\tv_mov_b32_e32 v8, v7\n\tv_lshrrev_b64 v[9:10], s0, v[23:24]\n\tv_mov_b32_e32 v10, v9\n\tv_lshrrev_b64 v[11:12], s0, v[21:22]\n\tv_mov_b32_e32 v12, v11\n\tv_lshrrev_b64 v[13:14], s0, v[19:20]\n\tv_mov_b32_e32 v14, v13\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[15:16], s0, v[17:18]\n\tv_mov_b32_e32 v16, v15\n\tv_mov_b32_e32 v3, v29\n\tv_mov_b32_e32 v5, v27\n\tv_mov_b32_e32 v7, v25\n\tv_mov_b32_e32 v9, v23\n\tv_mov_b32_e32 v11, v21\n\tv_mov_b32_e32 v13, v19\n\tv_mov_b32_e32 v15, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b64 v[4:5], off, s33 offset:168 ; 8-byte Folded Reload\n\tscratch_load_b64 v[12:13], off, s33 offset:176 ; 8-byte Folded Reload\n\tscratch_load_b64 v[10:11], off, s33 offset:156 ; 8-byte Folded Reload\n\tv_readlane_b32 s1, v33, 15\n\tv_mov_b32_e32 v8, v1\n\tv_mov_b32_e32 v7, v2\n\tv_mov_b32_e32 v6, v3\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1_vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v2, v7\n\tv_mov_b32_e32 v3, v6\n\ts_waitcnt vmcnt(2)\n\tv_mov_b32_e32 v6, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v7, v10\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v5, v11\n\tv_sub_co_u32 v6, s0, v6, v7\n\tv_sub_co_ci_u32_e64 v4, s0, v4, v5, s0\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v4\n\tv_mov_b32_e32 v4, v12\n\tv_mov_b32_e32 v9, v10\n\tv_mov_b32_e32 v5, v13\n\tv_mov_b32_e32 v8, v11\n\tv_add_co_u32 v4, s0, v4, v9\n\tv_add_co_ci_u32_e64 v8, s0, v5, v8, s0\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v8\n\ts_mov_b64 s[2:3], 0\n\tv_cmp_eq_u64_e64 s0, v[6:7], s[2:3]\n\ts_or_b32 s0, s0, s1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v33, s1, 13\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v33, s33 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\tscratch_store_b64 off, v[6:7], s33 offset:116 ; 8-byte Folded Spill\n\tscratch_store_b64 off, v[4:5], s33 offset:108 ; 8-byte Folded Spill\n\tv_mov_b32_e32 v7, v3\n\tv_mov_b32_e32 v6, v2\n\tv_mov_b32_e32 v5, v1\n\tv_mov_b32_e32 v4, v0\n\tscratch_store_b128 off, v[4:7], s33 offset:92 ; 16-byte Folded Spill\n\tscratch_store_b128 off, v[0:3], s33 offset:688 ; 16-byte Folded Spill\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v34, s1, 1\n\ts_or_saveexec_b32 s19, -1\n\tscratch_store_b32 off, v34, s33 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s19\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB6_4\n; %bb.61:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 1\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.62:\n\tscratch_load_b128 v[0:3], off, s33 offset:688 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:12 ; 16-byte Folded Spill\n\ts_branch .LBB6_3\n.LBB6_63:\n\ts_or_saveexec_b32 s19, -1\n\tscratch_load_b32 v34, off, s33 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s19\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v34, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b128 v[3:6], off, s33 offset:72 ; 16-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v0, v4\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v3\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v32, 0\n\tv_readlane_b32 s31, v32, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v32, off, s33 offset:704 ; 4-byte Folded Reload\n\tscratch_load_b32 v33, off, s33 offset:708 ; 4-byte Folded Reload\n\tscratch_load_b32 v34, off, s33 offset:712 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xfffffd30\n\ts_mov_b32 s33, s20\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end6:\n\t.size\t__ockl_fprintf_append_string_n, .Lfunc_end6-__ockl_fprintf_append_string_n\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 11984\n; NumSgprs: 36\n; NumVgprs: 35\n; ScratchSize: 1120\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_fprintf_append_args\n\t.type\t__ockl_fprintf_append_args,@function\n__ockl_fprintf_append_args: ; @__ockl_fprintf_append_args\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s19, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v28, s33 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v29, s33 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 32\n\tv_writelane_b32 v28, s30, 0\n\tv_writelane_b32 v28, s31, 1\n\tscratch_store_b32 off, v17, s33 offset:4 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v17, v2\n\tv_mov_b32_e32 v18, v0\n\tscratch_load_b32 v0, off, s33 offset:4 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v15\n ; kill: def $vgpr20 killed $vgpr16 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v13\n ; kill: def $vgpr20 killed $vgpr14 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v11\n ; kill: def $vgpr20 killed $vgpr12 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v9\n ; kill: def $vgpr20 killed $vgpr10 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v7\n ; kill: def $vgpr20 killed $vgpr8 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v5\n ; kill: def $vgpr20 killed $vgpr6 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v19, v3\n ; kill: def $vgpr20 killed $vgpr4 killed $exec\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s0, v0, s0\n\tv_mov_b32_e32 v1, v19\n\ts_mov_b64 s[2:3], 2\n\ts_mov_b32 s1, s3\n\tv_or_b32_e64 v0, v1, s1\n\tv_mov_b32_e32 v2, v18\n\ts_mov_b32 s1, s2\n\tv_or_b32_e64 v18, v2, s1\n ; kill: def $vgpr18 killed $vgpr18 def $vgpr18_vgpr19 killed $exec\n\tv_mov_b32_e32 v19, v0\n\tv_mov_b32_e32 v0, v19\n\tv_cndmask_b32_e64 v0, v0, v1, s0\n\tv_mov_b32_e32 v1, v18\n\tv_cndmask_b32_e64 v1, v1, v2, s0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\tv_mov_b32_e32 v0, v2\n\ts_mov_b32 s0, 0xffffff1f\n\ts_mov_b32 s1, -1\n\ts_mov_b32 s2, s1\n\tv_and_b32_e64 v0, v0, s2\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n ; kill: def $sgpr0 killed $sgpr0 killed $sgpr0_sgpr1\n\tv_and_b32_e64 v1, v1, s0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v0\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr0\n\tv_mov_b32_e32 v0, 0\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\ts_mov_b32 s0, 5\n\tv_lshlrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v0, v2\n\tv_mov_b32_e32 v19, v18\n\tv_or_b32_e64 v0, v0, v19\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v17\n\tv_or_b32_e64 v17, v1, v2\n ; kill: def $vgpr17 killed $vgpr17 def $vgpr17_vgpr18 killed $exec\n\tv_mov_b32_e32 v18, v0\n\tv_mov_b32_e32 v1, v17\n\ts_mov_b32 s0, 32\n ; implicit-def: $vgpr29 : SGPR spill to VGPR lane\n\tv_writelane_b32 v29, s0, 0\n\tv_lshrrev_b64 v[17:18], s0, v[17:18]\n\tv_mov_b32_e32 v2, v17\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_hostcall_preview@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_hostcall_preview@rel32@hi+12\n\tv_mov_b32_e32 v0, 2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v29, 0\n\tscratch_store_b32 off, v1, s33 ; 4-byte Folded Spill\n ; kill: def $vgpr1 killed $vgpr3 killed $exec\n\tscratch_load_b32 v3, off, s33 ; 4-byte Folded Reload\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n\tv_mov_b32_e32 v1, s1\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v3\n\tv_lshrrev_b64 v[1:2], s0, v[1:2]\n ; kill: def $vgpr1 killed $vgpr1 killed $vgpr1_vgpr2 killed $exec\n\tv_readlane_b32 s30, v28, 0\n\tv_readlane_b32 s31, v28, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v28, off, s33 offset:8 ; 4-byte Folded Reload\n\tscratch_load_b32 v29, off, s33 offset:12 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffffe0\n\ts_mov_b32 s33, s19\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end7:\n\t.size\t__ockl_fprintf_append_args, .Lfunc_end7-__ockl_fprintf_append_args\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 452\n; NumSgprs: 36\n; NumVgprs: 32\n; ScratchSize: 432\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assert_fail ; -- Begin function __assert_fail\n\t.weak\t__assert_fail\n\t.p2align\t2\n\t.type\t__assert_fail,@function\n__assert_fail: ; @__assert_fail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_mov_b32 s27, s33\n\ts_mov_b32 s33, s32\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v35, s33 offset:176 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v36, s33 offset:180 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v37, s33 offset:184 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xc0\n\tv_writelane_b32 v35, s30, 0\n\tv_writelane_b32 v35, s31, 1\n\tscratch_store_b32 off, v31, s33 offset:168 ; 4-byte Folded Spill\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s6, 0\n\tv_writelane_b32 v37, s7, 1\n\tscratch_store_b32 off, v5, s33 offset:164 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v3, s33 offset:160 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v5, v2\n\tscratch_load_b32 v2, off, s33 offset:164 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v7, v0\n\tscratch_load_b32 v0, off, s33 offset:160 ; 4-byte Folded Reload\n\tv_writelane_b32 v37, s15, 2\n\tv_writelane_b32 v37, s14, 3\n\tv_writelane_b32 v37, s13, 4\n\tv_writelane_b32 v37, s12, 5\n\tv_writelane_b32 v37, s10, 6\n\tv_writelane_b32 v37, s11, 7\n\tv_writelane_b32 v37, s8, 8\n\tv_writelane_b32 v37, s9, 9\n\tv_writelane_b32 v37, s4, 10\n\tv_writelane_b32 v37, s5, 11\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v6\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v6, v0\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr7 killed $vgpr7 def $vgpr7_vgpr8 killed $exec\n\tv_mov_b32_e32 v8, v1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n ; implicit-def: $sgpr0_sgpr1\n\ts_mov_b64 s[0:1], src_private_base\n\ts_mov_b32 s2, 32\n\ts_lshr_b64 s[0:1], s[0:1], s2\n\ts_mov_b32 s24, s0\n\tv_writelane_b32 v37, s24, 12\n\ts_mov_b32 s20, s33\n ; kill: def $sgpr20 killed $sgpr20 def $sgpr20_sgpr21\n\ts_mov_b32 s21, s24\n\ts_mov_b64 s[0:1], s[20:21]\n\tv_writelane_b32 v37, s0, 13\n\tv_writelane_b32 v37, s1, 14\n\ts_add_i32 s0, s33, 8\n\ts_mov_b32 s18, s0\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s24\n\ts_mov_b64 s[0:1], s[18:19]\n\tv_writelane_b32 v37, s0, 15\n\tv_writelane_b32 v37, s1, 16\n\ts_add_i32 s0, s33, 16\n\ts_mov_b32 s2, s0\n ; kill: def $sgpr2 killed $sgpr2 def $sgpr2_sgpr3\n\ts_mov_b32 s3, s24\n\ts_mov_b64 s[0:1], s[2:3]\n\tv_writelane_b32 v37, s0, 17\n\tv_writelane_b32 v37, s1, 18\n\ts_add_i32 s1, s33, 24\n\ts_mov_b32 s0, s1\n ; kill: def $sgpr0 killed $sgpr0 def $sgpr0_sgpr1\n\ts_mov_b32 s1, s24\n\ts_mov_b64 s[16:17], s[0:1]\n\tv_writelane_b32 v37, s16, 19\n\tv_writelane_b32 v37, s17, 20\n\ts_add_i32 s17, s33, 32\n\ts_mov_b32 s16, s17\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s24\n\tv_writelane_b32 v37, s16, 21\n\tv_writelane_b32 v37, s17, 22\n\ts_mov_b64 s[22:23], s[16:17]\n\tv_writelane_b32 v37, s22, 23\n\tv_writelane_b32 v37, s23, 24\n\ts_add_i32 s23, s33, 0x50\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 25\n\tv_writelane_b32 v37, s23, 26\n\tv_writelane_b32 v37, s22, 27\n\tv_writelane_b32 v37, s23, 28\n\ts_add_i32 s23, s33, 0x58\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v37, s22, 29\n\tv_writelane_b32 v37, s23, 30\n ; implicit-def: $vgpr36 : SGPR spill to VGPR lane\n\tv_writelane_b32 v37, s22, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:148 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_writelane_b32 v36, s23, 0\n\ts_add_i32 s23, s33, 0x60\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 1\n\tv_writelane_b32 v36, s23, 2\n\ts_add_i32 s23, s33, 0x68\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 3\n\tv_writelane_b32 v36, s23, 4\n\ts_add_i32 s23, s33, 0x70\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 5\n\tv_writelane_b32 v36, s23, 6\n\ts_add_i32 s23, s33, 0x78\n\ts_mov_b32 s22, s23\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s24\n\tv_writelane_b32 v36, s22, 7\n\tv_writelane_b32 v36, s23, 8\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_mov_b32_e32 v0, s20\n\tv_mov_b32_e32 v1, s21\n\tflat_store_b64 v[0:1], v[7:8]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_store_b64 v[0:1], v[5:6]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v4\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s33 offset:156 ; 4-byte Folded Spill\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+35\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+43\n\tglobal_load_b128 v[0:3], v0, s[0:1]\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b128 off, v[0:3], s33 offset:128\n\tscratch_load_b64 v[0:1], off, s33 offset:136\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:45\n\ts_mov_b32 s1, 24\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:46\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:43\n\ts_mov_b32 s0, 8\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:44\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:41\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:42\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:39\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:40\n\tscratch_load_b64 v[0:1], off, s33 offset:128\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v2, v1\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_d16_hi_b8 v[3:4], v2 offset:37\n\tv_lshrrev_b32_e64 v5, s1, v2\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v5 offset:38\n\tv_mov_b32_e32 v3, s16\n\tv_mov_b32_e32 v4, s17\n\tflat_store_b8 v[3:4], v2 offset:35\n\tv_lshrrev_b32_e64 v4, s0, v2\n\tv_mov_b32_e32 v2, s16\n\tv_mov_b32_e32 v3, s17\n\tflat_store_b8 v[2:3], v4 offset:36\n ; kill: def $vgpr0 killed $vgpr0 killed $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_d16_hi_b8 v[1:2], v0 offset:33\n\tv_lshrrev_b32_e64 v3, s1, v0\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v3 offset:34\n\tv_mov_b32_e32 v1, s16\n\tv_mov_b32_e32 v2, s17\n\tflat_store_b8 v[1:2], v0 offset:31\n\tv_lshrrev_b32_e64 v2, s0, v0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b8 v[0:1], v2 offset:32\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+20\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+28\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5] offset:16\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __const.__assert_fail.fmt@rel32@lo+4\n\ts_addc_u32 s1, s1, __const.__assert_fail.fmt@rel32@hi+12\n\ts_load_b128 s[0:3], s[0:1], 0x0\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v5, s3\n\tv_mov_b32_e32 v4, s2\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b128 v[0:1], v[2:5]\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_stderr_begin@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_stderr_begin@rel32@hi+12\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, s33 offset:156 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 25\n\tv_readlane_b32 s3, v37, 26\n\tv_readlane_b32 s0, v37, 29\n\tv_readlane_b32 s1, v37, 30\n\tv_mov_b32_e32 v3, v0\n ; implicit-def: $sgpr4\n ; implicit-def: $sgpr4\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b64 v[0:1], v[3:4]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0)\n\tflat_store_b32 v[0:1], v2\n; %bb.1:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s1, v36, 24\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tv_mov_b32_e32 v3, s1\n\tv_mov_b32_e32 v2, s0\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 9\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_2: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s3, v37, 2\n\tv_readlane_b32 s0, v37, 10\n\tv_readlane_b32 s1, v37, 9\n\tv_writelane_b32 v37, s1, 11\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 12\n\tv_writelane_b32 v37, s0, 13\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 14\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_4\n; %bb.3: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 12\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 13\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_4: ; in Loop: Header=BB8_2 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 14\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 11\n\tv_readlane_b32 s1, v37, 13\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 10\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 9\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 15\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_2\n; %bb.5:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 15\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 23\n\tv_readlane_b32 s3, v36, 24\n\tv_readlane_b32 s4, v37, 1\n\tv_readlane_b32 s5, v37, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, s2\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.7:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 23\n\tv_readlane_b32 s1, v37, 24\n\tv_readlane_b32 s2, v37, 31\n\tv_readlane_b32 s3, v36, 0\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v5, v4\n\tv_mov_b32_e32 v6, v0\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[16:17], s[0:1], s3\n\ts_mov_b32 s2, s16\n\tv_lshrrev_b64 v[0:1], s3, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[5:6], s3, v[5:6]\n ; kill: def $vgpr5 killed $vgpr5 killed $vgpr5_vgpr6 killed $exec\n\ts_mov_b32 s3, s0\n\tv_mov_b32_e32 v0, v2\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tv_mov_b32_e32 v2, s3\n\tv_mov_b32_e32 v3, s2\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.8:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 3\n\tv_readlane_b32 s1, v37, 4\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 16\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_9: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 3\n\tv_readlane_b32 s3, v37, 4\n\tv_readlane_b32 s0, v37, 17\n\tv_readlane_b32 s1, v37, 16\n\tv_writelane_b32 v37, s1, 18\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 19\n\tv_writelane_b32 v37, s0, 20\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 21\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_11\n; %bb.10: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 19\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 20\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_11: ; in Loop: Header=BB8_9 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 21\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 18\n\tv_readlane_b32 s1, v37, 20\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 17\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 16\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 22\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_9\n; %bb.12:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 22\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.13:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 15\n\tv_readlane_b32 s3, v36, 16\n\tv_readlane_b32 s4, v37, 3\n\tv_readlane_b32 s5, v37, 4\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.14:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 15\n\tv_readlane_b32 s3, v37, 16\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_writelane_b32 v36, s0, 23\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\tscratch_store_b32 off, v6, s33 offset:172 ; 4-byte Folded Spill\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tscratch_load_b32 v17, off, s33 offset:172 ; 4-byte Folded Reload\n\tv_readlane_b32 s2, v37, 17\n\tv_readlane_b32 s3, v37, 18\n\tv_readlane_b32 s0, v36, 23\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr1\n ; implicit-def: $sgpr1\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v3, v[0:1]\n\ts_waitcnt vmcnt(1) lgkmcnt(1)\n\tv_lshrrev_b64 v[0:1], s0, v[4:5]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v4\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_args@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_args@rel32@hi+12\n\tv_mov_b32_e32 v2, 1\n\tv_mov_b32_e32 v4, v17\n\tv_mov_b32_e32 v5, v17\n\tv_mov_b32_e32 v6, v17\n\tv_mov_b32_e32 v7, v17\n\tv_mov_b32_e32 v8, v17\n\tv_mov_b32_e32 v9, v17\n\tv_mov_b32_e32 v10, v17\n\tv_mov_b32_e32 v11, v17\n\tv_mov_b32_e32 v12, v17\n\tv_mov_b32_e32 v13, v17\n\tv_mov_b32_e32 v14, v17\n\tv_mov_b32_e32 v15, v17\n\tv_mov_b32_e32 v16, v17\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.15:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\tv_readlane_b32 s1, v37, 6\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 24\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_16: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v37, 5\n\tv_readlane_b32 s3, v37, 6\n\tv_readlane_b32 s0, v37, 25\n\tv_readlane_b32 s1, v37, 24\n\tv_writelane_b32 v37, s1, 26\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 27\n\tv_writelane_b32 v37, s0, 28\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 29\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_18\n; %bb.17: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 27\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 28\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_18: ; in Loop: Header=BB8_16 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 29\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 26\n\tv_readlane_b32 s1, v37, 28\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 25\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 24\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 30\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_16\n; %bb.19:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 30\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.20:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 19\n\tv_readlane_b32 s3, v36, 20\n\tv_readlane_b32 s4, v37, 5\n\tv_readlane_b32 s5, v37, 6\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.21:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 19\n\tv_readlane_b32 s3, v37, 20\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 0\n\ts_swappc_b64 s[30:31], s[0:1]\n\tv_readlane_b32 s0, v37, 27\n\tv_readlane_b32 s1, v37, 28\n\tv_mov_b32_e32 v2, v0\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr2\n ; kill: def $vgpr2 killed $vgpr2 def $vgpr2_vgpr3 killed $exec\n\tv_mov_b32_e32 v3, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b64 v[0:1], v[2:3]\n; %bb.22:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 7\n\tv_readlane_b32 s1, v37, 8\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b64 v[0:1], v[2:3]\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n\tv_writelane_b32 v37, s0, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_23: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s2, v36, 7\n\tv_readlane_b32 s3, v36, 8\n ; implicit-def: $vgpr37 : SGPR spill to VGPR lane\n\tv_readlane_b32 s0, v37, 0\n\tv_readlane_b32 s1, v36, 31\n\tv_writelane_b32 v37, s1, 1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_mov_b64 s[6:7], 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mov_b32_e32 v3, v0\n\ts_mov_b32 s4, s6\n\tv_mov_b32_e32 v2, v1\n\ts_mov_b32 s1, s7\n\tv_add_co_u32 v4, s4, v3, s4\n\tv_add_co_ci_u32_e64 v2, s1, v2, s1, s4\n ; kill: def $vgpr4 killed $vgpr4 def $vgpr4_vgpr5 killed $exec\n\tv_mov_b32_e32 v5, v2\n\tv_mov_b32_e32 v2, s2\n\tv_mov_b32_e32 v3, s3\n\tflat_store_b64 v[2:3], v[4:5]\n\tflat_load_u8 v0, v[0:1]\n\ts_mov_b32 s1, 0\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_ne_u16_e64 s1, v0, s1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 2\n\tv_writelane_b32 v37, s0, 3\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v37, s0, 4\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB8_25\n; %bb.24: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v37, s0, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n.LBB8_25: ; in Loop: Header=BB8_23 Depth=1\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v37, 1\n\tv_readlane_b32 s1, v37, 3\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v37, s1, 0\n\ts_mov_b32 s1, s0\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v36, s1, 31\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v36, s33 offset:144 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v37, s1, 5\n\ts_or_saveexec_b32 s26, -1\n\tscratch_store_b32 off, v37, s33 offset:152 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s26\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB8_23\n; %bb.26:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:152 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v37, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.27:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s0, v36, 31\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v37, 0\n\tv_readlane_b32 s2, v36, 13\n\tv_readlane_b32 s3, v36, 14\n\tv_readlane_b32 s4, v37, 7\n\tv_readlane_b32 s5, v37, 8\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_sub_nc_u32_e64 v2, v0, v1\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n; %bb.28:\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v36, off, s33 offset:144 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_or_saveexec_b32 s26, -1\n\tscratch_load_b32 v37, off, s33 offset:148 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s26\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s15, v37, 2\n\tv_readlane_b32 s14, v37, 3\n\tv_readlane_b32 s13, v37, 4\n\tv_readlane_b32 s12, v37, 5\n\tv_readlane_b32 s10, v37, 6\n\tv_readlane_b32 s11, v37, 7\n\tv_readlane_b32 s8, v37, 8\n\tv_readlane_b32 s9, v37, 9\n\tv_readlane_b32 s6, v37, 0\n\tv_readlane_b32 s7, v37, 1\n\tv_readlane_b32 s4, v37, 10\n\tv_readlane_b32 s5, v37, 11\n\tv_readlane_b32 s0, v37, 31\n\tv_readlane_b32 s1, v36, 0\n\tv_readlane_b32 s2, v37, 13\n\tv_readlane_b32 s3, v37, 14\n\tv_readlane_b32 s16, v37, 27\n\tv_readlane_b32 s17, v37, 28\n\tscratch_load_b32 v31, off, s33 offset:168 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\tflat_load_b64 v[8:9], v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[6:7], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v4, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v0, 31, v4\n\tv_mov_b32_e32 v10, v4\n\tv_mov_b32_e32 v11, v0\n\ts_mov_b32 s0, 32\n\tv_lshrrev_b64 v[0:1], s0, v[8:9]\n\tv_mov_b32_e32 v1, v0\n\tv_lshrrev_b64 v[2:3], s0, v[6:7]\n\tv_mov_b32_e32 v3, v2\n\tv_lshrrev_b64 v[10:11], s0, v[10:11]\n\tv_mov_b32_e32 v5, v10\n\tv_mov_b32_e32 v0, v8\n\tv_mov_b32_e32 v2, v6\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_fprintf_append_string_n@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_fprintf_append_string_n@rel32@hi+12\n\tv_mov_b32_e32 v6, 1\n\ts_swappc_b64 s[30:31], s[0:1]\n\ts_cbranch_execnz .LBB8_30\n; %bb.29:\n\tv_readlane_b32 s30, v35, 0\n\tv_readlane_b32 s31, v35, 1\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v35, off, s33 offset:176 ; 4-byte Folded Reload\n\tscratch_load_b32 v36, off, s33 offset:180 ; 4-byte Folded Reload\n\tscratch_load_b32 v37, off, s33 offset:184 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_add_i32 s32, s32, 0xffffff40\n\ts_mov_b32 s33, s27\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.LBB8_30:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB8_31: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB8_31\n.Lfunc_end8:\n\t.size\t__assert_fail, .Lfunc_end8-__assert_fail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 6148\n; NumSgprs: 36\n; NumVgprs: 38\n; ScratchSize: 1312\n; MemoryBound: 0\n\t.text\n\t.hidden\t__assertfail ; -- Begin function __assertfail\n\t.weak\t__assertfail\n\t.p2align\t2\n\t.type\t__assertfail,@function\n__assertfail: ; @__assertfail\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_cbranch_execnz .LBB9_2\n; %bb.1:\n\ts_setpc_b64 s[30:31]\n.LBB9_2:\n\ts_trap 2\n\ts_sendmsg_rtn_b32 s0, sendmsg(MSG_RTN_GET_DOORBELL)\n\ts_mov_b32 ttmp2, m0\n\ts_waitcnt lgkmcnt(0)\n\ts_and_b32 s0, s0, 0x3ff\n\ts_or_b32 s0, s0, 0x400\n\ts_mov_b32 m0, s0\n\ts_sendmsg sendmsg(MSG_INTERRUPT)\n\ts_mov_b32 m0, ttmp2\n.LBB9_3: ; =>This Inner Loop Header: Depth=1\n\ts_sethalt 5\n\ts_branch .LBB9_3\n.Lfunc_end9:\n\t.size\t__assertfail, .Lfunc_end9-__assertfail\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 64\n; NumSgprs: 32\n; NumVgprs: 0\n; ScratchSize: 0\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_size\n\t.type\t__ockl_get_local_size,@function\n__ockl_get_local_size: ; @__ockl_get_local_size\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v4, s32 offset:104 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr4 : SGPR spill to VGPR lane\n\tv_writelane_b32 v4, s14, 0\n\tv_writelane_b32 v4, s13, 1\n\tv_writelane_b32 v4, s12, 2\n\tv_writelane_b32 v4, s8, 3\n\tv_writelane_b32 v4, s9, 4\n\tv_writelane_b32 v4, s4, 5\n\tv_writelane_b32 v4, s5, 6\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n; %bb.1:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 7\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_4\n; %bb.2:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr2_sgpr3\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v4, s1, 8\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_10\n; %bb.3:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 9\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_20\n\ts_branch .LBB10_15\n.LBB10_4:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 7\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:8 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 10\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_25\n; %bb.5:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b64 s[2:3], 1\n\tv_mov_b32_e32 v0, 1\n\tv_mov_b32_e32 v1, 0\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v4, s0, 11\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB10_24\n; %bb.6:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 12\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB10_9\n.LBB10_7:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 12\n\tscratch_load_b64 v[0:1], off, s32 offset:48 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB10_23\n; %bb.8:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 2\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:4\n\ts_load_b32 s0, s[2:3], 0xc\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:56 ; 8-byte Folded Spill\n\ts_branch .LBB10_23\n.LBB10_9:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 2\n\ts_load_b32 s3, s[0:1], 0x0\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 18\n\ts_mov_b32 s2, 12\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:48 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 12\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB10_7\n.LBB10_10:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 8\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:16 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v4, s0, 13\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB10_22\n; %bb.11:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 14\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB10_14\n.LBB10_12:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 14\n\tscratch_load_b64 v[0:1], off, s32 offset:72 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB10_21\n; %bb.13:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 1\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:6\n\ts_load_b32 s0, s[2:3], 0x10\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:80 ; 8-byte Folded Spill\n\ts_branch .LBB10_21\n.LBB10_14:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 1\n\ts_load_b32 s3, s[0:1], 0x4\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 20\n\ts_mov_b32 s2, 14\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:72 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 14\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB10_12\n.LBB10_15:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __oclc_ABI_version@rel32@lo+4\n\ts_addc_u32 s1, s1, __oclc_ABI_version@rel32@hi+12\n\ts_load_b32 s1, s[0:1], 0x0\n\ts_mov_b32 s0, -1\n ; implicit-def: $sgpr2_sgpr3\n\ts_mov_b32 s4, 0x1f3\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_gt_i32 s1, s4\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\ts_waitcnt vmcnt(0)\n\tv_writelane_b32 v4, s0, 15\n\ts_mov_b32 s7, exec_lo\n\ts_mov_b32 exec_lo, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_cbranch_scc1 .LBB10_18\n.LBB10_16:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 15\n\tscratch_load_b64 v[0:1], off, s32 offset:88 ; 8-byte Folded Reload\n\tv_cndmask_b32_e64 v2, 0, 1, s0\n\ts_mov_b32 s0, 1\n ; implicit-def: $sgpr1\n\tv_cmp_ne_u32_e64 s0, v2, s0\n\ts_and_b32 vcc_lo, exec_lo, s0\n ; kill: def $vgpr0_vgpr1 killed $vgpr0_vgpr1 killed $exec\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_cbranch_vccnz .LBB10_19\n; %bb.17:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s1, v4, 0\n\tv_readlane_b32 s2, v4, 5\n\tv_readlane_b32 s3, v4, 6\n\tv_mov_b32_e32 v0, 0\n\tglobal_load_u16 v1, v0, s[2:3] offset:8\n\ts_load_b32 s0, s[2:3], 0x14\n ; implicit-def: $sgpr2\n\ts_waitcnt vmcnt(0)\n\tv_mul_lo_u32 v0, s1, v1\n\ts_waitcnt lgkmcnt(0)\n\tv_sub_nc_u32_e64 v0, s0, v0\n ; implicit-def: $sgpr0\n\tv_min_u32_e64 v0, v0, v1\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, 0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr0_sgpr1\n\tscratch_store_b64 off, v[0:1], s32 offset:96 ; 8-byte Folded Spill\n\ts_branch .LBB10_19\n.LBB10_18:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 3\n\tv_readlane_b32 s1, v4, 4\n\tv_readlane_b32 s2, v4, 0\n\ts_load_b32 s3, s[0:1], 0x8\n\ts_waitcnt lgkmcnt(0)\n\ts_cmp_lt_u32 s2, s3\n\ts_mov_b32 s3, 22\n\ts_mov_b32 s2, 16\n\ts_cselect_b32 s2, s2, s3\n\tv_mov_b32_e32 v0, s2\n\tglobal_load_u16 v0, v0, s[0:1]\n\ts_mov_b32 s0, 0xffff\n ; implicit-def: $sgpr1\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n ; implicit-def: $sgpr0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v2, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n ; implicit-def: $sgpr2_sgpr3\n\tscratch_store_b64 off, v[0:1], s32 offset:88 ; 8-byte Folded Spill\n\tv_writelane_b32 v4, s0, 15\n\ts_or_saveexec_b32 s7, -1\n\tscratch_store_b32 off, v4, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s7\n\ts_branch .LBB10_16\n.LBB10_19:\n\tscratch_load_b64 v[0:1], off, s32 offset:96 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:24 ; 8-byte Folded Spill\n.LBB10_20:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 9\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:24 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:16 ; 8-byte Folded Spill\n\ts_branch .LBB10_10\n.LBB10_21:\n\tscratch_load_b64 v[0:1], off, s32 offset:80 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:64 ; 8-byte Folded Spill\n.LBB10_22:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 13\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:64 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:8 ; 8-byte Folded Spill\n\ts_branch .LBB10_4\n.LBB10_23:\n\tscratch_load_b64 v[0:1], off, s32 offset:56 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:40 ; 8-byte Folded Spill\n.LBB10_24:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 11\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[0:1], off, s32 offset:40 ; 8-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b64 off, v[0:1], s32 offset:32 ; 8-byte Folded Spill\n.LBB10_25:\n\ts_or_saveexec_b32 s7, -1\n\tscratch_load_b32 v4, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s7\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v4, 10\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b64 v[2:3], off, s32 offset:32 ; 8-byte Folded Reload\n\ts_mov_b32 s0, 32\n\ts_waitcnt vmcnt(0)\n\tv_lshrrev_b64 v[0:1], s0, v[2:3]\n\tv_mov_b32_e32 v1, v0\n\tv_mov_b32_e32 v0, v2\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v4, off, s32 offset:104 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end10:\n\t.size\t__ockl_get_local_size, .Lfunc_end10-__ockl_get_local_size\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 2384\n; NumSgprs: 35\n; NumVgprs: 5\n; ScratchSize: 112\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_group_id\n\t.type\t__ockl_get_group_id,@function\n__ockl_get_group_id: ; @__ockl_get_group_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s14, 0\n\tv_writelane_b32 v2, s13, 1\n\tv_writelane_b32 v2, s12, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n; %bb.1:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_10\n\ts_branch .LBB11_9\n.LBB11_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 6\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 7\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB11_12\n; %bb.6:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_branch .LBB11_12\n.LBB11_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 8\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB11_11\n; %bb.8:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB11_11\n.LBB11_9:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n.LBB11_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB11_7\n.LBB11_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 8\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:8 ; 4-byte Folded Spill\n\ts_branch .LBB11_4\n.LBB11_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB11_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end11:\n\t.size\t__ockl_get_group_id, .Lfunc_end11-__ockl_get_group_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 988\n; NumSgprs: 33\n; NumVgprs: 3\n; ScratchSize: 40\n; MemoryBound: 0\n\t.text\n\t.p2align\t2 ; -- Begin function __ockl_get_local_id\n\t.type\t__ockl_get_local_id,@function\n__ockl_get_local_id: ; @__ockl_get_local_id\n; %bb.0:\n\ts_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_store_b32 off, v2, s32 offset:36 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s0\n\tscratch_store_b32 off, v31, s32 offset:8 ; 4-byte Folded Spill\n\tscratch_store_b32 off, v0, s32 offset:4 ; 4-byte Folded Spill\n; %bb.1:\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n ; implicit-def: $vgpr2 : SGPR spill to VGPR lane\n\tv_writelane_b32 v2, s1, 0\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_4\n; %bb.2:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 1\n\ts_waitcnt vmcnt(0)\n\tv_cmp_gt_i32_e64 s0, v0, s0\n ; implicit-def: $sgpr1\n\tv_mov_b32_e32 v0, s1\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_mov_b32 s1, exec_lo\n\ts_and_b32 s0, s1, s0\n\ts_xor_b32 s1, s0, s1\n\tv_writelane_b32 v2, s1, 1\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_7\n; %bb.3:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 2\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\ts_mov_b32 s0, 0\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 2\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_10\n\ts_branch .LBB12_9\n.LBB12_4:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 0\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:12 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 3\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_13\n; %bb.5:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\tscratch_load_b32 v0, off, s32 offset:4 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0\n\ts_waitcnt vmcnt(0)\n\tv_cmp_eq_u32_e64 s1, v0, s0\n\tv_mov_b32_e32 v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v2, s0, 4\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB12_12\n; %bb.6:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_mov_b32 s0, 0x3ff\n\ts_waitcnt vmcnt(0)\n\tv_and_b32_e64 v0, v0, s0\n\tscratch_store_b32 off, v0, s32 offset:28 ; 4-byte Folded Spill\n\ts_branch .LBB12_12\n.LBB12_7:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 1\n\ts_or_saveexec_b32 s0, s0\n\tscratch_load_b32 v0, off, s32 offset:16 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_and_b32 s0, exec_lo, s0\n\tv_writelane_b32 v2, s0, 5\n\ts_or_saveexec_b32 s3, -1\n\tscratch_store_b32 off, v2, s32 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s3\n\ts_xor_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execz .LBB12_11\n; %bb.8:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 10, 10\n\tscratch_store_b32 off, v0, s32 offset:32 ; 4-byte Folded Spill\n\ts_branch .LBB12_11\n.LBB12_9:\n\tscratch_load_b32 v0, off, s32 offset:8 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tv_bfe_u32 v0, v0, 20, 10\n\tscratch_store_b32 off, v0, s32 offset:20 ; 4-byte Folded Spill\n.LBB12_10:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 2\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:20 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:16 ; 4-byte Folded Spill\n\ts_branch .LBB12_7\n.LBB12_11:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:32 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:12 ; 4-byte Folded Spill\n\ts_branch .LBB12_4\n.LBB12_12:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 4\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:28 ; 4-byte Folded Reload\n\ts_waitcnt vmcnt(0)\n\tscratch_store_b32 off, v0, s32 offset:24 ; 4-byte Folded Spill\n.LBB12_13:\n\ts_or_saveexec_b32 s3, -1\n\tscratch_load_b32 v2, off, s32 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s3\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v2, 3\n\ts_or_b32 exec_lo, exec_lo, s0\n\tscratch_load_b32 v0, off, s32 offset:24 ; 4-byte Folded Reload\n\tv_mov_b32_e32 v1, 0\n\ts_xor_saveexec_b32 s0, -1\n\tscratch_load_b32 v2, off, s32 offset:36 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s0\n\ts_waitcnt vmcnt(0)\n\ts_setpc_b64 s[30:31]\n.Lfunc_end12:\n\t.size\t__ockl_get_local_id, .Lfunc_end12-__ockl_get_local_id\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Function info:\n; codeLenInByte = 912\n; NumSgprs: 33\n; NumVgprs: 32\n; ScratchSize: 44\n; MemoryBound: 0\n\t.text\n\t.protected\t_Z7findMaxPiS_i ; -- Begin function _Z7findMaxPiS_i\n\t.globl\t_Z7findMaxPiS_i\n\t.p2align\t8\n\t.type\t_Z7findMaxPiS_i,@function\n_Z7findMaxPiS_i: ; @_Z7findMaxPiS_i\n; %bb.0:\n\ts_mov_b32 s32, 0x70\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_writelane_b32 v10, s15, 0\n\ts_mov_b32 s6, s14\n\tv_readlane_b32 s14, v10, 0\n\tv_writelane_b32 v10, s6, 1\n\ts_mov_b32 s12, s13\n\tv_readlane_b32 s13, v10, 1\n\tv_writelane_b32 v10, s12, 2\n\ts_mov_b64 s[10:11], s[4:5]\n\tv_writelane_b32 v10, s10, 3\n\tv_writelane_b32 v10, s11, 4\n\tv_writelane_b32 v10, s2, 5\n\tv_writelane_b32 v10, s3, 6\n\ts_mov_b64 s[4:5], s[0:1]\n\tv_readlane_b32 s0, v10, 5\n\tv_readlane_b32 s1, v10, 6\n\tv_writelane_b32 v10, s4, 7\n\tv_writelane_b32 v10, s5, 8\n\tv_mov_b32_e32 v31, v0\n\tscratch_store_b32 off, v31, off offset:96 ; 4-byte Folded Spill\n\ts_load_b64 s[24:25], s[0:1], 0x0\n\ts_load_b64 s[20:21], s[0:1], 0x8\n\ts_load_b32 s2, s[0:1], 0x10\n\ts_mov_b64 s[6:7], src_private_base\n\ts_mov_b32 s3, 32\n\ts_lshr_b64 s[6:7], s[6:7], s3\n\ts_mov_b32 s3, s6\n\tv_writelane_b32 v10, s3, 9\n\ts_mov_b32 s22, 32\n ; kill: def $sgpr22 killed $sgpr22 def $sgpr22_sgpr23\n\ts_mov_b32 s23, s3\n\ts_mov_b32 s18, 40\n ; kill: def $sgpr18 killed $sgpr18 def $sgpr18_sgpr19\n\ts_mov_b32 s19, s3\n\ts_mov_b32 s16, 48\n ; kill: def $sgpr16 killed $sgpr16 def $sgpr16_sgpr17\n\ts_mov_b32 s17, s3\n\tv_writelane_b32 v10, s16, 10\n\tv_writelane_b32 v10, s17, 11\n\ts_mov_b64 s[6:7], s[16:17]\n\tv_writelane_b32 v10, s6, 12\n\tv_writelane_b32 v10, s7, 13\n\ts_mov_b32 s8, 56\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s3\n\ts_mov_b64 s[6:7], s[8:9]\n\tv_writelane_b32 v10, s6, 14\n\tv_writelane_b32 v10, s7, 15\n\ts_mov_b32 s6, 64\n ; kill: def $sgpr6 killed $sgpr6 def $sgpr6_sgpr7\n\ts_mov_b32 s7, s3\n\ts_mov_b64 s[26:27], s[6:7]\n\tv_writelane_b32 v10, s26, 16\n\tv_writelane_b32 v10, s27, 17\n\ts_mov_b32 s26, 0x44\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v10, s26, 18\n\tv_writelane_b32 v10, s27, 19\n\tv_writelane_b32 v10, s26, 20\n\tv_writelane_b32 v10, s27, 21\n\ts_mov_b32 s26, 0x48\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v10, s26, 22\n\tv_writelane_b32 v10, s27, 23\n\tv_writelane_b32 v10, s26, 24\n\tv_writelane_b32 v10, s27, 25\n\ts_mov_b32 s26, 0x4c\n ; kill: def $sgpr26 killed $sgpr26 def $sgpr26_sgpr27\n\ts_mov_b32 s27, s3\n\tv_writelane_b32 v10, s26, 26\n\tv_writelane_b32 v10, s27, 27\n\tv_writelane_b32 v10, s26, 28\n\tv_writelane_b32 v10, s27, 29\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\ts_waitcnt lgkmcnt(0)\n\tv_mov_b32_e32 v2, s24\n\tv_mov_b32_e32 v3, s25\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s22\n\tv_mov_b32_e32 v1, s23\n\tflat_load_b64 v[4:5], v[0:1]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tv_mov_b32_e32 v2, s20\n\tv_mov_b32_e32 v3, s21\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s18\n\tv_mov_b32_e32 v1, s19\n\tflat_load_b64 v[2:3], v[0:1]\n\tv_mov_b32_e32 v0, s16\n\tv_mov_b32_e32 v1, s17\n\ts_waitcnt vmcnt(1) lgkmcnt(2)\n\tflat_store_b64 v[0:1], v[4:5]\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\ts_waitcnt vmcnt(0) lgkmcnt(1)\n\tflat_store_b64 v[0:1], v[2:3]\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tv_mov_b32_e32 v2, s2\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b64 s[6:7], 24\n\ts_mov_b32 s2, s0\n\ts_mov_b32 s0, s1\n\ts_mov_b32 s3, s6\n\ts_mov_b32 s1, s7\n\ts_add_u32 s8, s2, s3\n\ts_addc_u32 s0, s0, s1\n ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9\n\ts_mov_b32 s9, s0\n\tv_writelane_b32 v10, s8, 30\n\tv_writelane_b32 v10, s9, 31\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:84 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_size@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_size@rel32@hi+12\n\tv_mov_b32_e32 v0, 0\n\tscratch_store_b32 off, v0, off offset:88 ; 4-byte Folded Spill\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_readlane_b32 s8, v10, 30\n\tv_readlane_b32 s9, v10, 31\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:88 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:100 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v3, v1\n\tscratch_load_b32 v1, off, off offset:100 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v3\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v3, v1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_group_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_group_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v31, off, off offset:96 ; 4-byte Folded Reload\n\tv_readlane_b32 s14, v10, 0\n\tv_readlane_b32 s13, v10, 1\n\tv_readlane_b32 s12, v10, 2\n\tv_readlane_b32 s10, v10, 3\n\tv_readlane_b32 s11, v10, 4\n\tv_readlane_b32 s8, v10, 30\n\tv_readlane_b32 s9, v10, 31\n\tv_readlane_b32 s4, v10, 7\n\tv_readlane_b32 s5, v10, 8\n\tv_mov_b32_e32 v2, v0\n\tscratch_load_b32 v0, off, off offset:88 ; 4-byte Folded Reload\n\tscratch_store_b32 off, v2, off offset:92 ; 4-byte Folded Spill\n\tv_mov_b32_e32 v4, v1\n\tscratch_load_b32 v1, off, off offset:92 ; 4-byte Folded Reload\n ; implicit-def: $sgpr0\n ; implicit-def: $sgpr0\n ; kill: def $vgpr1 killed $vgpr1 def $vgpr1_vgpr2 killed $exec\n\tv_mov_b32_e32 v2, v4\n\ts_waitcnt vmcnt(0)\n\tv_mov_b32_e32 v4, v1\n\ts_getpc_b64 s[0:1]\n\ts_add_u32 s0, s0, __ockl_get_local_id@rel32@lo+4\n\ts_addc_u32 s1, s1, __ockl_get_local_id@rel32@hi+12\n ; implicit-def: $sgpr6_sgpr7\n ; implicit-def: $sgpr15\n\ts_swappc_b64 s[30:31], s[0:1]\n\tscratch_load_b32 v2, off, off offset:88 ; 4-byte Folded Reload\n\tv_readlane_b32 s6, v10, 18\n\tv_readlane_b32 s7, v10, 19\n\tv_readlane_b32 s4, v10, 10\n\tv_readlane_b32 s5, v10, 11\n\tv_readlane_b32 s2, v10, 22\n\tv_readlane_b32 s3, v10, 23\n\tv_readlane_b32 s0, v10, 26\n\tv_readlane_b32 s1, v10, 27\n\tv_mov_b32_e32 v5, v1\n ; implicit-def: $sgpr8\n ; implicit-def: $sgpr8\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v5\n\tv_mov_b32_e32 v5, v0\n ; implicit-def: $sgpr8\n ; implicit-def: $sgpr9\n ; implicit-def: $sgpr9\n\tv_mov_b32_e32 v0, s8\n ; kill: def $vgpr5 killed $vgpr5 def $vgpr5_vgpr6 killed $exec\n\tv_mov_b32_e32 v6, v0\n\tv_mad_u64_u32 v[0:1], s8, v3, v4, v[5:6]\n\tv_mov_b32_e32 v3, v0\n\tv_mov_b32_e32 v0, s6\n\tv_mov_b32_e32 v1, s7\n\tflat_store_b32 v[0:1], v3\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b64 v[0:1], v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_load_b32 v3, v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v3\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s0, 0\n ; implicit-def: $sgpr1\n ; implicit-def: $vgpr10 : SGPR spill to VGPR lane\n\tv_writelane_b32 v10, s0, 0\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:80 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n.LBB13_1: ; =>This Inner Loop Header: Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v9, off, off offset:84 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(1)\n\tv_readlane_b32 s2, v9, 16\n\tv_readlane_b32 s3, v9, 17\n\tv_readlane_b32 s4, v9, 28\n\tv_readlane_b32 s5, v9, 29\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 1\n\tv_readlane_b32 s1, v10, 0\n\tv_writelane_b32 v10, s1, 2\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v1, s2\n\tv_mov_b32_e32 v2, s3\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_lt_i32_e64 s1, v0, v1\n\ts_mov_b32 s2, -1\n\ts_or_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 3\n\tv_writelane_b32 v10, s0, 4\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 5\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:80 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_4\n; %bb.2: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v9, off, off offset:84 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v9, 24\n\tv_readlane_b32 s1, v9, 25\n\tv_readlane_b32 s2, v9, 28\n\tv_readlane_b32 s3, v9, 29\n\tv_readlane_b32 s4, v9, 16\n\tv_readlane_b32 s5, v9, 17\n\tv_readlane_b32 s6, v9, 20\n\tv_readlane_b32 s7, v9, 21\n\tv_readlane_b32 s8, v9, 12\n\tv_readlane_b32 s9, v9, 13\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v3, s6\n\tv_mov_b32_e32 v4, s7\n\tflat_load_b32 v6, v[3:4]\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b32 v0, v[3:4]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v5, v[3:4]\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v3, s2\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mad_u64_u32 v[3:4], s2, v0, v5, v[6:7]\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s2, 2\n\tv_lshlrev_b64 v[4:5], s2, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s2, v0, v3\n\tv_add_co_ci_u32_e64 v2, s2, v1, v2, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v0, v[0:1]\n\tv_mov_b32_e32 v2, s1\n\tv_mov_b32_e32 v1, s0\n\tflat_load_b32 v1, v[1:2]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_cmp_gt_i32_e64 s1, v0, v1\n\ts_mov_b32 s0, exec_lo\n\tv_writelane_b32 v10, s0, 6\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:80 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_b32 s0, s0, s1\n\ts_mov_b32 exec_lo, s0\n\ts_cbranch_execz .LBB13_5\n; %bb.3: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:84 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 24\n\tv_readlane_b32 s1, v10, 25\n\tv_readlane_b32 s2, v10, 28\n\tv_readlane_b32 s3, v10, 29\n\tv_readlane_b32 s4, v10, 16\n\tv_readlane_b32 s5, v10, 17\n\tv_readlane_b32 s6, v10, 20\n\tv_readlane_b32 s7, v10, 21\n\tv_readlane_b32 s8, v10, 12\n\tv_readlane_b32 s9, v10, 13\n\tv_mov_b32_e32 v0, s8\n\tv_mov_b32_e32 v1, s9\n\tflat_load_b64 v[1:2], v[0:1]\n\tv_mov_b32_e32 v3, s6\n\tv_mov_b32_e32 v4, s7\n\tflat_load_b32 v6, v[3:4]\n\tv_mov_b32_e32 v3, s4\n\tv_mov_b32_e32 v4, s5\n\tflat_load_b32 v0, v[3:4]\n\tv_mov_b32_e32 v4, s3\n\tv_mov_b32_e32 v3, s2\n\tflat_load_b32 v5, v[3:4]\n ; implicit-def: $sgpr2\n ; implicit-def: $sgpr3\n ; implicit-def: $sgpr3\n\tv_mov_b32_e32 v3, s2\n ; kill: def $vgpr6 killed $vgpr6 def $vgpr6_vgpr7 killed $exec\n\tv_mov_b32_e32 v7, v3\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_mad_u64_u32 v[3:4], s2, v0, v5, v[6:7]\n ; kill: def $vgpr3 killed $vgpr3 killed $vgpr3_vgpr4 killed $exec\n\tv_ashrrev_i32_e64 v0, 31, v3\n ; kill: def $vgpr3 killed $vgpr3 def $vgpr3_vgpr4 killed $exec\n\tv_mov_b32_e32 v4, v0\n\ts_mov_b32 s2, 2\n\tv_lshlrev_b64 v[4:5], s2, v[3:4]\n\tv_mov_b32_e32 v0, v1\n\tv_mov_b32_e32 v3, v4\n\tv_mov_b32_e32 v1, v2\n\tv_mov_b32_e32 v2, v5\n\tv_add_co_u32 v0, s2, v0, v3\n\tv_add_co_ci_u32_e64 v2, s2, v1, v2, s2\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v2\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tflat_store_b32 v[0:1], v2\n\ts_branch .LBB13_5\n.LBB13_4: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 5\n\ts_or_b32 exec_lo, exec_lo, s0\n\tv_readlane_b32 s2, v10, 2\n\tv_readlane_b32 s1, v10, 4\n\ts_mov_b32 s0, s1\n\ts_and_b32 s0, exec_lo, s0\n\ts_or_b32 s0, s0, s2\n\tv_writelane_b32 v10, s1, 1\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 0\n\ts_mov_b32 s1, s0\n\tv_writelane_b32 v10, s1, 7\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:80 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_and_not1_b32 exec_lo, exec_lo, s0\n\ts_cbranch_execnz .LBB13_1\n\ts_branch .LBB13_7\n.LBB13_5: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 6\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.6: ; in Loop: Header=BB13_1 Depth=1\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v9, off, off offset:84 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 3\n\tv_readlane_b32 s2, v9, 28\n\tv_readlane_b32 s3, v9, 29\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b32 v0, v[0:1]\n\ts_mov_b32 s1, 1\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_add_nc_u32_e64 v2, v0, s1\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_store_b32 v[0:1], v2\n\ts_mov_b32 s1, 0\n\ts_and_not1_b32 s0, s0, exec_lo\n\tv_writelane_b32 v10, s0, 4\n\ts_or_saveexec_b32 s28, -1\n\tscratch_store_b32 off, v10, off offset:80 ; 4-byte Folded Spill\n\ts_mov_b32 exec_lo, s28\n\ts_branch .LBB13_4\n.LBB13_7:\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:80 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 7\n\ts_or_b32 exec_lo, exec_lo, s0\n; %bb.8:\n\ts_or_saveexec_b32 s28, -1\n\tscratch_load_b32 v10, off, off offset:84 ; 4-byte Folded Reload\n\ts_mov_b32 exec_lo, s28\n\ts_waitcnt vmcnt(0)\n\tv_readlane_b32 s0, v10, 20\n\tv_readlane_b32 s1, v10, 21\n\tv_readlane_b32 s2, v10, 14\n\tv_readlane_b32 s3, v10, 15\n\tv_readlane_b32 s4, v10, 24\n\tv_readlane_b32 s5, v10, 25\n\tv_mov_b32_e32 v0, s4\n\tv_mov_b32_e32 v1, s5\n\tflat_load_b32 v2, v[0:1]\n\tv_mov_b32_e32 v0, s2\n\tv_mov_b32_e32 v1, s3\n\tflat_load_b64 v[7:8], v[0:1]\n\tv_mov_b32_e32 v0, s0\n\tv_mov_b32_e32 v1, s1\n\tflat_load_b32 v0, v[0:1]\n\ts_waitcnt vmcnt(0) lgkmcnt(0)\n\tv_ashrrev_i32_e64 v3, 31, v0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\ts_mov_b32 s0, 2\n\tv_lshlrev_b64 v[5:6], s0, v[0:1]\n\tv_mov_b32_e32 v0, v7\n\tv_mov_b32_e32 v4, v5\n\tv_mov_b32_e32 v1, v8\n\tv_mov_b32_e32 v3, v6\n\tv_add_co_u32 v0, s0, v0, v4\n\tv_add_co_ci_u32_e64 v3, s0, v1, v3, s0\n ; kill: def $vgpr0 killed $vgpr0 def $vgpr0_vgpr1 killed $exec\n\tv_mov_b32_e32 v1, v3\n\tflat_store_b32 v[0:1], v2\n\ts_endpgm\n\t.section\t.rodata,\"a\",@progbits\n\t.p2align\t6, 0x0\n\t.amdhsa_kernel _Z7findMaxPiS_i\n\t\t.amdhsa_group_segment_fixed_size 0\n\t\t.amdhsa_private_segment_fixed_size 224\n\t\t.amdhsa_kernarg_size 280\n\t\t.amdhsa_user_sgpr_count 13\n\t\t.amdhsa_user_sgpr_dispatch_ptr 1\n\t\t.amdhsa_user_sgpr_queue_ptr 0\n\t\t.amdhsa_user_sgpr_kernarg_segment_ptr 1\n\t\t.amdhsa_user_sgpr_dispatch_id 1\n\t\t.amdhsa_user_sgpr_private_segment_size 0\n\t\t.amdhsa_wavefront_size32 1\n\t\t.amdhsa_uses_dynamic_stack 0\n\t\t.amdhsa_enable_private_segment 1\n\t\t.amdhsa_system_sgpr_workgroup_id_x 1\n\t\t.amdhsa_system_sgpr_workgroup_id_y 1\n\t\t.amdhsa_system_sgpr_workgroup_id_z 1\n\t\t.amdhsa_system_sgpr_workgroup_info 0\n\t\t.amdhsa_system_vgpr_workitem_id 2\n\t\t.amdhsa_next_free_vgpr 32\n\t\t.amdhsa_next_free_sgpr 33\n\t\t.amdhsa_float_round_mode_32 0\n\t\t.amdhsa_float_round_mode_16_64 0\n\t\t.amdhsa_float_denorm_mode_32 3\n\t\t.amdhsa_float_denorm_mode_16_64 3\n\t\t.amdhsa_dx10_clamp 1\n\t\t.amdhsa_ieee_mode 1\n\t\t.amdhsa_fp16_overflow 0\n\t\t.amdhsa_workgroup_processor_mode 1\n\t\t.amdhsa_memory_ordered 1\n\t\t.amdhsa_forward_progress 0\n\t\t.amdhsa_shared_vgpr_count 0\n\t\t.amdhsa_exception_fp_ieee_invalid_op 0\n\t\t.amdhsa_exception_fp_denorm_src 0\n\t\t.amdhsa_exception_fp_ieee_div_zero 0\n\t\t.amdhsa_exception_fp_ieee_overflow 0\n\t\t.amdhsa_exception_fp_ieee_underflow 0\n\t\t.amdhsa_exception_fp_ieee_inexact 0\n\t\t.amdhsa_exception_int_div_zero 0\n\t.end_amdhsa_kernel\n\t.text\n.Lfunc_end13:\n\t.size\t_Z7findMaxPiS_i, .Lfunc_end13-_Z7findMaxPiS_i\n ; -- End function\n\t.section\t.AMDGPU.csdata,\"\",@progbits\n; Kernel info:\n; codeLenInByte = 2524\n; NumSgprs: 35\n; NumVgprs: 32\n; ScratchSize: 224\n; MemoryBound: 0\n; FloatMode: 240\n; IeeeMode: 1\n; LDSByteSize: 0 bytes/workgroup (compile time only)\n; SGPRBlocks: 4\n; VGPRBlocks: 3\n; NumSGPRsForWavesPerEU: 35\n; NumVGPRsForWavesPerEU: 32\n; Occupancy: 16\n; WaveLimiterHint : 0\n; COMPUTE_PGM_RSRC2:SCRATCH_EN: 1\n; COMPUTE_PGM_RSRC2:USER_SGPR: 13\n; COMPUTE_PGM_RSRC2:TRAP_HANDLER: 0\n; COMPUTE_PGM_RSRC2:TGID_X_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Y_EN: 1\n; COMPUTE_PGM_RSRC2:TGID_Z_EN: 1\n; COMPUTE_PGM_RSRC2:TIDIG_COMP_CNT: 2\n\t.text\n\t.p2alignl 7, 3214868480\n\t.fill 96, 4, 3214868480\n\t.type\t__const.__assert_fail.fmt,@object ; @__const.__assert_fail.fmt\n\t.section\t.rodata.str1.16,\"aMS\",@progbits,1\n\t.p2align\t4, 0x0\n__const.__assert_fail.fmt:\n\t.asciz\t\"%s:%u: %s: Device-side assertion `%s' failed.\\n\"\n\t.size\t__const.__assert_fail.fmt, 47\n\n\t.protected\tblockDim\n\t.protected\tblockIdx\n\t.protected\tthreadIdx\n\t.type\t__hip_cuid_,@object ; @__hip_cuid_\n\t.section\t.bss,\"aw\",@nobits\n\t.globl\t__hip_cuid_\n__hip_cuid_:\n\t.byte\t0 ; 0x0\n\t.size\t__hip_cuid_, 1\n\n\t.hidden\t__oclc_ABI_version ; @__oclc_ABI_version\n\t.type\t__oclc_ABI_version,@object\n\t.section\t.rodata,\"a\",@progbits\n\t.weak\t__oclc_ABI_version\n\t.p2align\t2, 0x0\n__oclc_ABI_version:\n\t.long\t500 ; 0x1f4\n\t.size\t__oclc_ABI_version, 4\n\n\t.weak\tblockDim\n\t.weak\tblockIdx\n\t.weak\tthreadIdx\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git (https://github.com/RadeonOpenCompute/llvm-project roc-6.3.0 24455 f24aa3b4a91f6ee2fcd15629ba0b49fa545d8d6b)\"\n\t.ident\t\"AMD clang version 18.0.0git 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id stringlengths 43 43 | cuda stringlengths 1.25k 914k | hip stringlengths 0 916k |
|---|---|---|
82c74a78fe642b004c45b25304eb852112828af9_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z23featureExtractionKernelPKfPf --------------------------
.section .text._Z23featureExtractionKernelPKfPf,"ax",@progb... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
59bb87f2732db71364dd0efe74fa860a5411a289_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z14ccc_cmp_kernalPKfS0_Pfiiii --------------------------
.section .text._Z14ccc_cmp_kernalPKfS0_Pfiiii,"ax",@progbits
... | .text
.file "main.hip"
.globl _Z29__device_stub__ccc_cmp_kernalPKfS0_Pfiiii # -- Begin function _Z29__device_stub__ccc_cmp_kernalPKfS0_Pfiiii
.p2align 4, 0x90
.type _Z29__device_stub__ccc_cmp_kernalPKfS0_Pfiiii,@function
_Z29__device_stub__ccc_cmp_kernalPKfS0_Pfiiii: # @_Z29__device_stub__ccc_cmp_kernalPKfS0_Pfiii... |
8e18f5a4875d4746b02071e626d574e6fc16477b_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15dct_warp_kernelPf --------------------------
.section .text._Z15dct_warp_kernelPf,"ax",@progbits
.sectionfl... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15dct_warp_kernelPf ; -- Begin function _Z15dct_warp_kernelPf
.globl _Z15dct_warp_kernelPf
.p2align 8
.type _Z15dct_warp_kernelPf,@function
_Z15dct_warp_kernelPf: ; @_Z15dct_warp_kernelPf
; %bb.0:
s_load_b64 s[0:1], s[0:1], 0x0
v_... |
b9f5d454437a1188aa900e9b270a853e12d08fdc_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z12sum_reducer2Pi --------------------------
.section .text._Z12sum_reducer2Pi,"ax",@progbits
.sectionflags ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
ea9fab6e12c0ded26b1888c6d4f7a0920d7ebd8b_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z16maskAttackKernelPcPii --------------------------
.section .text._Z16maskAttackKernelPcPii,"ax",@progbits
.s... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16maskAttackKernelPcPii ; -- Begin function _Z16maskAttackKernelPcPii
.globl _Z16maskAttackKernelPcPii
.p2align 8
.type _Z16maskAttackKernelPcPii,@function
_Z16maskAttackKernelPcPii: ; @_Z16maskAttackKernelPcPii
; %bb.0:
s_load_b32 s2, s... |
65d99ef76c6692060198a0b2b017a71b95e36bcf_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13simGlobalStepP6float3S0_i --------------------------
.section .text._Z13simGlobalStepP6float3S0_i,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13simGlobalStepP15HIP_vector_typeIfLj3EES1_i ; -- Begin function _Z13simGlobalStepP15HIP_vector_typeIfLj3EES1_i
.globl _Z13simGlobalStepP15HIP_vector_typeIfLj3EES1_i
.p2align 8
.type _Z13simGlobalStepP15HIP_vector_typeIfLj3EES1_i,@function
_Z13simGlob... |
015369d001b4c6d268c97629224af932d90b2133_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z14skipListKernelPiS_ --------------------------
.section .text._Z14skipListKernelPiS_,"ax",@progbits
.section... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
b1518d46fa34d98216162b98e1b57650c0490281_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z28RunLengthEncodingComputationPcPii --------------------------
.section .text._Z28RunLengthEncodingComputationPcPii,"... | .text
.file "RunLengthEncoding.hip"
.globl _Z43__device_stub__RunLengthEncodingComputationPcPii # -- Begin function _Z43__device_stub__RunLengthEncodingComputationPcPii
.p2align 4, 0x90
.type _Z43__device_stub__RunLengthEncodingComputationPcPii,@function
_Z43__device_stub__RunLengthEncodingComputationPcPii: # @_Z4... |
b1fb5b437e373dfa5cc5c0cc9a8dec22721a39ed_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13dfsSortKernelPi --------------------------
.section .text._Z13dfsSortKernelPi,"ax",@progbits
.sectionflags ... | .text
.file "cuda_code_015679.hip"
.globl _Z28__device_stub__dfsSortKernelPi # -- Begin function _Z28__device_stub__dfsSortKernelPi
.p2align 4, 0x90
.type _Z28__device_stub__dfsSortKernelPi,@function
_Z28__device_stub__dfsSortKernelPi: # @_Z28__device_stub__dfsSortKernelPi
.cfi_startproc
# %bb.0:
subq $72, %... |
426f484e671f8417def0f9825014de15b714281c_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10bfgsUpdatePfS_S_i --------------------------
.section .text._Z10bfgsUpdatePfS_S_i,"ax",@progbits
.sectionfl... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
83d6b097e114774225c65ddb08ffd6bf44c36a20_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13rmspropUpdatePfS_S_fff --------------------------
.section .text._Z13rmspropUpdatePfS_S_fff,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z13rmspropUpdatePfS_S_fff ; -- Begin function _Z13rmspropUpdatePfS_S_fff
.globl _Z13rmspropUpdatePfS_S_fff
.p2align 8
.type _Z13rmspropUpdatePfS_S_fff,@function
_Z13rmspropUpdatePfS_S_fff: ; @_Z13rmspropUpdatePfS_S_fff
; %bb.0:
s_load_b32 ... |
2d8c4f38df08b980a18188950bba7fab7b01cba7_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z22complicatedCalculationP16Coefficients_AOS --------------------------
.section .text._Z22complicatedCalculationP16Co... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
7986aaf9c463df48645fc6af24ce87dbe208e3c8_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15mergeSortKernelPi --------------------------
.section .text._Z15mergeSortKernelPi,"ax",@progbits
.sectionfl... | .text
.file "cuda_code_059490.hip"
.globl _Z30__device_stub__mergeSortKernelPi # -- Begin function _Z30__device_stub__mergeSortKernelPi
.p2align 4, 0x90
.type _Z30__device_stub__mergeSortKernelPi,@function
_Z30__device_stub__mergeSortKernelPi: # @_Z30__device_stub__mergeSortKernelPi
.cfi_startproc
# %bb.0:
sub... |
b4e42792f8d351f5d5b08030d29104c9f760e630_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z23featureExtractionKernelPKfPfii --------------------------
.section .text._Z23featureExtractionKernelPKfPfii,"ax",@p... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z23featureExtractionKernelPKfPfii ; -- Begin function _Z23featureExtractionKernelPKfPfii
.globl _Z23featureExtractionKernelPKfPfii
.p2align 8
.type _Z23featureExtractionKernelPKfPfii,@function
_Z23featureExtractionKernelPKfPfii: ; @_Z23featureExtra... |
34c73a1854e63ea4a09299cd64d527486f92c931_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z21gradientDescentKernelPfPKf --------------------------
.section .text._Z21gradientDescentKernelPfPKf,"ax",@progbits
... | .text
.file "cuda_code_021832.hip"
.globl _Z36__device_stub__gradientDescentKernelPfPKf # -- Begin function _Z36__device_stub__gradientDescentKernelPfPKf
.p2align 4, 0x90
.type _Z36__device_stub__gradientDescentKernelPfPKf,@function
_Z36__device_stub__gradientDescentKernelPfPKf: # @_Z36__device_stub__gradientDesce... |
16330279bfaf1f986126ea0e619afe8ddea4a4a0_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z7computePfii --------------------------
.section .text._Z7computePfii,"ax",@progbits
.sectionflags @"S... | .text
.file "fadd_64p_asm.hip"
.globl _Z22__device_stub__computePfii # -- Begin function _Z22__device_stub__computePfii
.p2align 4, 0x90
.type _Z22__device_stub__computePfii,@function
_Z22__device_stub__computePfii: # @_Z22__device_stub__computePfii
.cfi_startproc
# %bb.0:
subq $88, %rsp
.cfi_def_cfa_o... |
a555f2c02ad6b7afb5a15f8cdae2ec9baf9ee36b_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15MatrixMulKernelPiS_S_i --------------------------
.section .text._Z15MatrixMulKernelPiS_S_i,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
17f8cf38609d109b1cb867d39858cade60e25da7_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z21clothSimulationKernelPfS_ff --------------------------
.section .text._Z21clothSimulationKernelPfS_ff,"ax",@progbit... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z21clothSimulationKernelPfS_ff ; -- Begin function _Z21clothSimulationKernelPfS_ff
.globl _Z21clothSimulationKernelPfS_ff
.p2align 8
.type _Z21clothSimulationKernelPfS_ff,@function
_Z21clothSimulationKernelPfS_ff: ; @_Z21clothSimulationKernelPfS... |
b87b9df21a9b7ba7ad94740abe7b61071a44c4c2_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10stencil32DPfS_ --------------------------
.section .text._Z10stencil32DPfS_,"ax",@progbits
.sectionflags ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z10stencil32DPfS_ ; -- Begin function _Z10stencil32DPfS_
.globl _Z10stencil32DPfS_
.p2align 8
.type _Z10stencil32DPfS_,@function
_Z10stencil32DPfS_: ; @_Z10stencil32DPfS_
; %bb.0:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x1c
s_l... |
7e9534129d41a0a8a7e2295aa0423f4a34db1c53_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z21clothSimulationKernelPfS_S_ff --------------------------
.section .text._Z21clothSimulationKernelPfS_S_ff,"ax",@pro... | .text
.file "cuda_code_086429.hip"
.globl _Z36__device_stub__clothSimulationKernelPfS_S_ff # -- Begin function _Z36__device_stub__clothSimulationKernelPfS_S_ff
.p2align 4, 0x90
.type _Z36__device_stub__clothSimulationKernelPfS_S_ff,@function
_Z36__device_stub__clothSimulationKernelPfS_S_ff: # @_Z36__device_stub__c... |
fa88b75ef8cb3d4d2a57f26183bf057f5a9b2783_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z14updateVerticesP6Vertexiif --------------------------
.section .text._Z14updateVerticesP6Vertexiif,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18initializeVerticesP6Vertexii ; -- Begin function _Z18initializeVerticesP6Vertexii
.globl _Z18initializeVerticesP6Vertexii
.p2align 8
.type _Z18initializeVerticesP6Vertexii,@function
_Z18initializeVerticesP6Vertexii: ; @_Z18initializeVerticesP6... |
a5f055701e229f3be3756dde9f72dde98eedab02_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20_... | .text
.file "cuda_code_046950.hip"
.globl _Z32__device_stub__hash_table_insertPjS_S_i # -- Begin function _Z32__device_stub__hash_table_insertPjS_S_i
.p2align 4, 0x90
.type _Z32__device_stub__hash_table_insertPjS_S_i,@function
_Z32__device_stub__hash_table_insertPjS_S_i: # @_Z32__device_stub__hash_table_insertPjS_... |
13c8db805baa818dcd02a681f553cf939035a2a8_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11helloKernelv --------------------------
.section .text._Z11helloKernelv,"ax",@progbits
.sectioninfo @... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
81b4655c913b3f89bffc536dc3d903951c986d57_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z7CalcSepPfS_S_iiPiffi --------------------------
.section .text._Z7CalcSepPfS_S_iiPiffi,"ax",@progbits
.secti... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z7CalcSepPfS_S_iiPiffi ; -- Begin function _Z7CalcSepPfS_S_iiPiffi
.globl _Z7CalcSepPfS_S_iiPiffi
.p2align 8
.type _Z7CalcSepPfS_S_iiPiffi,@function
_Z7CalcSepPfS_S_iiPiffi: ; @_Z7CalcSepPfS_S_iiPiffi
; %bb.0:
s_clause 0x1
s_load_b32 s... |
f59917f2e87b4fbdce8f2b73356c00bb45c4a422_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z9md5KernelPjS_i --------------------------
.section .text._Z9md5KernelPjS_i,"ax",@progbits
.sectionflags ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9md5KernelPjS_i ; -- Begin function _Z9md5KernelPjS_i
.globl _Z9md5KernelPjS_i
.p2align 8
.type _Z9md5KernelPjS_i,@function
_Z9md5KernelPjS_i: ; @_Z9md5KernelPjS_i
; %bb.0:
s_clause 0x1
s_load_b32 s4, s[0:1], 0x24
s_load_... |
ec5cf2fae788ef95cd9b3d40e4b7ca681e3722f2_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z16monteCarloKernelPfffffi --------------------------
.section .text._Z16monteCarloKernelPfffffi,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16monteCarloKernelPfffffi ; -- Begin function _Z16monteCarloKernelPfffffi
.globl _Z16monteCarloKernelPfffffi
.p2align 8
.type _Z16monteCarloKernelPfffffi,@function
_Z16monteCarloKernelPfffffi: ; @_Z16monteCarloKernelPfffffi
; %bb.0:
s_load... |
ac0fdf41a2ed4c86d7c815cb2cee1b5d4b0e6958_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z21gradientDescentKernelPfPKffi --------------------------
.section .text._Z21gradientDescentKernelPfPKffi,"ax",@progb... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
2c50b7af962376098aac7ae9c724cc9119a61927_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z4SignPfmm --------------------------
.section .text._Z4SignPfmm,"ax",@progbits
.sectioninfo @"SHI_... | .text
.file "main.hip"
.globl _Z19__device_stub__SignPfmm # -- Begin function _Z19__device_stub__SignPfmm
.p2align 4, 0x90
.type _Z19__device_stub__SignPfmm,@function
_Z19__device_stub__SignPfmm: # @_Z19__device_stub__SignPfmm
.cfi_startproc
# %bb.0:
subq $104, %rsp
.cfi_def_cfa_offset 112
movq ... |
3a59916639092a3f7fbd825806738f1dfd676463_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z24simulatedAnnealingKernelP17curandStateXORWOWPff --------------------------
.section .text._Z24simulatedAnnealingKer... | .text
.file "cuda_code_005147.hip"
.globl _Z31__device_stub__initRandomStatesP12hiprandStatem # -- Begin function _Z31__device_stub__initRandomStatesP12hiprandStatem
.p2align 4, 0x90
.type _Z31__device_stub__initRandomStatesP12hiprandStatem,@function
_Z31__device_stub__initRandomStatesP12hiprandStatem: # @_Z31__de... |
9685c2ab9fc65527a09f3a4185f994d181641248_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z26BFS_kernel_one_block_spillPVjjS0_PViPjS3_jjS0_j --------------------------
.section .text._Z26BFS_kernel_one_block_... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z26BFS_kernel_one_block_spillPVjjS0_PViPjS3_jjS0_j ; -- Begin function _Z26BFS_kernel_one_block_spillPVjjS0_PViPjS3_jjS0_j
.globl _Z26BFS_kernel_one_block_spillPVjjS0_PViPjS3_jjS0_j
.p2align 8
.type _Z26BFS_kernel_one_block_spillPVjjS0_PViPjS3_jjS0_j,@... |
f087ee80195e1298f0382f2ecaaf6e81fc3740cf_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub6__... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
b8385ea9673665357809d3c72940a9f60ddc575f_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z9bfsKernelPiS_S_S_iS_S_ --------------------------
.section .text._Z9bfsKernelPiS_S_S_iS_S_,"ax",@progbits
.s... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z9bfsKernelPiS_S_S_iS_S_ ; -- Begin function _Z9bfsKernelPiS_S_S_iS_S_
.globl _Z9bfsKernelPiS_S_S_iS_S_
.p2align 8
.type _Z9bfsKernelPiS_S_S_iS_S_,@function
_Z9bfsKernelPiS_S_S_iS_S_: ; @_Z9bfsKernelPiS_S_S_iS_S_
; %bb.0:
s_clause 0x1
s_... |
85cf7e41b07f9fd35a7b2de234b3a7e2beb3401e_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20_... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
8381dd1570078a04521ed69b3d347622e35afc0b_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z8firDnBeaPdS_S_iiii --------------------------
.section .text._Z8firDnBeaPdS_S_iiii,"ax",@progbits
.sectionin... | .text
.file "firDn3DGPU.hip"
.globl _Z23__device_stub__firDnRowPdS_S_iiii # -- Begin function _Z23__device_stub__firDnRowPdS_S_iiii
.p2align 4, 0x90
.type _Z23__device_stub__firDnRowPdS_S_iiii,@function
_Z23__device_stub__firDnRowPdS_S_iiii: # @_Z23__device_stub__firDnRowPdS_S_iiii
.cfi_startproc
# %bb.0:
subq ... |
b7c2b6536c96f82ab21227433ae0b4fd4d58e062_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15mergeSortKernelPiS_i --------------------------
.section .text._Z15mergeSortKernelPiS_i,"ax",@progbits
.sec... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15mergeSortKernelPiS_i ; -- Begin function _Z15mergeSortKernelPiS_i
.globl _Z15mergeSortKernelPiS_i
.p2align 8
.type _Z15mergeSortKernelPiS_i,@function
_Z15mergeSortKernelPiS_i: ; @_Z15mergeSortKernelPiS_i
; %bb.0:
s_clause 0x2
s_load_... |
58b9a692e3c2b9597a21bbadaf771454d181ed58_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11computeCostPKdPKfS2_S2_PKiPKbPf --------------------------
.section .text._Z11computeCostPKdPKfS2_S2_PKiPKbPf,"ax",... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11computeCostPKdPKfS2_S2_PKiPKbPf ; -- Begin function _Z11computeCostPKdPKfS2_S2_PKiPKbPf
.globl _Z11computeCostPKdPKfS2_S2_PKiPKbPf
.p2align 8
.type _Z11computeCostPKdPKfS2_S2_PKiPKbPf,@function
_Z11computeCostPKdPKfS2_S2_PKiPKbPf: ; @_Z11computeC... |
192ea6b7c4e61baaf972bb8b5d9c6ef8a5ede320_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z7spinlolv --------------------------
.section .text._Z7spinlolv,"ax",@progbits
.sectionflags @"SHF_... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
381057099bc657cb5919223b84e505670180df26_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z12btree_kernelP9BTreeNode --------------------------
.section .text._Z12btree_kernelP9BTreeNode,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12btree_kernelP9BTreeNode ; -- Begin function _Z12btree_kernelP9BTreeNode
.globl _Z12btree_kernelP9BTreeNode
.p2align 8
.type _Z12btree_kernelP9BTreeNode,@function
_Z12btree_kernelP9BTreeNode: ; @_Z12btree_kernelP9BTreeNode
; %bb.0:
s_load... |
1daba7b0e13d059b7e8e844ec0a7d9b7312641af_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z9sccKernelPiS_S_ --------------------------
.section .text._Z9sccKernelPiS_S_,"ax",@progbits
.sectionflags ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
68ca3ea385c355f23315b4660c2b569fe1b2cb6f_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z3runv --------------------------
.section .text._Z3runv,"ax",@progbits
.sectioninfo @"SHI_REGI... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z3runv ; -- Begin function _Z3runv
.globl _Z3runv
.p2align 8
.type _Z3runv,@function
_Z3runv: ; @_Z3runv
; %bb.0:
s_endpgm
.section .rodata,"a",@progbits
.p2align 6, 0x0
.amdhsa_kernel _Z3runv
.amdhs... |
639c3e077666c81f4dcc72f0c2d0f57bc4ff4552_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z20bTreeOperationKernelP9BTreeNodePi --------------------------
.section .text._Z20bTreeOperationKernelP9BTreeNodePi,"... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z20bTreeOperationKernelP9BTreeNodePi ; -- Begin function _Z20bTreeOperationKernelP9BTreeNodePi
.globl _Z20bTreeOperationKernelP9BTreeNodePi
.p2align 8
.type _Z20bTreeOperationKernelP9BTreeNodePi,@function
_Z20bTreeOperationKernelP9BTreeNodePi: ; @_Z20... |
e5aa2a30aa8b1e73eef844388e7a437ec584fb6c_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z6Conv1DPfS_ii --------------------------
.section .text._Z6Conv1DPfS_ii,"ax",@progbits
.sectionflags @"... | .text
.file "cuda1DCovolution.hip"
.globl _Z21__device_stub__Conv1DPfS_ii # -- Begin function _Z21__device_stub__Conv1DPfS_ii
.p2align 4, 0x90
.type _Z21__device_stub__Conv1DPfS_ii,@function
_Z21__device_stub__Conv1DPfS_ii: # @_Z21__device_stub__Conv1DPfS_ii
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_d... |
5bfd8e2d7efb4566cd7880cadd7b015d0eb79e97_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z14nbodyFmmKernelP8ParticleS0_ --------------------------
.section .text._Z14nbodyFmmKernelP8ParticleS0_,"ax",@progbit... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z14nbodyFmmKernelP8ParticleS0_ ; -- Begin function _Z14nbodyFmmKernelP8ParticleS0_
.globl _Z14nbodyFmmKernelP8ParticleS0_
.p2align 8
.type _Z14nbodyFmmKernelP8ParticleS0_,@function
_Z14nbodyFmmKernelP8ParticleS0_: ; @_Z14nbodyFmmKernelP8Particle... |
8a2e481d28f464fad7a777669886e7702907bd10_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11GPUFunctionv --------------------------
.section .text._Z11GPUFunctionv,"ax",@progbits
.sectioninfo @... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11GPUFunctionv ; -- Begin function _Z11GPUFunctionv
.globl _Z11GPUFunctionv
.p2align 8
.type _Z11GPUFunctionv,@function
_Z11GPUFunctionv: ; @_Z11GPUFunctionv
; %bb.0:
s_load_b64 s[2:3], s[0:1], 0x50
v_mbcnt_lo_u32_b32 v2... |
3f8703af66f97c714ab7ae1a0d672b87a40ddd78_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv --------------------------
.section .text._ZN3cub17CUB_200700_890_NS11Emp... | .text
.file "cuda_code_068259.hip"
.globl _Z31__device_stub__initCurandStatesP12hiprandStatem # -- Begin function _Z31__device_stub__initCurandStatesP12hiprandStatem
.p2align 4, 0x90
.type _Z31__device_stub__initCurandStatesP12hiprandStatem,@function
_Z31__device_stub__initCurandStatesP12hiprandStatem: # @_Z31__de... |
b1ce5ceb4c8fb48f5a236b178c0ccdfeef65eeb9_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tElN6thrust20THRUST_200700_890_NS8cuda_cub6__... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
4cc3e02235ef77ee450a64295d654cb655c32368_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS6detail8for_each13static_kernelINS2_12policy_hub_t12policy_350_tEmN6thrust20THRUST_200700_890_NS8cuda_cub20_... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19graphColoringKernelPiS_i ; -- Begin function _Z19graphColoringKernelPiS_i
.globl _Z19graphColoringKernelPiS_i
.p2align 8
.type _Z19graphColoringKernelPiS_i,@function
_Z19graphColoringKernelPiS_i: ; @_Z19graphColoringKernelPiS_i
; %bb.0:
s... |
8a8ea510e75e7df82f22e44b038706139c1fcb1c_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18simulatedAnnealingP17curandStateXORWOWPfff --------------------------
.section .text._Z18simulatedAnnealingP17curan... | .text
.file "cuda_code_042866.hip"
.globl _Z31__device_stub__initializeStatesP12hiprandStatem # -- Begin function _Z31__device_stub__initializeStatesP12hiprandStatem
.p2align 4, 0x90
.type _Z31__device_stub__initializeStatesP12hiprandStatem,@function
_Z31__device_stub__initializeStatesP12hiprandStatem: # @_Z31__de... |
6d59e5dd0068cc663eb38382980bbf3024342c1e_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18sparseTensorKernelPiS_PfS0_i --------------------------
.section .text._Z18sparseTensorKernelPiS_PfS0_i,"ax",@progb... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18sparseTensorKernelPiS_PfS0_i ; -- Begin function _Z18sparseTensorKernelPiS_PfS0_i
.globl _Z18sparseTensorKernelPiS_PfS0_i
.p2align 8
.type _Z18sparseTensorKernelPiS_PfS0_i,@function
_Z18sparseTensorKernelPiS_PfS0_i: ; @_Z18sparseTensorKernelPi... |
c14889b01b84b51c83cb8adba06f51175d63b62a_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z16computeAttentionPfS_S_S_S_ --------------------------
.section .text._Z16computeAttentionPfS_S_S_S_,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16computeAttentionPfS_S_S_S_ ; -- Begin function _Z16computeAttentionPfS_S_S_S_
.globl _Z16computeAttentionPfS_S_S_S_
.p2align 8
.type _Z16computeAttentionPfS_S_S_S_,@function
_Z16computeAttentionPfS_S_S_S_: ; @_Z16computeAttentionPfS_S_S_S_
;... |
d45691473026cfc4facf6c98fafd59ae9d4fa611_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10stencil64DPfS_i --------------------------
.section .text._Z10stencil64DPfS_i,"ax",@progbits
.sectioninfo ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
a789ea0e0dad0980e88e7ad0eadeb089869de55a_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._ZN3cub17CUB_200700_890_NS11EmptyKernelIvEEvv --------------------------
.section .text._ZN3cub17CUB_200700_890_NS11Emp... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
d34d37274a566929d47d192367c8c2b8ea38d34b_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11bTreeKernelP9BTreeNode --------------------------
.section .text._Z11bTreeKernelP9BTreeNode,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11bTreeKernelP9BTreeNode ; -- Begin function _Z11bTreeKernelP9BTreeNode
.globl _Z11bTreeKernelP9BTreeNode
.p2align 8
.type _Z11bTreeKernelP9BTreeNode,@function
_Z11bTreeKernelP9BTreeNode: ; @_Z11bTreeKernelP9BTreeNode
; %bb.0:
s_load_b32 ... |
68a10b196ac44ee97f2a774524fba730815aadf3_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z6arraddPiS_S_i --------------------------
.section .text._Z6arraddPiS_S_i,"ax",@progbits
.sectionflags @... | .text
.file "shared_memory.hip"
.globl _Z21__device_stub__arraddPiS_S_i # -- Begin function _Z21__device_stub__arraddPiS_S_i
.p2align 4, 0x90
.type _Z21__device_stub__arraddPiS_S_i,@function
_Z21__device_stub__arraddPiS_S_i: # @_Z21__device_stub__arraddPiS_S_i
.cfi_startproc
# %bb.0:
subq $120, %rsp
.cfi_... |
2264621ae403ee4c03b6d7e1b2c6b606b1e8ce42_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10mineBlocksPyS_ij --------------------------
.section .text._Z10mineBlocksPyS_ij,"ax",@progbits
.sectioninfo... | .text
.file "cuda_code_055586.hip"
.globl _Z25__device_stub__mineBlocksPyS_ij # -- Begin function _Z25__device_stub__mineBlocksPyS_ij
.p2align 4, 0x90
.type _Z25__device_stub__mineBlocksPyS_ij,@function
_Z25__device_stub__mineBlocksPyS_ij: # @_Z25__device_stub__mineBlocksPyS_ij
.cfi_startproc
# %bb.0:
subq $1... |
ce175fe6f7c095e7889aa5dede442e4498d388ed_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z17constructSolutionP3antP17curandStateXORWOWPfPd --------------------------
.section .text._Z17constructSolutionP3ant... | .text
.file "aco-tsp.hip"
.globl _Z17euclideanDistanceffff # -- Begin function _Z17euclideanDistanceffff
.p2align 4, 0x90
.type _Z17euclideanDistanceffff,@function
_Z17euclideanDistanceffff: # @_Z17euclideanDistanceffff
.cfi_startproc
# %bb.0:
subss %xmm1, %xmm0
subss %xmm3, %xmm2
mulss %xmm... |
9405c249050c9c647bb1afb165d55915e2548bbc_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z19graphColoringKernelPiS_ --------------------------
.section .text._Z19graphColoringKernelPiS_,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19graphColoringKernelPiS_ ; -- Begin function _Z19graphColoringKernelPiS_
.globl _Z19graphColoringKernelPiS_
.p2align 8
.type _Z19graphColoringKernelPiS_,@function
_Z19graphColoringKernelPiS_: ; @_Z19graphColoringKernelPiS_
; %bb.0:
s_load... |
27530c1a4344325e983c770d94502462d1c8741e_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15sparseFFTKernelP6float2S0_iPi --------------------------
.section .text._Z15sparseFFTKernelP6float2S0_iPi,"ax",@pro... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
2984bd10a0d6cd91734c65dd16ffecc9237220e9_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10sliceArrayiiPKfPf --------------------------
.section .text._Z10sliceArrayiiPKfPf,"ax",@progbits
.sectionin... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
9783e72b49a9ccd4a2bb8c34589a9079d74124ca_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z12nbody_kernelP8Particlei --------------------------
.section .text._Z12nbody_kernelP8Particlei,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12nbody_kernelP8Particlei ; -- Begin function _Z12nbody_kernelP8Particlei
.globl _Z12nbody_kernelP8Particlei
.p2align 8
.type _Z12nbody_kernelP8Particlei,@function
_Z12nbody_kernelP8Particlei: ; @_Z12nbody_kernelP8Particlei
; %bb.0:
s_clau... |
630d9ee6cba521057b341c9a0150cf5c679c7441_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15updateParticlesP6float4S0_S0_f --------------------------
.section .text._Z15updateParticlesP6float4S0_S0_f,"ax",@p... | .text
.file "cuda_code_085476.hip"
.globl _Z28__device_stub__initParticlesP15HIP_vector_typeIfLj4EES1_P12hiprandStatei # -- Begin function _Z28__device_stub__initParticlesP15HIP_vector_typeIfLj4EES1_P12hiprandStatei
.p2align 4, 0x90
.type _Z28__device_stub__initParticlesP15HIP_vector_typeIfLj4EES1_P12hiprandStatei... |
729f7db8f226cb00fdc0a74510940ebe56408a5d_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z20searchSkipListKernelP12SkipListNodeiPi --------------------------
.section .text._Z20searchSkipListKernelP12SkipLis... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18initSkipListKernelP12SkipListNode ; -- Begin function _Z18initSkipListKernelP12SkipListNode
.globl _Z18initSkipListKernelP12SkipListNode
.p2align 8
.type _Z18initSkipListKernelP12SkipListNode,@function
_Z18initSkipListKernelP12SkipListNode: ; @_Z18... |
82cfedcfa832da67567e9dd12ff24ec8fbfee943_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z20monteCarloSimulationP17curandStateXORWOWPfffff --------------------------
.section .text._Z20monteCarloSimulationP1... | .text
.file "cuda_code_081490.hip"
.globl _Z31__device_stub__initCurandStatesP12hiprandStatem # -- Begin function _Z31__device_stub__initCurandStatesP12hiprandStatem
.p2align 4, 0x90
.type _Z31__device_stub__initCurandStatesP12hiprandStatem,@function
_Z31__device_stub__initCurandStatesP12hiprandStatem: # @_Z31__de... |
c63292a37adea8b828819c6198428dc53964a12a_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10mineBlocksPyS_y --------------------------
.section .text._Z10mineBlocksPyS_y,"ax",@progbits
.sectioninfo ... | .text
.file "cuda_code_054848.hip"
.globl _Z25__device_stub__mineBlocksPyS_y # -- Begin function _Z25__device_stub__mineBlocksPyS_y
.p2align 4, 0x90
.type _Z25__device_stub__mineBlocksPyS_y,@function
_Z25__device_stub__mineBlocksPyS_y: # @_Z25__device_stub__mineBlocksPyS_y
.cfi_startproc
# %bb.0:
subq $104, ... |
fcf6753c76b5c991483085f98ea50aea6642d12c_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15evaluateFitnessPiS_ --------------------------
.section .text._Z15evaluateFitnessPiS_,"ax",@progbits
.secti... | .text
.file "cuda_code_072735.hip"
.globl _Z35__device_stub__initializePopulationP12hiprandStatePi # -- Begin function _Z35__device_stub__initializePopulationP12hiprandStatePi
.p2align 4, 0x90
.type _Z35__device_stub__initializePopulationP12hiprandStatePi,@function
_Z35__device_stub__initializePopulationP12hiprand... |
26a75f5b3ee3d74ba06dfaea9e4140a886958ec7_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z20sparseTensorMultiplyPKiS0_PKfS2_Pf --------------------------
.section .text._Z20sparseTensorMultiplyPKiS0_PKfS2_Pf... | .text
.file "cuda_code_060586.hip"
.globl _Z35__device_stub__sparseTensorMultiplyPKiS0_PKfS2_Pf # -- Begin function _Z35__device_stub__sparseTensorMultiplyPKiS0_PKfS2_Pf
.p2align 4, 0x90
.type _Z35__device_stub__sparseTensorMultiplyPKiS0_PKfS2_Pf,@function
_Z35__device_stub__sparseTensorMultiplyPKiS0_PKfS2_Pf: # @... |
6ec1ccf242de30c27c656d6066bd92e72554dcc6_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text.sgemm_tn_vec_128x64 --------------------------
.section .text.sgemm_tn_vec_128x64,"ax",@progbits
.sectioninfo ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected sgemm_tn_vec_128x64 ; -- Begin function sgemm_tn_vec_128x64
.globl sgemm_tn_vec_128x64
.p2align 8
.type sgemm_tn_vec_128x64,@function
sgemm_tn_vec_128x64: ; @sgemm_tn_vec_128x64
; %bb.0:
v_dual_mov_b32 v1, 1.0 :: v_dual_lshlrev_b... |
20b8598e9f4796b00d4f176fc43f7ce30f5d8d81_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z5hellov --------------------------
.section .text._Z5hellov,"ax",@progbits
.sectioninfo @"SHI_RE... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5hellov ; -- Begin function _Z5hellov
.globl _Z5hellov
.p2align 8
.type _Z5hellov,@function
_Z5hellov: ; @_Z5hellov
; %bb.0:
s_getpc_b64 s[2:3]
s_add_u32 s2, s2, STR@rel32@lo+4
s_addc_u32 s3, s3, STR@rel32... |
c2e697c768499c459703926202c0bf9f175657ee_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z16computeAttentionPfS_S_S_ --------------------------
.section .text._Z16computeAttentionPfS_S_S_,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z16computeAttentionPfS_S_S_ ; -- Begin function _Z16computeAttentionPfS_S_S_
.globl _Z16computeAttentionPfS_S_S_
.p2align 8
.type _Z16computeAttentionPfS_S_S_,@function
_Z16computeAttentionPfS_S_S_: ; @_Z16computeAttentionPfS_S_S_
; %bb.0:
s... |
a77c3639ba0d78fcc2453bc58e6a78f7a99b0bea_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z14nbodyFMMKernelP8ParticlePfi --------------------------
.section .text._Z14nbodyFMMKernelP8ParticlePfi,"ax",@progbit... | .text
.file "cuda_code_034061.hip"
.globl _Z29__device_stub__nbodyFMMKernelP8ParticlePfi # -- Begin function _Z29__device_stub__nbodyFMMKernelP8ParticlePfi
.p2align 4, 0x90
.type _Z29__device_stub__nbodyFMMKernelP8ParticlePfi,@function
_Z29__device_stub__nbodyFMMKernelP8ParticlePfi: # @_Z29__device_stub__nbodyFMMK... |
32237dc0c25625d386b54ddb6bb0f642f977d02a_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text.dgemm --------------------------
.section .text.dgemm,"ax",@progbits
.sectioninfo @"SHI_REGIST... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
399f31a2bd3375f524f5bfa4eb71125d9ca5422b_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13infomapKernelPiS_Pf --------------------------
.section .text._Z13infomapKernelPiS_Pf,"ax",@progbits
.secti... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
a38198465c27ca17f3a7d8a2eea96dd4616be2aa_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18medianFilterKernelPhS_ii --------------------------
.section .text._Z18medianFilterKernelPhS_ii,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18medianFilterKernelPhS_ii ; -- Begin function _Z18medianFilterKernelPhS_ii
.globl _Z18medianFilterKernelPhS_ii
.p2align 8
.type _Z18medianFilterKernelPhS_ii,@function
_Z18medianFilterKernelPhS_ii: ; @_Z18medianFilterKernelPhS_ii
; %bb.0:
s... |
bebf8dbd8287b360f66bba9a5f4727df3daa80b6_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10count_sortiPiS_S_ --------------------------
.section .text._Z10count_sortiPiS_S_,"ax",@progbits
.sectionin... | .text
.file "sort_gpu.hip"
.globl _Z25__device_stub__count_sortiPiS_S_ # -- Begin function _Z25__device_stub__count_sortiPiS_S_
.p2align 4, 0x90
.type _Z25__device_stub__count_sortiPiS_S_,@function
_Z25__device_stub__count_sortiPiS_S_: # @_Z25__device_stub__count_sortiPiS_S_
.cfi_startproc
# %bb.0:
subq $120, ... |
ed160102b6a95830f33b50b59fea5f18446d0de5_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z23parallelReductionKernelPfS_j --------------------------
.section .text._Z23parallelReductionKernelPfS_j,"ax",@progb... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z23parallelReductionKernelPfS_j ; -- Begin function _Z23parallelReductionKernelPfS_j
.globl _Z23parallelReductionKernelPfS_j
.p2align 8
.type _Z23parallelReductionKernelPfS_j,@function
_Z23parallelReductionKernelPfS_j: ; @_Z23parallelReductionKer... |
b119d83011fbc3aee55ec6ecdf755bb334a6bbc5_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11PowerKernalPiS_i --------------------------
.section .text._Z11PowerKernalPiS_i,"ax",@progbits
.sectionflag... | .text
.file "dram_1.hip"
.globl _Z26__device_stub__PowerKernalPiS_i # -- Begin function _Z26__device_stub__PowerKernalPiS_i
.p2align 4, 0x90
.type _Z26__device_stub__PowerKernalPiS_i,@function
_Z26__device_stub__PowerKernalPiS_i: # @_Z26__device_stub__PowerKernalPiS_i
.cfi_startproc
# %bb.0:
subq $104, %rsp
... |
003b03dba5c0f045b3eb04bf58619e8c8dc5b765_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z17convolutionKernelPfS_S_i --------------------------
.section .text._Z17convolutionKernelPfS_S_i,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z17convolutionKernelPfS_S_i ; -- Begin function _Z17convolutionKernelPfS_S_i
.globl _Z17convolutionKernelPfS_S_i
.p2align 8
.type _Z17convolutionKernelPfS_S_i,@function
_Z17convolutionKernelPfS_S_i: ; @_Z17convolutionKernelPfS_S_i
; %bb.0:
s... |
660e34b65b33e3ceedf05f4c3dd5fef2ec972219_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z5colorPhiiff --------------------------
.section .text._Z5colorPhiiff,"ax",@progbits
.sectioninfo @"S... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z5colorPhiiff ; -- Begin function _Z5colorPhiiff
.globl _Z5colorPhiiff
.p2align 8
.type _Z5colorPhiiff,@function
_Z5colorPhiiff: ; @_Z5colorPhiiff
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x24
s_load_b32 s3, s[0:... |
721d1b01453d118d12f058cf8c32eb6a71a58fda_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z6kerneliPfPViiii --------------------------
.section .text._Z6kerneliPfPViiii,"ax",@progbits
.sectioninfo ... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z6kerneliPfPViiii ; -- Begin function _Z6kerneliPfPViiii
.globl _Z6kerneliPfPViiii
.p2align 8
.type _Z6kerneliPfPViiii,@function
_Z6kerneliPfPViiii: ; @_Z6kerneliPfPViiii
; %bb.0:
s_load_b32 s2, s[0:1], 0x18
s_waitcnt lgkmcnt... |
42226547d062925ffadc2895a91f018a0b81bab3_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z32d_do_permutation_generic_inversePiS_i --------------------------
.section .text._Z32d_do_permutation_generic_invers... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
dd5e45b8023fb4492feb1d704722c453e30a9874_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18sumOfSquaresKernelPKfPfi --------------------------
.section .text._Z18sumOfSquaresKernelPKfPfi,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
7c562ad05c27877c54f7f89345f0a68d53cc7990_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13beeman_kernelP6float4S0_S0_S0_ --------------------------
.section .text._Z13beeman_kernelP6float4S0_S0_S0_,"ax",@p... | .text
.file "cuda_code_073917.hip"
.globl _Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_ # -- Begin function _Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_
.p2align 4, 0x90
.type _Z28__device_stub__beeman_kernelP15HIP_vector_typeIfLj4EES1_S1_S1_,@function
_Z28__device_stub__... |
f70daf450bbd941b98fee50317302eab97c5d518_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z12idwt_per_X_1PfS_S_iiiii --------------------------
.section .text._Z12idwt_per_X_1PfS_S_iiiii,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z12idwt_per_X_1PfS_S_iiiii ; -- Begin function _Z12idwt_per_X_1PfS_S_iiiii
.globl _Z12idwt_per_X_1PfS_S_iiiii
.p2align 8
.type _Z12idwt_per_X_1PfS_S_iiiii,@function
_Z12idwt_per_X_1PfS_S_iiiii: ; @_Z12idwt_per_X_1PfS_S_iiiii
; %bb.0:
s_load... |
0256d56ad87c484a7e0cecbdee97910f0196cc9c_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z10mineBlocksPyPjS0_j --------------------------
.section .text._Z10mineBlocksPyPjS0_j,"ax",@progbits
.section... | .text
.file "cuda_code_010837.hip"
.globl _Z25__device_stub__mineBlocksPyPjS0_j # -- Begin function _Z25__device_stub__mineBlocksPyPjS0_j
.p2align 4, 0x90
.type _Z25__device_stub__mineBlocksPyPjS0_j,@function
_Z25__device_stub__mineBlocksPyPjS0_j: # @_Z25__device_stub__mineBlocksPyPjS0_j
.cfi_startproc
# %bb.0:
... |
46a01c397fb701584e2c899b13e5876ee1e402c2_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z23insertIntoPriorityQueuePiS_ --------------------------
.section .text._Z23insertIntoPriorityQueuePiS_,"ax",@progbit... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z23insertIntoPriorityQueuePiS_ ; -- Begin function _Z23insertIntoPriorityQueuePiS_
.globl _Z23insertIntoPriorityQueuePiS_
.p2align 8
.type _Z23insertIntoPriorityQueuePiS_,@function
_Z23insertIntoPriorityQueuePiS_: ; @_Z23insertIntoPriorityQueueP... |
2ee92fa1ae56a694a97b9451951925e11d7c93ca_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z26homomorphic_encrypt_kernelPiS_i --------------------------
.section .text._Z26homomorphic_encrypt_kernelPiS_i,"ax",... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
29eb84f0bf29ce37d1dc6c7f694587fdb6556ee9_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18heatEquationKernelPfS_S_fi --------------------------
.section .text._Z18heatEquationKernelPfS_S_fi,"ax",@progbits
... | .text
.file "cuda_code_060762.hip"
.globl _Z33__device_stub__heatEquationKernelPfS_S_fi # -- Begin function _Z33__device_stub__heatEquationKernelPfS_S_fi
.p2align 4, 0x90
.type _Z33__device_stub__heatEquationKernelPfS_S_fi,@function
_Z33__device_stub__heatEquationKernelPfS_S_fi: # @_Z33__device_stub__heatEquationK... |
a20ef370ddc399efec92815c94a85fa5d02afd65_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_ --------------------------
.section .text._Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_ ; -- Begin function _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_
.globl _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_
.p2align 8
.type _Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_,@function
_Z18calculate_A_ch_1_2PfS_S_S_S_fiiiS_: ; @... |
77740195c32415f155e3b5d3a01c8ebe02bd404b_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z13kernel_smoothPhiiS_ --------------------------
.section .text._Z13kernel_smoothPhiiS_,"ax",@progbits
.secti... | .text
.file "kernel_smooth.hip"
.globl _Z28__device_stub__kernel_smoothPhiiS_ # -- Begin function _Z28__device_stub__kernel_smoothPhiiS_
.p2align 4, 0x90
.type _Z28__device_stub__kernel_smoothPhiiS_,@function
_Z28__device_stub__kernel_smoothPhiiS_: # @_Z28__device_stub__kernel_smoothPhiiS_
.cfi_startproc
# %bb.0:... |
b7474467a34795a1537608534bba153798aef2a2_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z8vect_addPfS_i --------------------------
.section .text._Z8vect_addPfS_i,"ax",@progbits
.sectioninfo @... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
3891c524934c26cc3d4bf4508612ca8cdefba859_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z9sccKernelPiS_S_S_S_ --------------------------
.section .text._Z9sccKernelPiS_S_S_S_,"ax",@progbits
.section... | .text
.file "cuda_code_058039.hip"
.globl _Z24__device_stub__sccKernelPiS_S_S_S_ # -- Begin function _Z24__device_stub__sccKernelPiS_S_S_S_
.p2align 4, 0x90
.type _Z24__device_stub__sccKernelPiS_S_S_S_,@function
_Z24__device_stub__sccKernelPiS_S_S_S_: # @_Z24__device_stub__sccKernelPiS_S_S_S_
.cfi_startproc
# %bb... |
26f82c69c4ab2de999fc1d81f544972950ec16f9_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z15count_solutionsiPiP5statei --------------------------
.section .text._Z15count_solutionsiPiP5statei,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z15count_solutionsiPiP5statei ; -- Begin function _Z15count_solutionsiPiP5statei
.globl _Z15count_solutionsiPiP5statei
.p2align 8
.type _Z15count_solutionsiPiP5statei,@function
_Z15count_solutionsiPiP5statei: ; @_Z15count_solutionsiPiP5statei
;... |
594cdd39a2bd1d3008bafb7a66ffd0131be122c5_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z12traverseTreeP8TreeNodePii --------------------------
.section .text._Z12traverseTreeP8TreeNodePii,"ax",@progbits
... | .text
.file "cuda_code_011837.hip"
.globl _Z27__device_stub__traverseTreeP8TreeNodePii # -- Begin function _Z27__device_stub__traverseTreeP8TreeNodePii
.p2align 4, 0x90
.type _Z27__device_stub__traverseTreeP8TreeNodePii,@function
_Z27__device_stub__traverseTreeP8TreeNodePii: # @_Z27__device_stub__traverseTreeP8Tre... |
73602a2f08c42651f72a372b80036f87e42d0080_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z17sobelFilterKernelPfS_ii --------------------------
.section .text._Z17sobelFilterKernelPfS_ii,"ax",@progbits
... | .text
.file "cuda_code_070353.hip"
.globl _Z32__device_stub__sobelFilterKernelPfS_ii # -- Begin function _Z32__device_stub__sobelFilterKernelPfS_ii
.p2align 4, 0x90
.type _Z32__device_stub__sobelFilterKernelPfS_ii,@function
_Z32__device_stub__sobelFilterKernelPfS_ii: # @_Z32__device_stub__sobelFilterKernelPfS_ii
... |
5702ba4e8bd35bd71b2f08f24fdd96c458a8da5c_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18z_transform_kernelP6float2S0_ --------------------------
.section .text._Z18z_transform_kernelP6float2S0_,"ax",@pro... | .text
.file "cuda_code_009823.hip"
.globl _Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_ # -- Begin function _Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_
.p2align 4, 0x90
.type _Z33__device_stub__z_transform_kernelP15HIP_vector_typeIfLj2EES1_,@function
_Z33__device_stub__z_t... |
cadfe59e7b8df060cb287d48458fb9ea5211a85a_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z18compact2d_1D_arrayPiS_S_S_S_S_i --------------------------
.section .text._Z18compact2d_1D_arrayPiS_S_S_S_S_i,"ax",... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z18compact2d_1D_arrayPiS_S_S_S_S_i ; -- Begin function _Z18compact2d_1D_arrayPiS_S_S_S_S_i
.globl _Z18compact2d_1D_arrayPiS_S_S_S_S_i
.p2align 8
.type _Z18compact2d_1D_arrayPiS_S_S_S_S_i,@function
_Z18compact2d_1D_arrayPiS_S_S_S_S_i: ; @_Z18compact2... |
d90ecac23bb17b89dd7c7be0691c0d83d68ecf65_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z4convPfS_S_iii --------------------------
.section .text._Z4convPfS_S_iii,"ax",@progbits
.sectionflags @... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z4convPfS_S_iii ; -- Begin function _Z4convPfS_S_iii
.globl _Z4convPfS_S_iii
.p2align 8
.type _Z4convPfS_S_iii,@function
_Z4convPfS_S_iii: ; @_Z4convPfS_S_iii
; %bb.0:
s_clause 0x1
s_load_b32 s2, s[0:1], 0x34
s_load_b256... |
3174e8d267d8c6a6317486156725edb44ab4c3cf_O1 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z11nbodyKernelP8Particlefi --------------------------
.section .text._Z11nbodyKernelP8Particlefi,"ax",@progbits
... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z11nbodyKernelP8Particlefi ; -- Begin function _Z11nbodyKernelP8Particlefi
.globl _Z11nbodyKernelP8Particlefi
.p2align 8
.type _Z11nbodyKernelP8Particlefi,@function
_Z11nbodyKernelP8Particlefi: ; @_Z11nbodyKernelP8Particlefi
; %bb.0:
s_clau... |
be0c16235f897968f7cd857cdd5464a7bbf175f7_O2 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z19graphColoringKernelPiS_S_S_ --------------------------
.section .text._Z19graphColoringKernelPiS_S_S_,"ax",@progbit... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.protected _Z19graphColoringKernelPiS_S_S_ ; -- Begin function _Z19graphColoringKernelPiS_S_S_
.globl _Z19graphColoringKernelPiS_S_S_
.p2align 8
.type _Z19graphColoringKernelPiS_S_S_,@function
_Z19graphColoringKernelPiS_S_S_: ; @_Z19graphColoringKernelPiS_S... |
28a33a4e1b76977eae59139d0f97e06b6364e65b_O0 | .headerflags @"EF_CUDA_TEXMODE_UNIFIED EF_CUDA_64BIT_ADDRESS EF_CUDA_SM89 EF_CUDA_VIRTUAL_SM(EF_CUDA_SM89)"
.elftype @"ET_EXEC"
//--------------------- .text._Z7findMaxPiS_i --------------------------
.section .text._Z7findMaxPiS_i,"ax",@progbits
.sectioninfo @"... | .text
.amdgcn_target "amdgcn-amd-amdhsa--gfx1100"
.weak __cxa_pure_virtual ; -- Begin function __cxa_pure_virtual
.p2align 2
.type __cxa_pure_virtual,@function
__cxa_pure_virtual: ; @__cxa_pure_virtual
; %bb.0:
s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
s_trap 2
s_sendmsg_rtn_b32 s... |
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