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Lineage-Aware Memory Governance
Companion repository for the paper "Lineage-Aware Memory Governance: A Derivation-Gated Framework for Privacy-Preserving Column-Level Access Control in Enterprise AI Agents" (Venkata Sangaraju, Sudhir Vissa). The paper is accepted in IEEE Access, 2026.
- arXiv: https://arxiv.org/abs/2610.07258
- IEEE Xplore (open access): https://ieeexplore.ieee.org/document/11677041
- DOI: 10.1109/ACCESS.2026.3730363
Summary
Shared memory for AI agents can leak sensitive data through cached results that were computed legitimately. The paper introduces the Analytical Memory Unit (AMU), which attaches a full derivation (lineage) graph to every cached result. Retrieval is gated so that a cache hit is served only when the requester is authorised for every column the result touches. Across six experiments, lineage-gated retrieval removes the 18.8–25.5% cross-department leakage seen with naive content-gated memory. It keeps 81.5–82.6% of memory reuse, with 13.8 µs worst-case overhead.
Benchmark data and an interactive demo are coming soon.
Citation
@article{sangaraju2026lineage,
title = {Lineage-Aware Memory Governance: A Derivation-Gated Framework for Privacy-Preserving Column-Level Access Control in Enterprise AI Agents},
author = {Sangaraju, Venkata and Vissa, Sudhir},
journal = {IEEE Access},
year = {2026},
doi = {10.1109/ACCESS.2026.3730363},
eprint = {2610.07258},
archivePrefix = {arXiv}
}
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